Tri-state load outputs by default

diff --git a/src/pwr/main.c b/src/pwr/main.c
index fe60b28723de13c2143c8603017ea81c736d9b88..a5c1f34b0ce94e1bbd55575db5733597738f1bd8 100644 (file)
--- a/src/pwr/main.c
+++ b/src/pwr/main.c
@@ -288,12 +288,12 @@ void init() {
 
   // IO
   IO_PORT_CLR(MOTOR_PIN); // Motor voltage off
-  IO_DDR_SET(LOAD1_PIN);  // Output
-  IO_DDR_SET(LOAD2_PIN);  // Output
+  IO_DDR_CLR(LOAD1_PIN);  // Tri-state
+  IO_DDR_CLR(LOAD2_PIN);  // Tri-state
   IO_PUE_SET(PWR_RESET);  // Pull up reset line
 
   // Disable digital IO on ADC lines
-  DIDR0 = (1 << ADC4D) | (1 << ADC3D) | (1 << ADC2D)| (1 << ADC1D) |
+  DIDR0 = (1 << ADC4D) | (1 << ADC3D) | (1 << ADC2D) | (1 << ADC1D) |
     (1 << ADC0D) | (1 << AREFD);
   DIDR1 = (1 << ADC5D);