Motor driver tweaks

diff --git a/electronics/motor-driver.sch b/electronics/motor-driver.sch
index 72530c08118c5fa30d8966479bb0321976bafe39..090825280702eb71fe8c827a55915fc2e9b0006f 100644 (file)
--- a/electronics/motor-driver.sch
+++ b/electronics/motor-driver.sch
@@ -2,110 +2,110 @@ v 20130925 2
 C 40000 40000 0 0 0 title-B.sym
 T 50000 40700 9 10 1 0 0 0 1
 Motor Driver
-C 44800 41600 1 90 0 header20-1.sym
+C 44400 41600 1 90 0 header20-1.sym
 {
-T 45050 41800 5 10 0 1 90 0 1
+T 44650 41800 5 10 0 1 90 0 1
 device=HEADER20
-T 40700 42400 5 10 1 1 180 0 1
+T 40300 42400 5 10 1 1 180 0 1
 refdes=J1
 }
-C 41900 43000 1 90 0 output-1.sym
+C 41500 43000 1 90 0 output-1.sym
 {
-T 41600 43100 5 10 0 0 90 0 1
+T 41200 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 41900 43900 5 10 1 1 90 0 1
+T 41500 43900 5 10 1 1 90 0 1
 netname=spi_clk
 }
-C 41300 41600 1 270 0 output-1.sym
+C 40900 41600 1 270 0 output-1.sym
 {
-T 41600 41500 5 10 0 0 270 0 1
+T 41200 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 41500 40200 5 10 1 1 90 0 1
+T 41100 40200 5 10 1 1 90 0 1
 netname=enable
 }
-C 41700 41600 1 270 0 output-1.sym
+C 41300 41600 1 270 0 output-1.sym
 {
-T 42000 41500 5 10 0 0 270 0 1
+T 41600 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 41900 40500 5 10 1 1 90 0 1
+T 41500 40500 5 10 1 1 90 0 1
 netname=dir
 }
-C 42100 41600 1 270 0 output-1.sym
+C 41700 41600 1 270 0 output-1.sym
 {
-T 42400 41500 5 10 0 0 270 0 1
+T 42000 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 42300 40400 5 10 1 1 90 0 1
+T 41900 40400 5 10 1 1 90 0 1
 netname=step
 }
-C 42300 43000 1 90 0 output-1.sym
+C 41900 43000 1 90 0 output-1.sym
 {
-T 42000 43100 5 10 0 0 90 0 1
+T 41600 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 42300 43900 5 10 1 1 90 0 1
+T 41900 43900 5 10 1 1 90 0 1
 netname=spi_mosi
 }
-C 40800 43000 1 0 0 3.3V-plus-1.sym
-C 40900 41300 1 0 0 gnd-1.sym
-C 42500 43800 1 270 0 input-1.sym
+C 40400 43000 1 0 0 3.3V-plus-1.sym
+C 40500 41300 1 0 0 gnd-1.sym
+C 42100 43800 1 270 0 input-1.sym
 {
-T 42800 43800 5 10 0 0 270 0 1
+T 42400 43800 5 10 0 0 270 0 1
 device=INPUT
-T 42700 43900 5 10 1 1 90 0 1
+T 42300 43900 5 10 1 1 90 0 1
 netname=spi_miso
 }
+C 43600 41600 1 180 0 vss-1.sym
 C 44000 41600 1 180 0 vss-1.sym
 C 44400 41600 1 180 0 vss-1.sym
-C 44800 41600 1 180 0 vss-1.sym
+C 43200 43000 1 0 0 vdd-1.sym
 C 43600 43000 1 0 0 vdd-1.sym
 C 44000 43000 1 0 0 vdd-1.sym
-C 44400 43000 1 0 0 vdd-1.sym
-C 41500 43000 1 90 0 output-1.sym
+C 41100 43000 1 90 0 output-1.sym
 {
-T 41200 43100 5 10 0 0 90 0 1
+T 40800 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 41500 43900 5 10 1 1 90 0 1
+T 41100 43900 5 10 1 1 90 0 1
 netname=spi_cs
 }
-C 43100 41100 1 90 0 nc-left-1.sym
+C 42700 41100 1 90 0 nc-left-1.sym
 {
-T 42700 41100 5 10 0 0 90 0 1
-value=NoConnection
 T 42300 41100 5 10 0 0 90 0 1
+value=NoConnection
+T 41900 41100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 43100 43000 1 90 0 nc-right-1.sym
+C 42700 43000 1 90 0 nc-right-1.sym
 {
-T 42600 43100 5 10 0 0 90 0 1
+T 42200 43100 5 10 0 0 90 0 1
 value=NoConnection
-T 42400 43100 5 10 0 0 90 0 1
+T 42000 43100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 44200 48000 1 0 0 input-1.sym
+C 43800 48000 1 0 0 input-1.sym
 {
-T 44200 48300 5 10 0 0 0 0 1
+T 43800 48300 5 10 0 0 0 0 1
 device=INPUT
-T 44100 48200 5 10 1 1 180 0 1
+T 43700 48200 5 10 1 1 180 0 1
 netname=spi_mosi
 }
-C 45000 47900 1 180 0 output-1.sym
+C 44600 47900 1 180 0 output-1.sym
 {
-T 44900 47600 5 10 0 0 180 0 1
+T 44500 47600 5 10 0 0 180 0 1
 device=OUTPUT
-T 44100 47900 5 10 1 1 180 0 1
+T 43700 47900 5 10 1 1 180 0 1
 netname=spi_miso
 }
-C 44200 48300 1 0 0 input-1.sym
+C 43800 48300 1 0 0 input-1.sym
 {
-T 44200 48600 5 10 0 0 0 0 1
+T 43800 48600 5 10 0 0 0 0 1
 device=INPUT
-T 44100 48500 5 10 1 1 180 0 1
+T 43700 48500 5 10 1 1 180 0 1
 netname=spi_clk
 }
-C 44200 48600 1 0 0 input-1.sym
+C 43800 48600 1 0 0 input-1.sym
 {
-T 44200 48900 5 10 0 0 0 0 1
+T 43800 48900 5 10 0 0 0 0 1
 device=INPUT
-T 44100 48800 5 10 1 1 180 0 1
+T 43700 48800 5 10 1 1 180 0 1
 netname=spi_cs
 }
 C 49300 48500 1 0 0 nc-top-1.sym
@@ -132,106 +132,106 @@ device=DRC_Directive
 }
 C 48500 46500 1 90 0 vss-1.sym
 C 48500 44800 1 90 0 vss-1.sym
-N 54100 48000 54100 46800 4
-N 54100 46500 54100 45600 4
+N 54100 47900 54100 46700 4
+N 54100 46400 54100 45500 4
 N 51300 44100 52200 44100 4
 N 49800 44100 51000 44100 4
-C 55900 45300 1 0 0 connector4-2.sym
+C 55900 45200 1 0 0 connector4-2.sym
 {
-T 56500 47400 5 10 1 1 0 6 1
+T 56500 47300 5 10 1 1 0 6 1
 refdes=J2
-T 56200 47350 5 10 0 0 0 0 1
+T 56200 47250 5 10 0 0 0 0 1
 device=CONNECTOR_4
-T 56200 47550 5 10 0 0 0 0 1
+T 56200 47450 5 10 0 0 0 0 1
 footprint=SIP4N
 }
-N 54100 46900 55900 46900 4
-N 53900 46500 55900 46500 4
-N 55900 46100 55800 46100 4
-N 55800 46100 55800 42500 4
+N 54100 46800 55900 46800 4
+N 53900 46400 55900 46400 4
+N 55900 46000 55800 46000 4
+N 55800 46000 55800 42500 4
 N 55800 42500 51300 42500 4
-N 55900 45700 55900 42400 4
+N 55900 45600 55900 42400 4
 N 51000 42400 55900 42400 4
 N 50200 48500 50800 48500 4
-C 52300 50500 1 0 0 vdd-1.sym
-C 52400 49600 1 90 0 capacitor-1.sym
+C 52300 50200 1 0 0 vdd-1.sym
+C 52400 49300 1 90 0 capacitor-1.sym
 {
-T 51700 49800 5 10 0 0 90 0 1
+T 51700 49500 5 10 0 0 90 0 1
 device=CAPACITOR
-T 51900 50200 5 10 1 1 0 0 1
-refdes=C3
-T 51500 49800 5 10 0 0 90 0 1
+T 51900 49900 5 10 1 1 0 0 1
+refdes=C7
+T 51500 49500 5 10 0 0 90 0 1
 symversion=0.1
-T 52150 49950 5 10 1 1 180 0 1
+T 52150 49650 5 10 1 1 180 0 1
 value=100n
-T 52150 49750 5 10 1 1 180 0 1
+T 52150 49450 5 10 1 1 180 0 1
 value=16v
 }
-C 54000 50700 1 180 0 capacitor-1.sym
+C 54000 50400 1 180 0 capacitor-1.sym
 {
-T 53800 50000 5 10 0 0 180 0 1
+T 53800 49700 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53200 50550 5 10 1 1 0 0 1
-refdes=C4
-T 53800 49800 5 10 0 0 180 0 1
+T 53200 50250 5 10 1 1 0 0 1
+refdes=C8
+T 53800 49500 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 50550 5 10 1 1 0 0 1
+T 53700 50250 5 10 1 1 0 0 1
 value=100n
-T 53750 50300 5 10 1 1 0 0 1
+T 53750 50000 5 10 1 1 0 0 1
 value=50v
 }
-C 51300 50300 1 180 0 capacitor-1.sym
+C 51300 50400 1 180 0 capacitor-1.sym
 {
-T 51100 49600 5 10 0 0 180 0 1
+T 51100 49700 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50500 50150 5 10 1 1 0 0 1
-refdes=C1
-T 51100 49400 5 10 0 0 180 0 1
+T 50500 50250 5 10 1 1 0 0 1
+refdes=C4
+T 51100 49500 5 10 0 0 180 0 1
 symversion=0.1
-T 51500 50300 5 10 1 1 180 0 1
+T 51500 50400 5 10 1 1 180 0 1
 value=470nF
 }
-C 50400 49500 1 180 0 vss-1.sym
-C 51300 49700 1 180 0 capacitor-1.sym
+C 50400 49600 1 180 0 vss-1.sym
+C 51300 49800 1 180 0 capacitor-1.sym
 {
-T 51100 49000 5 10 0 0 180 0 1
+T 51100 49100 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50500 49550 5 10 1 1 0 0 1
-refdes=C2
-T 51100 48800 5 10 0 0 180 0 1
+T 50500 49650 5 10 1 1 0 0 1
+refdes=C5
+T 51100 48900 5 10 0 0 180 0 1
 symversion=0.1
-T 51350 49700 5 10 1 1 180 0 1
+T 51350 49800 5 10 1 1 180 0 1
 value=100n
 }
-N 51300 49500 51300 48500 4
-C 54800 49200 1 180 0 vss-1.sym
+N 51300 49600 51300 48500 4
+C 54600 49000 1 180 0 vss-1.sym
 C 52800 43000 1 90 0 resistor-1.sym
 {
 T 52400 43300 5 10 0 0 90 0 1
 device=RESISTOR
-T 52500 43600 5 10 1 1 180 0 1
-refdes=R1
-T 52200 43200 5 10 1 1 0 0 1
-value=22R
+T 52550 43650 5 10 1 1 180 0 1
+refdes=R2
+T 52325 43300 5 10 1 1 0 0 1
+value=22
 }
 C 54300 44900 1 0 0 resistor-1.sym
 {
 T 54600 45300 5 10 0 0 0 0 1
 device=RESISTOR
-T 54600 45200 5 10 1 1 0 0 1
-refdes=R2
-T 55000 45200 5 10 1 1 0 0 1
-value=22R
+T 54450 45150 5 10 1 1 0 0 1
+refdes=R3
+T 54800 45150 5 10 1 1 0 0 1
+value=22
 }
 C 54500 43800 1 90 0 capacitor-1.sym
 {
 T 53800 44000 5 10 0 0 90 0 1
 device=CAPACITOR
-T 54600 44600 5 10 1 1 180 0 1
-refdes=C8
+T 54700 44500 5 10 1 1 180 0 1
+refdes=C12
 T 53600 44000 5 10 0 0 90 0 1
 symversion=0.1
-T 54400 43900 5 10 1 1 0 0 1
+T 54350 44000 5 10 1 1 0 0 1
 value=10nF
 }
 N 51300 42500 51300 44300 4
@@ -239,11 +239,11 @@ C 53900 44000 1 180 0 capacitor-1.sym
 {
 T 53700 43300 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53600 44200 5 10 1 1 180 0 1
-refdes=C7
+T 53350 44000 5 10 1 1 180 0 1
+refdes=C11
 T 53700 43100 5 10 0 0 180 0 1
 symversion=0.1
-T 53300 43400 5 10 1 1 0 0 1
+T 53550 43850 5 10 1 1 0 0 1
 value=10nF
 }
 N 53900 44700 55200 44700 4
@@ -258,9 +258,9 @@ C 53000 42900 1 0 0 resistor-1.sym
 {
 T 53300 43300 5 10 0 0 0 0 1
 device=RESISTOR
-T 53400 43150 5 10 1 1 0 0 1
-refdes=R3
-T 53250 42700 5 10 1 1 0 0 1
+T 53100 42700 5 10 1 1 0 0 1
+refdes=R4
+T 53475 42700 5 10 1 1 0 0 1
 value=.075
 T 53000 42900 5 10 0 1 0 0 1
 description=1% 2W Thick Film
@@ -270,9 +270,9 @@ C 55300 43800 1 90 0 resistor-1.sym
 {
 T 54900 44100 5 10 0 0 90 0 1
 device=RESISTOR
-T 55050 44350 5 10 1 1 180 0 1
-refdes=R4
-T 55650 44350 5 10 1 1 180 0 1
+T 55600 44450 5 10 1 1 180 0 1
+refdes=R5
+T 55650 44150 5 10 1 1 180 0 1
 value=.075
 T 55300 43800 5 10 0 1 0 0 1
 description=1% 2W Thick Film
@@ -285,173 +285,162 @@ N 50400 44300 50400 44100 4
 N 50700 44300 50700 44100 4
 N 51600 44300 51600 44100 4
 N 51900 44300 51900 44100 4
-N 53900 48000 54100 48000 4
-N 53900 47700 54100 47700 4
-N 53900 47400 54100 47400 4
-N 54100 47100 53900 47100 4
-N 53900 46800 54100 46800 4
-N 53900 46200 54100 46200 4
-N 53900 45900 54100 45900 4
-N 53900 45600 54100 45600 4
-N 52200 49600 52200 48500 4
-N 52500 48500 52500 50500 4
-N 52200 50500 53100 50500 4
-N 54000 50500 54600 50500 4
-C 54000 49900 1 180 0 capacitor-1.sym
-{
-T 53800 49200 5 10 0 0 180 0 1
+N 53900 47900 54100 47900 4
+N 53900 47600 54100 47600 4
+N 53900 47300 54100 47300 4
+N 54100 47000 53900 47000 4
+N 53900 46700 54100 46700 4
+N 53900 46100 54100 46100 4
+N 53900 45800 54100 45800 4
+N 53900 45500 54100 45500 4
+N 52200 49300 52200 48500 4
+N 52500 48500 52500 50200 4
+N 52200 50200 53100 50200 4
+N 54000 50200 54400 50200 4
+C 54000 49800 1 180 0 capacitor-1.sym
+{
+T 53800 49100 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53200 49750 5 10 1 1 0 0 1
-refdes=C5
-T 53800 49000 5 10 0 0 180 0 1
+T 53200 49650 5 10 1 1 0 0 1
+refdes=C9
+T 53800 48900 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 49750 5 10 1 1 0 0 1
+T 53700 49650 5 10 1 1 0 0 1
 value=10uF
-T 53700 49550 5 10 1 1 0 0 1
+T 53750 49400 5 10 1 1 0 0 1
 value=50v
 }
-C 54000 49400 1 180 0 capacitor-1.sym
+C 54000 49200 1 180 0 capacitor-1.sym
 {
-T 53800 48700 5 10 0 0 180 0 1
-device=CAPACITOR
-T 53200 49250 5 10 1 1 0 0 1
-refdes=C6
 T 53800 48500 5 10 0 0 180 0 1
+device=CAPACITOR
+T 53100 49050 5 10 1 1 0 0 1
+refdes=C10
+T 53800 48300 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 49250 5 10 1 1 0 0 1
+T 53700 49050 5 10 1 1 0 0 1
 value=10uF
-T 53700 49000 5 10 1 1 0 0 1
+T 53750 48800 5 10 1 1 0 0 1
 value=50v
 }
-N 53100 49200 53100 48500 4
-N 52800 48500 52800 49700 4
-N 52800 49700 53100 49700 4
-N 54600 50500 54600 49200 4
-N 54000 49200 54600 49200 4
-N 54000 49700 54600 49700 4
-N 51700 48500 51700 50500 4
-N 51700 50100 51300 50100 4
-N 50200 50100 50200 49500 4
-N 50200 49500 50400 49500 4
-N 50200 50100 50400 50100 4
-C 42700 40800 1 90 0 input-1.sym
-{
-T 42400 40800 5 10 0 0 90 0 1
+N 53100 49000 53100 48500 4
+N 52800 48500 52800 49600 4
+N 52800 49600 53100 49600 4
+N 54400 50200 54400 49000 4
+N 54000 49000 54400 49000 4
+N 54000 49600 54400 49600 4
+N 51700 48500 51700 50200 4
+N 51700 50200 51300 50200 4
+N 50200 50200 50200 49600 4
+N 50200 49600 50400 49600 4
+N 50200 50200 50400 50200 4
+C 42300 40800 1 90 0 input-1.sym
+{
+T 42000 40800 5 10 0 0 90 0 1
 device=INPUT
-T 42500 40700 5 10 1 1 270 0 1
+T 42100 40700 5 10 1 1 270 0 1
 netname=fault
 }
-C 44700 47300 1 270 0 gnd-1.sym
-C 45000 47100 1 0 0 Si8441.sym
+C 44300 47300 1 270 0 gnd-1.sym
+C 44600 47100 1 0 0 Si8441.sym
 {
-T 46600 49600 5 10 1 1 0 0 1
+T 46200 49600 5 10 1 1 0 0 1
 refdes=U1
-T 46300 47995 5 10 1 1 90 0 1
+T 45900 47995 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44700 49100 1 270 0 gnd-1.sym
-C 45000 49100 1 90 0 3.3V-plus-1.sym
-C 44500 47400 1 0 0 nc-left-1.sym
+C 44100 48900 1 0 0 gnd-1.sym
+C 44000 50100 1 0 0 3.3V-plus-1.sym
+C 44100 47400 1 0 0 nc-left-1.sym
 {
-T 44500 47800 5 10 0 0 0 0 1
+T 44100 47800 5 10 0 0 0 0 1
 value=NoConnection
-T 44500 48200 5 10 0 0 0 0 1
+T 44100 48200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51500 50500 1 0 0 5V-plus-1.sym
-C 47200 49500 1 270 0 5V-plus-1.sym
-C 47200 49200 1 270 0 vdd-1.sym
-C 47200 47400 1 270 0 vdd-1.sym
-C 47200 47400 1 0 0 nc-right-1.sym
+C 51500 50200 1 0 0 5V-plus-1.sym
+C 47000 50000 1 0 0 5V-plus-1.sym
+C 47400 49100 1 180 0 vdd-1.sym
+C 46800 47400 1 270 0 vdd-1.sym
+C 46800 47400 1 0 0 nc-right-1.sym
 {
-T 47300 47900 5 10 0 0 0 0 1
+T 46900 47900 5 10 0 0 0 0 1
 value=NoConnection
-T 47300 48100 5 10 0 0 0 0 1
+T 46900 48100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 44200 44900 1 0 0 input-1.sym
+C 43800 44500 1 0 0 input-1.sym
 {
-T 44200 45200 5 10 0 0 0 0 1
+T 43800 44800 5 10 0 0 0 0 1
 device=INPUT
-T 44100 45100 5 10 1 1 180 0 1
+T 43700 44700 5 10 1 1 180 0 1
 netname=step
 }
-C 45000 44800 1 180 0 output-1.sym
+C 44600 44400 1 180 0 output-1.sym
 {
-T 44900 44500 5 10 0 0 180 0 1
+T 44500 44100 5 10 0 0 180 0 1
 device=OUTPUT
-T 44100 44800 5 10 1 1 180 0 1
+T 43700 44400 5 10 1 1 180 0 1
 netname=fault
 }
-C 44200 45200 1 0 0 input-1.sym
+C 43800 44800 1 0 0 input-1.sym
 {
-T 44200 45500 5 10 0 0 0 0 1
+T 43800 45100 5 10 0 0 0 0 1
 device=INPUT
-T 44100 45400 5 10 1 1 180 0 1
+T 43700 45000 5 10 1 1 180 0 1
 netname=dir
 }
-C 44200 45500 1 0 0 input-1.sym
+C 43800 45100 1 0 0 input-1.sym
 {
-T 44200 45800 5 10 0 0 0 0 1
+T 43800 45400 5 10 0 0 0 0 1
 device=INPUT
-T 44100 45700 5 10 1 1 180 0 1
+T 43700 45300 5 10 1 1 180 0 1
 netname=enable
 }
-C 44700 44200 1 270 0 gnd-1.sym
-C 45000 44000 1 0 0 Si8441.sym
+C 44300 43800 1 270 0 gnd-1.sym
+C 44600 43600 1 0 0 Si8441.sym
 {
-T 46600 46500 5 10 1 1 0 0 1
+T 46200 46100 5 10 1 1 0 0 1
 refdes=U2
-T 46300 44895 5 10 1 1 90 0 1
+T 45900 44495 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44700 46000 1 270 0 gnd-1.sym
-C 45000 46000 1 90 0 3.3V-plus-1.sym
-C 44500 44300 1 0 0 nc-left-1.sym
+C 44100 43900 1 0 0 nc-left-1.sym
 {
-T 44500 44700 5 10 0 0 0 0 1
+T 44100 44300 5 10 0 0 0 0 1
 value=NoConnection
-T 44500 45100 5 10 0 0 0 0 1
+T 44100 44700 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 47200 46400 1 270 0 5V-plus-1.sym
-C 47200 46100 1 270 0 vdd-1.sym
-C 47200 44300 1 270 0 vdd-1.sym
-C 47200 44300 1 0 0 nc-right-1.sym
+C 46800 43900 1 270 0 vdd-1.sym
+C 46800 43900 1 0 0 nc-right-1.sym
 {
-T 47300 44800 5 10 0 0 0 0 1
+T 46900 44400 5 10 0 0 0 0 1
 value=NoConnection
-T 47300 45000 5 10 0 0 0 0 1
+T 46900 44600 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 48500 44300 1 0 0 TMC2660.sym
-{
-T 50895 46295 5 10 1 1 0 0 1
-footprint=QFP44
-T 53595 48395 5 10 1 1 0 0 1
-refdes=U3
-}
-N 47200 45600 47700 45600 4
-N 47700 45600 47700 46400 4
+N 46800 45200 47700 45200 4
+N 47700 45200 47700 46400 4
 N 47700 46400 48500 46400 4
-N 47200 45300 47800 45300 4
-N 47800 45300 47800 46000 4
+N 46800 44900 47800 44900 4
+N 47800 44900 47800 46000 4
 N 47800 46000 48500 46000 4
-N 47200 45000 47900 45000 4
-N 47900 45000 47900 45700 4
+N 46800 44600 47900 44600 4
+N 47900 44600 47900 45700 4
 N 47900 45700 48500 45700 4
-N 47200 44700 48500 44700 4
-N 47200 47800 48000 47800 4
-N 48000 47800 48000 47100 4
-N 48000 47100 48500 47100 4
-N 47200 48100 48100 48100 4
-N 48100 48100 48100 47400 4
-N 48100 47400 48500 47400 4
-N 47200 48400 48200 48400 4
-N 48200 48400 48200 47700 4
-N 48200 47700 48500 47700 4
-N 47200 48700 48300 48700 4
-N 48300 48700 48300 48000 4
+N 46800 44300 48000 44300 4
+N 46800 47800 47700 47800 4
+N 47700 47800 47700 47100 4
+N 47700 47100 48500 47100 4
+N 46800 48100 47800 48100 4
+N 47800 48100 47800 47400 4
+N 47800 47400 48500 47400 4
+N 46800 48400 47900 48400 4
+N 47900 48400 47900 47700 4
+N 47900 47700 48500 47700 4
+N 46800 48700 48000 48700 4
+N 48000 48700 48000 48000 4
 T 53900 40100 9 10 1 0 0 0 1
 Joseph Coffland
 T 53800 40400 9 10 1 0 0 0 1
@@ -460,20 +449,127 @@ T 50000 40100 9 10 1 0 0 0 1
 1
 T 51500 40100 9 10 1 0 0 0 1
 1
-N 51300 49500 51700 49500 4
+N 51300 49600 51700 49600 4
 N 52200 44300 52200 44100 4
-N 48300 48000 48500 48000 4
-C 43500 41100 1 90 0 nc-left-1.sym
+N 48000 48000 48500 48000 4
+C 43100 41100 1 90 0 nc-left-1.sym
 {
-T 43100 41100 5 10 0 0 90 0 1
-value=NoConnection
 T 42700 41100 5 10 0 0 90 0 1
+value=NoConnection
+T 42300 41100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 43500 43000 1 90 0 nc-right-1.sym
+C 43100 43000 1 90 0 nc-right-1.sym
 {
-T 43000 43100 5 10 0 0 90 0 1
+T 42600 43100 5 10 0 0 90 0 1
 value=NoConnection
-T 42800 43100 5 10 0 0 90 0 1
+T 42400 43100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
+C 41200 48700 1 270 0 led-1.sym
+{
+T 41800 47900 5 10 0 0 270 0 1
+device=LED
+T 42000 47900 5 10 0 0 270 0 1
+symversion=0.1
+T 40700 48200 5 10 1 1 0 0 1
+refdes=LED1
+T 41200 48700 5 10 0 0 0 0 1
+model=LG R971-KN-1
+T 41200 48700 5 10 0 0 0 0 1
+footprint=0805
+T 41200 48700 5 10 0 0 0 0 1
+description=green
+}
+C 41300 49600 1 270 0 resistor-1.sym
+{
+T 41700 49300 5 10 0 0 270 0 1
+device=RESISTOR
+T 41000 49100 5 10 1 1 0 0 1
+refdes=R1
+T 41500 49100 5 10 1 1 0 0 1
+value=150
+}
+C 41200 49600 1 0 0 5V-plus-1.sym
+C 41600 47800 1 180 0 vdd-1.sym
+C 47400 49100 1 90 0 capacitor-1.sym
+{
+T 46700 49300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 47500 49900 5 10 1 1 180 0 1
+refdes=C2
+T 46500 49300 5 10 0 0 90 0 1
+symversion=0.1
+T 47250 49200 5 10 1 1 0 0 1
+value=1uF
+}
+N 46800 49300 46900 49300 4
+N 46900 49000 46800 49000 4
+N 46900 49300 46900 50000 4
+N 46900 50000 47200 50000 4
+C 47400 45600 1 90 0 capacitor-1.sym
+{
+T 46700 45800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 47500 46350 5 10 1 1 180 0 1
+refdes=C6
+T 46500 45800 5 10 0 0 90 0 1
+symversion=0.1
+T 47250 45750 5 10 1 1 0 0 1
+value=1uF
+}
+C 47000 46500 1 0 0 5V-plus-1.sym
+C 47400 45600 1 180 0 vdd-1.sym
+N 48000 44700 48000 44300 4
+N 46800 45500 46900 45500 4
+N 46900 45500 46900 45600 4
+N 46900 45600 47200 45600 4
+N 46800 45800 46900 45800 4
+N 46900 45800 46900 46500 4
+N 46900 46500 47200 46500 4
+N 46900 49000 46900 49100 4
+N 46900 49100 47200 49100 4
+C 44400 49200 1 90 0 capacitor-1.sym
+{
+T 43700 49400 5 10 0 0 90 0 1
+device=CAPACITOR
+T 43500 49400 5 10 0 0 90 0 1
+symversion=0.1
+T 44150 49950 5 10 1 1 180 0 1
+refdes=C1
+T 43850 49350 5 10 1 1 0 0 1
+value=1uF
+}
+N 44600 49000 44500 49000 4
+N 44500 49000 44500 49200 4
+N 44500 49200 44200 49200 4
+N 44600 49300 44500 49300 4
+N 44500 49300 44500 50100 4
+N 44500 50100 44200 50100 4
+C 44400 45700 1 90 0 capacitor-1.sym
+{
+T 43700 45900 5 10 0 0 90 0 1
+device=CAPACITOR
+T 43500 45900 5 10 0 0 90 0 1
+symversion=0.1
+T 44150 46450 5 10 1 1 180 0 1
+refdes=C3
+T 43850 45850 5 10 1 1 0 0 1
+value=1uF
+}
+C 44100 45400 1 0 0 gnd-1.sym
+C 44000 46600 1 0 0 3.3V-plus-1.sym
+N 44600 45500 44500 45500 4
+N 44500 45500 44500 45700 4
+N 44500 45700 44200 45700 4
+N 44200 46600 44500 46600 4
+N 44500 46600 44500 45800 4
+N 44500 45800 44600 45800 4
+N 48000 44700 48500 44700 4
+C 48500 44300 1 0 0 TMC2660.sym
+{
+T 50895 46295 5 10 1 1 0 0 1
+footprint=QFP44
+T 53495 48295 5 10 1 1 0 0 1
+refdes=U3
+}

diff --git a/electronics/symbols/TMC2660.sym b/electronics/symbols/TMC2660.sym
index 9440660dfe1fe07f2e9da2459f96cd64fd038d90..9f92b93d6f2954f7ac696094b390c08cf5fa6a95 100644 (file)
--- a/electronics/symbols/TMC2660.sym
+++ b/electronics/symbols/TMC2660.sym
@@ -130,103 +130,103 @@ pinlabel=BRB
 T 4150 205 5 10 1 1 90 6 1
 pinnumber=25
 }
-P 5400 3700 5100 3700 1 0 0
+P 5400 3600 5100 3600 1 0 0
 {
-T 5400 3700 5 10 0 0 0 0 1
+T 5400 3600 5 10 0 0 0 0 1
 pintype=pas
-T 5400 3700 5 10 0 0 0 0 1
+T 5400 3600 5 10 0 0 0 0 1
 pinseq=1
-T 5045 3695 5 10 1 1 0 6 1
+T 5045 3595 5 10 1 1 0 6 1
 pinlabel=NC
-T 5195 3745 5 10 1 1 0 0 1
+T 5195 3645 5 10 1 1 0 0 1
 pinnumber=1
 }
-P 5400 3400 5100 3400 1 0 0
+P 5400 3300 5100 3300 1 0 0
 {
-T 5400 3400 5 10 0 0 0 0 1
+T 5400 3300 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 3400 5 10 0 0 0 0 1
+T 5400 3300 5 10 0 0 0 0 1
 pinseq=2
-T 5045 3395 5 10 1 1 0 6 1
+T 5045 3295 5 10 1 1 0 6 1
 pinlabel=OA1
-T 5195 3445 5 10 1 1 0 0 1
+T 5195 3345 5 10 1 1 0 0 1
 pinnumber=2
 }
-P 5400 3100 5100 3100 1 0 0
+P 5400 3000 5100 3000 1 0 0
 {
-T 5400 3100 5 10 0 0 0 0 1
+T 5400 3000 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 3100 5 10 0 0 0 0 1
+T 5400 3000 5 10 0 0 0 0 1
 pinseq=3
-T 5045 3095 5 10 1 1 0 6 1
+T 5045 2995 5 10 1 1 0 6 1
 pinlabel=OA1
-T 5195 3145 5 10 1 1 0 0 1
+T 5195 3045 5 10 1 1 0 0 1
 pinnumber=3
 }
-P 5400 2800 5100 2800 1 0 0
+P 5400 2700 5100 2700 1 0 0
 {
-T 5400 2800 5 10 0 0 0 0 1
+T 5400 2700 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 2800 5 10 0 0 0 0 1
+T 5400 2700 5 10 0 0 0 0 1
 pinseq=7
-T 5195 2845 5 10 1 1 0 0 1
+T 5195 2745 5 10 1 1 0 0 1
 pinnumber=7
-T 5045 2795 5 10 1 1 0 6 1
+T 5045 2695 5 10 1 1 0 6 1
 pinlabel=OA1
 }
-P 5400 2500 5100 2500 1 0 0
+P 5400 2400 5100 2400 1 0 0
 {
-T 5400 2500 5 10 0 0 0 0 1
+T 5400 2400 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 2500 5 10 0 0 0 0 1
+T 5400 2400 5 10 0 0 0 0 1
 pinseq=8
-T 5045 2495 5 10 1 1 0 6 1
+T 5045 2395 5 10 1 1 0 6 1
 pinlabel=OA1
-T 5195 2545 5 10 1 1 0 0 1
+T 5195 2445 5 10 1 1 0 0 1
 pinnumber=8
 }
-P 5400 2200 5100 2200 1 0 0
+P 5400 2100 5100 2100 1 0 0
 {
-T 5400 2200 5 10 0 0 0 0 1
+T 5400 2100 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 2200 5 10 0 0 0 0 1
+T 5400 2100 5 10 0 0 0 0 1
 pinseq=5
-T 5195 2245 5 10 1 1 0 0 1
+T 5195 2145 5 10 1 1 0 0 1
 pinnumber=5
-T 5045 2195 5 10 1 1 0 6 1
+T 5045 2095 5 10 1 1 0 6 1
 pinlabel=OA2
 }
-P 5400 1900 5100 1900 1 0 0
+P 5400 1800 5100 1800 1 0 0
 {
-T 5400 1900 5 10 0 0 0 0 1
+T 5400 1800 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 1900 5 10 0 0 0 0 1
+T 5400 1800 5 10 0 0 0 0 1
 pinseq=6
-T 5045 1895 5 10 1 1 0 6 1
+T 5045 1795 5 10 1 1 0 6 1
 pinlabel=OA2
-T 5195 1945 5 10 1 1 0 0 1
+T 5195 1845 5 10 1 1 0 0 1
 pinnumber=6
 }
-P 5400 1600 5100 1600 1 0 0
+P 5400 1500 5100 1500 1 0 0
 {
-T 5400 1600 5 10 0 0 0 0 1
+T 5400 1500 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 1600 5 10 0 0 0 0 1
+T 5400 1500 5 10 0 0 0 0 1
 pinseq=10
-T 5195 1645 5 10 1 1 0 0 1
+T 5195 1545 5 10 1 1 0 0 1
 pinnumber=10
-T 5045 1595 5 10 1 1 0 6 1
+T 5045 1495 5 10 1 1 0 6 1
 pinlabel=OA2
 }
-P 5400 1300 5100 1300 1 0 0
+P 5400 1200 5100 1200 1 0 0
 {
-T 5400 1300 5 10 0 0 0 0 1
+T 5400 1200 5 10 0 0 0 0 1
 pintype=pwr
-T 5400 1300 5 10 0 0 0 0 1
+T 5400 1200 5 10 0 0 0 0 1
 pinseq=11
-T 5045 1295 5 10 1 1 0 6 1
+T 5045 1195 5 10 1 1 0 6 1
 pinlabel=OA2
-T 5195 1345 5 10 1 1 0 0 1
+T 5195 1245 5 10 1 1 0 0 1
 pinnumber=11
 }
 P 4300 4200 4300 3900 1 0 0