Motor driver tweaks

diff --git a/electronics/motor-driver.sch b/electronics/motor-driver.sch
index e6f77b2bce74d724616557d9898939cf62d8ad86..72530c08118c5fa30d8966479bb0321976bafe39 100644 (file)
--- a/electronics/motor-driver.sch
+++ b/electronics/motor-driver.sch
@@ -2,460 +2,456 @@ v 20130925 2
 C 40000 40000 0 0 0 title-B.sym
 T 50000 40700 9 10 1 0 0 0 1
 Motor Driver
-C 41600 40300 1 0 0 header20-1.sym
+C 44800 41600 1 90 0 header20-1.sym
 {
-T 41800 40050 5 10 0 1 0 0 1
+T 45050 41800 5 10 0 1 90 0 1
 device=HEADER20
-T 42200 44400 5 10 1 1 0 0 1
-refdes=J?
+T 40700 42400 5 10 1 1 180 0 1
+refdes=J1
 }
-C 43000 43200 1 0 0 output-1.sym
+C 41900 43000 1 90 0 output-1.sym
 {
-T 43100 43500 5 10 0 0 0 0 1
+T 41600 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 43900 43200 5 10 1 1 0 0 1
+T 41900 43900 5 10 1 1 90 0 1
 netname=spi_clk
 }
-C 41600 43800 1 180 0 output-1.sym
+C 41300 41600 1 270 0 output-1.sym
 {
-T 41500 43500 5 10 0 0 180 0 1
+T 41600 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 40200 43600 5 10 1 1 0 0 1
+T 41500 40200 5 10 1 1 90 0 1
 netname=enable
 }
-C 41600 43400 1 180 0 output-1.sym
+C 41700 41600 1 270 0 output-1.sym
 {
-T 41500 43100 5 10 0 0 180 0 1
+T 42000 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 40500 43200 5 10 1 1 0 0 1
+T 41900 40500 5 10 1 1 90 0 1
 netname=dir
 }
-C 41600 43000 1 180 0 output-1.sym
+C 42100 41600 1 270 0 output-1.sym
 {
-T 41500 42700 5 10 0 0 180 0 1
+T 42400 41500 5 10 0 0 270 0 1
 device=OUTPUT
-T 40400 42800 5 10 1 1 0 0 1
+T 42300 40400 5 10 1 1 90 0 1
 netname=step
 }
-C 43000 42800 1 0 0 output-1.sym
+C 42300 43000 1 90 0 output-1.sym
 {
-T 43100 43100 5 10 0 0 0 0 1
+T 42000 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 43900 42800 5 10 1 1 0 0 1
+T 42300 43900 5 10 1 1 90 0 1
 netname=spi_mosi
 }
-C 43000 44300 1 270 0 3.3V-plus-1.sym
-C 41300 44200 1 270 0 gnd-1.sym
-C 43800 42600 1 180 0 input-1.sym
+C 40800 43000 1 0 0 3.3V-plus-1.sym
+C 40900 41300 1 0 0 gnd-1.sym
+C 42500 43800 1 270 0 input-1.sym
 {
-T 43800 42300 5 10 0 0 180 0 1
+T 42800 43800 5 10 0 0 270 0 1
 device=INPUT
-T 43900 42400 5 10 1 1 0 0 1
+T 42700 43900 5 10 1 1 90 0 1
 netname=spi_miso
 }
-C 41600 41500 1 90 0 vss-1.sym
-C 41600 41100 1 90 0 vss-1.sym
-C 41600 40700 1 90 0 vss-1.sym
-C 41600 40300 1 90 0 vss-1.sym
-C 43000 41900 1 270 0 vdd-1.sym
-C 43000 41500 1 270 0 vdd-1.sym
-C 43000 41100 1 270 0 vdd-1.sym
-C 43000 40700 1 270 0 vdd-1.sym
-C 43000 43600 1 0 0 output-1.sym
-{
-T 43100 43900 5 10 0 0 0 0 1
+C 44000 41600 1 180 0 vss-1.sym
+C 44400 41600 1 180 0 vss-1.sym
+C 44800 41600 1 180 0 vss-1.sym
+C 43600 43000 1 0 0 vdd-1.sym
+C 44000 43000 1 0 0 vdd-1.sym
+C 44400 43000 1 0 0 vdd-1.sym
+C 41500 43000 1 90 0 output-1.sym
+{
+T 41200 43100 5 10 0 0 90 0 1
 device=OUTPUT
-T 43900 43600 5 10 1 1 0 0 1
+T 41500 43900 5 10 1 1 90 0 1
 netname=spi_cs
 }
-C 41100 42000 1 0 0 nc-left-1.sym
+C 43100 41100 1 90 0 nc-left-1.sym
 {
-T 41100 42400 5 10 0 0 0 0 1
+T 42700 41100 5 10 0 0 90 0 1
 value=NoConnection
-T 41100 42800 5 10 0 0 0 0 1
+T 42300 41100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 43000 42000 1 0 0 nc-right-1.sym
+C 43100 43000 1 90 0 nc-right-1.sym
 {
-T 43100 42500 5 10 0 0 0 0 1
+T 42600 43100 5 10 0 0 90 0 1
 value=NoConnection
-T 43100 42700 5 10 0 0 0 0 1
+T 42400 43100 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 44400 48000 1 0 0 input-1.sym
+C 44200 48000 1 0 0 input-1.sym
 {
-T 44400 48300 5 10 0 0 0 0 1
+T 44200 48300 5 10 0 0 0 0 1
 device=INPUT
-T 44300 48200 5 10 1 1 180 0 1
+T 44100 48200 5 10 1 1 180 0 1
 netname=spi_mosi
 }
-C 45200 47900 1 180 0 output-1.sym
+C 45000 47900 1 180 0 output-1.sym
 {
-T 45100 47600 5 10 0 0 180 0 1
+T 44900 47600 5 10 0 0 180 0 1
 device=OUTPUT
-T 44300 47900 5 10 1 1 180 0 1
+T 44100 47900 5 10 1 1 180 0 1
 netname=spi_miso
 }
-C 44400 48300 1 0 0 input-1.sym
+C 44200 48300 1 0 0 input-1.sym
 {
-T 44400 48600 5 10 0 0 0 0 1
+T 44200 48600 5 10 0 0 0 0 1
 device=INPUT
-T 44300 48500 5 10 1 1 180 0 1
+T 44100 48500 5 10 1 1 180 0 1
 netname=spi_clk
 }
-C 44400 48600 1 0 0 input-1.sym
+C 44200 48600 1 0 0 input-1.sym
 {
-T 44400 48900 5 10 0 0 0 0 1
+T 44200 48900 5 10 0 0 0 0 1
 device=INPUT
-T 44300 48800 5 10 1 1 180 0 1
+T 44100 48800 5 10 1 1 180 0 1
 netname=spi_cs
 }
-C 49500 48500 1 0 0 nc-top-1.sym
+C 49300 48500 1 0 0 nc-top-1.sym
 {
-T 49900 49000 5 10 0 0 0 0 1
+T 49700 49000 5 10 0 0 0 0 1
 value=NoConnection
-T 49900 49200 5 10 0 0 0 0 1
+T 49700 49200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 49800 48500 1 0 0 nc-top-1.sym
+C 49600 48500 1 0 0 nc-top-1.sym
 {
-T 50200 49000 5 10 0 0 0 0 1
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 value=NoConnection
-T 50200 49200 5 10 0 0 0 0 1
+T 50000 49200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 50500 48500 1 0 0 vss-1.sym
-C 48200 45200 1 0 0 nc-left-1.sym
+C 50300 48500 1 0 0 vss-1.sym
+C 48000 45200 1 0 0 nc-left-1.sym
 {
-T 48200 45600 5 10 0 0 0 0 1
+T 48000 45600 5 10 0 0 0 0 1
 value=NoConnection
-T 48200 46000 5 10 0 0 0 0 1
+T 48000 46000 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 48700 46500 1 90 0 vss-1.sym
-C 48700 44800 1 90 0 vss-1.sym
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-N 52400 44100 51500 44100 4
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-C 56100 45300 1 0 0 connector4-2.sym
-{
-T 56800 47400 5 10 1 1 0 6 1
-refdes=CONN?
-T 56400 47350 5 10 0 0 0 0 1
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+N 49800 44100 51000 44100 4
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+{
+T 56500 47400 5 10 1 1 0 6 1
+refdes=J2
+T 56200 47350 5 10 0 0 0 0 1
 device=CONNECTOR_4
-T 56400 47550 5 10 0 0 0 0 1
+T 56200 47550 5 10 0 0 0 0 1
 footprint=SIP4N
 }
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-N 54100 46500 56100 46500 4
-N 56100 46100 56000 46100 4
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-N 56000 42500 52400 42500 4
-N 56100 45700 56100 42400 4
-N 52300 42400 56100 42400 4
-N 50400 48500 51000 48500 4
-C 52500 50500 1 0 0 vdd-1.sym
-C 52600 49600 1 90 0 capacitor-1.sym
-{
-T 51900 49800 5 10 0 0 90 0 1
-device=CAPACITOR
-T 52100 50200 5 10 1 1 0 0 1
-refdes=C?
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+N 51000 42400 55900 42400 4
+N 50200 48500 50800 48500 4
+C 52300 50500 1 0 0 vdd-1.sym
+C 52400 49600 1 90 0 capacitor-1.sym
+{
 T 51700 49800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 51900 50200 5 10 1 1 0 0 1
+refdes=C3
+T 51500 49800 5 10 0 0 90 0 1
 symversion=0.1
-T 52350 49950 5 10 1 1 180 0 1
+T 52150 49950 5 10 1 1 180 0 1
 value=100n
-T 52350 49750 5 10 1 1 180 0 1
+T 52150 49750 5 10 1 1 180 0 1
 value=16v
 }
-C 54200 50700 1 180 0 capacitor-1.sym
+C 54000 50700 1 180 0 capacitor-1.sym
 {
-T 54000 50000 5 10 0 0 180 0 1
+T 53800 50000 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53400 50550 5 10 1 1 0 0 1
-refdes=C?
-T 54000 49800 5 10 0 0 180 0 1
+T 53200 50550 5 10 1 1 0 0 1
+refdes=C4
+T 53800 49800 5 10 0 0 180 0 1
 symversion=0.1
-T 53900 50550 5 10 1 1 0 0 1
+T 53700 50550 5 10 1 1 0 0 1
 value=100n
-T 53950 50300 5 10 1 1 0 0 1
+T 53750 50300 5 10 1 1 0 0 1
 value=50v
 }
-C 51500 50300 1 180 0 capacitor-1.sym
+C 51300 50300 1 180 0 capacitor-1.sym
 {
-T 51300 49600 5 10 0 0 180 0 1
+T 51100 49600 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50700 50150 5 10 1 1 0 0 1
-refdes=C?
-T 51300 49400 5 10 0 0 180 0 1
+T 50500 50150 5 10 1 1 0 0 1
+refdes=C1
+T 51100 49400 5 10 0 0 180 0 1
 symversion=0.1
-T 51700 50300 5 10 1 1 180 0 1
+T 51500 50300 5 10 1 1 180 0 1
 value=470nF
 }
-C 50600 49500 1 180 0 vss-1.sym
-C 51500 49700 1 180 0 capacitor-1.sym
+C 50400 49500 1 180 0 vss-1.sym
+C 51300 49700 1 180 0 capacitor-1.sym
 {
-T 51300 49000 5 10 0 0 180 0 1
+T 51100 49000 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50700 49550 5 10 1 1 0 0 1
-refdes=C?
-T 51300 48800 5 10 0 0 180 0 1
+T 50500 49550 5 10 1 1 0 0 1
+refdes=C2
+T 51100 48800 5 10 0 0 180 0 1
 symversion=0.1
-T 51550 49700 5 10 1 1 180 0 1
+T 51350 49700 5 10 1 1 180 0 1
 value=100n
 }
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-C 55000 49200 1 180 0 vss-1.sym
-C 53000 43000 1 90 0 resistor-1.sym
+N 51300 49500 51300 48500 4
+C 54800 49200 1 180 0 vss-1.sym
+C 52800 43000 1 90 0 resistor-1.sym
 {
-T 52600 43300 5 10 0 0 90 0 1
+T 52400 43300 5 10 0 0 90 0 1
 device=RESISTOR
-T 52700 43600 5 10 1 1 180 0 1
-refdes=R?
-T 52400 43200 5 10 1 1 0 0 1
+T 52500 43600 5 10 1 1 180 0 1
+refdes=R1
+T 52200 43200 5 10 1 1 0 0 1
 value=22R
 }
-C 54500 44900 1 0 0 resistor-1.sym
+C 54300 44900 1 0 0 resistor-1.sym
 {
-T 54800 45300 5 10 0 0 0 0 1
+T 54600 45300 5 10 0 0 0 0 1
 device=RESISTOR
-T 54800 45200 5 10 1 1 0 0 1
-refdes=R?
-T 55200 45200 5 10 1 1 0 0 1
+T 54600 45200 5 10 1 1 0 0 1
+refdes=R2
+T 55000 45200 5 10 1 1 0 0 1
 value=22R
 }
-C 54700 43800 1 90 0 capacitor-1.sym
+C 54500 43800 1 90 0 capacitor-1.sym
 {
-T 54000 44000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 54800 44600 5 10 1 1 180 0 1
-refdes=C?
 T 53800 44000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 54600 44600 5 10 1 1 180 0 1
+refdes=C8
+T 53600 44000 5 10 0 0 90 0 1
 symversion=0.1
-T 54600 43900 5 10 1 1 0 0 1
+T 54400 43900 5 10 1 1 0 0 1
 value=10nF
 }
-N 52400 42500 52400 44300 4
-C 54100 44000 1 180 0 capacitor-1.sym
+N 51300 42500 51300 44300 4
+C 53900 44000 1 180 0 capacitor-1.sym
 {
-T 53900 43300 5 10 0 0 180 0 1
+T 53700 43300 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53800 44200 5 10 1 1 180 0 1
-refdes=C?
-T 53900 43100 5 10 0 0 180 0 1
+T 53600 44200 5 10 1 1 180 0 1
+refdes=C7
+T 53700 43100 5 10 0 0 180 0 1
 symversion=0.1
-T 53500 43400 5 10 1 1 0 0 1
+T 53300 43400 5 10 1 1 0 0 1
 value=10nF
 }
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-N 53200 43000 53200 44300 4
-C 54500 43800 1 180 0 vss-1.sym
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-N 52900 43900 52900 44300 4
-N 53200 43000 52900 43000 4
-N 54500 45000 54100 45000 4
-N 55400 45000 55400 44700 4
-C 53200 42900 1 0 0 resistor-1.sym
-{
-T 53500 43300 5 10 0 0 0 0 1
+N 53900 44700 55200 44700 4
+N 53000 43000 53000 44300 4
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+N 55200 45000 55200 44700 4
+C 53000 42900 1 0 0 resistor-1.sym
+{
+T 53300 43300 5 10 0 0 0 0 1
 device=RESISTOR
-T 53600 43150 5 10 1 1 0 0 1
-refdes=R?
-T 53450 42700 5 10 1 1 0 0 1
+T 53400 43150 5 10 1 1 0 0 1
+refdes=R3
+T 53250 42700 5 10 1 1 0 0 1
 value=.075
-T 53200 42900 5 10 0 1 0 0 1
+T 53000 42900 5 10 0 1 0 0 1
 description=1% 2W Thick Film
 }
-C 54100 43200 1 270 0 vss-1.sym
-C 55500 43800 1 90 0 resistor-1.sym
+C 53900 43200 1 270 0 vss-1.sym
+C 55300 43800 1 90 0 resistor-1.sym
 {
-T 55100 44100 5 10 0 0 90 0 1
+T 54900 44100 5 10 0 0 90 0 1
 device=RESISTOR
-T 55250 44350 5 10 1 1 180 0 1
-refdes=R?
-T 55850 44350 5 10 1 1 180 0 1
+T 55050 44350 5 10 1 1 180 0 1
+refdes=R4
+T 55650 44350 5 10 1 1 180 0 1
 value=.075
-T 55500 43800 5 10 0 1 0 0 1
+T 55300 43800 5 10 0 1 0 0 1
 description=1% 2W Thick Film
 }
-C 55600 43800 1 180 0 vss-1.sym
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-N 52400 50500 53300 50500 4
-N 53900 50500 54800 50500 4
-C 54200 49900 1 180 0 capacitor-1.sym
-{
-T 54000 49200 5 10 0 0 180 0 1
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+{
+T 53800 49200 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53400 49750 5 10 1 1 0 0 1
-refdes=C?
-T 54000 49000 5 10 0 0 180 0 1
+T 53200 49750 5 10 1 1 0 0 1
+refdes=C5
+T 53800 49000 5 10 0 0 180 0 1
 symversion=0.1
-T 53900 49750 5 10 1 1 0 0 1
+T 53700 49750 5 10 1 1 0 0 1
 value=10uF
-T 53900 49550 5 10 1 1 0 0 1
+T 53700 49550 5 10 1 1 0 0 1
 value=50v
 }
-C 54200 49400 1 180 0 capacitor-1.sym
+C 54000 49400 1 180 0 capacitor-1.sym
 {
-T 54000 48700 5 10 0 0 180 0 1
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 device=CAPACITOR
-T 53400 49250 5 10 1 1 0 0 1
-refdes=C?
-T 54000 48500 5 10 0 0 180 0 1
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+T 53800 48500 5 10 0 0 180 0 1
 symversion=0.1
-T 53900 49250 5 10 1 1 0 0 1
+T 53700 49250 5 10 1 1 0 0 1
 value=10uF
-T 53900 49000 5 10 1 1 0 0 1
+T 53700 49000 5 10 1 1 0 0 1
 value=50v
 }
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-{
-T 40800 42700 5 10 0 0 0 0 1
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+{
+T 42400 40800 5 10 0 0 90 0 1
 device=INPUT
-T 40700 42600 5 10 1 1 180 0 1
+T 42500 40700 5 10 1 1 270 0 1
 netname=fault
 }
-C 44900 47300 1 270 0 gnd-1.sym
-C 45200 47100 1 0 0 Si8441.sym
+C 44700 47300 1 270 0 gnd-1.sym
+C 45000 47100 1 0 0 Si8441.sym
 {
-T 46800 49600 5 10 1 1 0 0 1
-refdes=U?
-T 46500 47995 5 10 1 1 90 0 1
+T 46600 49600 5 10 1 1 0 0 1
+refdes=U1
+T 46300 47995 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44900 49100 1 270 0 gnd-1.sym
-C 45200 49100 1 90 0 3.3V-plus-1.sym
-C 44700 47400 1 0 0 nc-left-1.sym
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+C 45000 49100 1 90 0 3.3V-plus-1.sym
+C 44500 47400 1 0 0 nc-left-1.sym
 {
-T 44700 47800 5 10 0 0 0 0 1
+T 44500 47800 5 10 0 0 0 0 1
 value=NoConnection
-T 44700 48200 5 10 0 0 0 0 1
+T 44500 48200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51700 50500 1 0 0 5V-plus-1.sym
-C 47400 49500 1 270 0 5V-plus-1.sym
-C 47400 49200 1 270 0 vdd-1.sym
-C 47400 47400 1 270 0 vdd-1.sym
-C 47400 47400 1 0 0 nc-right-1.sym
+C 51500 50500 1 0 0 5V-plus-1.sym
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+C 47200 47400 1 270 0 vdd-1.sym
+C 47200 47400 1 0 0 nc-right-1.sym
 {
-T 47500 47900 5 10 0 0 0 0 1
+T 47300 47900 5 10 0 0 0 0 1
 value=NoConnection
-T 47500 48100 5 10 0 0 0 0 1
+T 47300 48100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 44400 44900 1 0 0 input-1.sym
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 {
-T 44400 45200 5 10 0 0 0 0 1
+T 44200 45200 5 10 0 0 0 0 1
 device=INPUT
-T 44300 45100 5 10 1 1 180 0 1
+T 44100 45100 5 10 1 1 180 0 1
 netname=step
 }
-C 45200 44800 1 180 0 output-1.sym
+C 45000 44800 1 180 0 output-1.sym
 {
-T 45100 44500 5 10 0 0 180 0 1
+T 44900 44500 5 10 0 0 180 0 1
 device=OUTPUT
-T 44300 44800 5 10 1 1 180 0 1
+T 44100 44800 5 10 1 1 180 0 1
 netname=fault
 }
-C 44400 45200 1 0 0 input-1.sym
+C 44200 45200 1 0 0 input-1.sym
 {
-T 44400 45500 5 10 0 0 0 0 1
+T 44200 45500 5 10 0 0 0 0 1
 device=INPUT
-T 44300 45400 5 10 1 1 180 0 1
+T 44100 45400 5 10 1 1 180 0 1
 netname=dir
 }
-C 44400 45500 1 0 0 input-1.sym
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 {
-T 44400 45800 5 10 0 0 0 0 1
+T 44200 45800 5 10 0 0 0 0 1
 device=INPUT
-T 44300 45700 5 10 1 1 180 0 1
+T 44100 45700 5 10 1 1 180 0 1
 netname=enable
 }
-C 44900 44200 1 270 0 gnd-1.sym
-C 45200 44000 1 0 0 Si8441.sym
+C 44700 44200 1 270 0 gnd-1.sym
+C 45000 44000 1 0 0 Si8441.sym
 {
-T 46800 46500 5 10 1 1 0 0 1
-refdes=U?
-T 46500 44895 5 10 1 1 90 0 1
+T 46600 46500 5 10 1 1 0 0 1
+refdes=U2
+T 46300 44895 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44900 46000 1 270 0 gnd-1.sym
-C 45200 46000 1 90 0 3.3V-plus-1.sym
-C 44700 44300 1 0 0 nc-left-1.sym
+C 44700 46000 1 270 0 gnd-1.sym
+C 45000 46000 1 90 0 3.3V-plus-1.sym
+C 44500 44300 1 0 0 nc-left-1.sym
 {
-T 44700 44700 5 10 0 0 0 0 1
+T 44500 44700 5 10 0 0 0 0 1
 value=NoConnection
-T 44700 45100 5 10 0 0 0 0 1
+T 44500 45100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 47400 46400 1 270 0 5V-plus-1.sym
-C 47400 46100 1 270 0 vdd-1.sym
-C 47400 44300 1 270 0 vdd-1.sym
-C 47400 44300 1 0 0 nc-right-1.sym
+C 47200 46400 1 270 0 5V-plus-1.sym
+C 47200 46100 1 270 0 vdd-1.sym
+C 47200 44300 1 270 0 vdd-1.sym
+C 47200 44300 1 0 0 nc-right-1.sym
 {
-T 47500 44800 5 10 0 0 0 0 1
+T 47300 44800 5 10 0 0 0 0 1
 value=NoConnection
-T 47500 45000 5 10 0 0 0 0 1
+T 47300 45000 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 48700 44300 1 0 0 TMC2660.sym
+C 48500 44300 1 0 0 TMC2660.sym
 {
-T 51095 46295 5 10 1 1 0 0 1
+T 50895 46295 5 10 1 1 0 0 1
 footprint=QFP44
-T 53795 48395 5 10 1 1 0 0 1
-refdes=U?
-}
-N 47400 45600 47900 45600 4
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-N 47900 46400 48700 46400 4
-N 47400 45300 48000 45300 4
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-N 48100 45000 48100 45700 4
-N 48100 45700 48700 45700 4
-N 47400 44700 48700 44700 4
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-N 47400 48100 48500 48100 4
-N 48500 48100 48500 47400 4
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-N 48600 48400 48600 47700 4
-N 48600 47700 48700 47700 4
-N 47400 48700 48700 48700 4
-N 48700 48700 48700 48000 4
+T 53595 48395 5 10 1 1 0 0 1
+refdes=U3
+}
+N 47200 45600 47700 45600 4
+N 47700 45600 47700 46400 4
+N 47700 46400 48500 46400 4
+N 47200 45300 47800 45300 4
+N 47800 45300 47800 46000 4
+N 47800 46000 48500 46000 4
+N 47200 45000 47900 45000 4
+N 47900 45000 47900 45700 4
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+N 48100 48100 48100 47400 4
+N 48100 47400 48500 47400 4
+N 47200 48400 48200 48400 4
+N 48200 48400 48200 47700 4
+N 48200 47700 48500 47700 4
+N 47200 48700 48300 48700 4
+N 48300 48700 48300 48000 4
 T 53900 40100 9 10 1 0 0 0 1
 Joseph Coffland
 T 53800 40400 9 10 1 0 0 0 1
@@ -464,3 +460,20 @@ T 50000 40100 9 10 1 0 0 0 1
 1
 T 51500 40100 9 10 1 0 0 0 1
 1
+N 51300 49500 51700 49500 4
+N 52200 44300 52200 44100 4
+N 48300 48000 48500 48000 4
+C 43500 41100 1 90 0 nc-left-1.sym
+{
+T 43100 41100 5 10 0 0 90 0 1
+value=NoConnection
+T 42700 41100 5 10 0 0 90 0 1
+device=DRC_Directive
+}
+C 43500 43000 1 90 0 nc-right-1.sym
+{
+T 43000 43100 5 10 0 0 90 0 1
+value=NoConnection
+T 42800 43100 5 10 0 0 90 0 1
+device=DRC_Directive
+}