From: Joseph Coffland <joseph@cauldrondevelopment.com>
Date: Tue, 14 Jul 2015 06:52:35 +0000 (-0700)
Subject: Added IO board, work on power section
X-Git-Url: https://git.buildbotics.com/?a=commitdiff_plain;h=bad3088f1b5b2ee10373d6e5f2ffae8a29581a30;p=bbctrl-pcb

Added IO board, work on power section
---

diff --git a/electronics/connectors.sch b/electronics/connectors.sch
index 96d668f..96e234e 100644
--- a/electronics/connectors.sch
+++ b/electronics/connectors.sch
@@ -1,237 +1,152 @@
 v 20130925 2
 C 40000 40000 0 0 0 title-B.sym
-C 41000 44500 1 0 0 DB15-1.sym
+C 50900 42400 1 0 0 header40-2.sym
 {
-T 42100 49150 5 10 0 0 0 0 1
-device=DB15
-T 41100 49500 5 10 1 1 0 0 1
-refdes=CONN?
-}
-C 42200 49200 1 270 0 3.3V-plus-1.sym
-C 42500 45000 1 90 0 gnd-1.sym
-C 42200 48300 1 0 0 output-1.sym
-{
-T 42300 48600 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 48300 5 10 1 1 0 0 1
-netname=x_min
-}
-C 42200 47700 1 0 0 output-1.sym
-{
-T 42300 48000 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 47700 5 10 1 1 0 0 1
-netname=x_max
-}
-C 42200 47100 1 0 0 output-1.sym
-{
-T 42300 47400 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 47100 5 10 1 1 0 0 1
-netname=y_min
-}
-C 42200 46500 1 0 0 output-1.sym
-{
-T 42300 46800 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 46500 5 10 1 1 0 0 1
-netname=y_max
-}
-C 42200 45900 1 0 0 output-1.sym
-{
-T 42300 46200 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 45900 5 10 1 1 0 0 1
-netname=z_min
-}
-C 42200 45300 1 0 0 output-1.sym
-{
-T 42300 45600 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 45300 5 10 1 1 0 0 1
-netname=z_max
-}
-C 42200 44700 1 0 0 output-1.sym
-{
-T 42300 45000 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 44700 5 10 1 1 0 0 1
-netname=a_min
-}
-C 42200 48600 1 0 0 output-1.sym
-{
-T 42300 48900 5 10 0 0 0 0 1
-device=OUTPUT
-T 43100 48600 5 10 1 1 0 0 1
-netname=a_max
-}
-C 43000 48200 1 180 0 input-1.sym
-{
-T 43000 47900 5 10 0 0 180 0 1
-device=INPUT
-T 43100 48000 5 10 1 1 0 0 1
-netname=spin_enable
-}
-C 43000 47600 1 180 0 input-1.sym
-{
-T 43000 47300 5 10 0 0 180 0 1
-device=INPUT
-T 43100 47400 5 10 1 1 0 0 1
-netname=spin_dir
-}
-C 43000 47000 1 180 0 input-1.sym
-{
-T 43000 46700 5 10 0 0 180 0 1
-device=INPUT
-T 43100 46800 5 10 1 1 0 0 1
-netname=spin_pwm
-}
-C 43000 46400 1 180 0 input-1.sym
-{
-T 43000 46100 5 10 0 0 180 0 1
-device=INPUT
-T 43100 46200 5 10 1 1 0 0 1
-netname=coolant
-}
-C 47900 41700 1 0 0 header40-2.sym
-{
-T 48150 50200 5 10 0 1 0 0 1
+T 51150 50900 5 10 0 1 0 0 1
 device=HEADER40
-T 48500 49800 5 10 1 1 0 0 1
+T 51500 50500 5 10 1 1 0 0 1
 refdes=J?
 }
-C 49600 48600 1 90 0 gnd-1.sym
-C 49600 47000 1 90 0 gnd-1.sym
-C 49600 45800 1 90 0 gnd-1.sym
-C 49600 43800 1 90 0 gnd-1.sym
-C 49600 43000 1 90 0 gnd-1.sym
-C 47600 42000 1 270 0 gnd-1.sym
-C 47600 44800 1 270 0 gnd-1.sym
-C 47600 48000 1 270 0 gnd-1.sym
-C 49300 49700 1 270 0 5V-plus-1.sym
-C 49300 49300 1 270 0 5V-plus-1.sym
-C 47900 49300 1 90 0 3.3V-plus-1.sym
-C 47900 46100 1 90 0 3.3V-plus-1.sym
-C 53000 49800 1 180 0 header26-1.sym
-{
-T 51400 45100 5 10 0 0 180 0 1
+C 52600 49300 1 90 0 gnd-1.sym
+C 52600 47700 1 90 0 gnd-1.sym
+C 52600 46500 1 90 0 gnd-1.sym
+C 52600 44500 1 90 0 gnd-1.sym
+C 52600 43700 1 90 0 gnd-1.sym
+C 50600 42700 1 270 0 gnd-1.sym
+C 50600 45500 1 270 0 gnd-1.sym
+C 50600 48700 1 270 0 gnd-1.sym
+C 52300 50400 1 270 0 5V-plus-1.sym
+C 52300 50000 1 270 0 5V-plus-1.sym
+C 50900 50000 1 90 0 3.3V-plus-1.sym
+C 50900 46800 1 90 0 3.3V-plus-1.sym
+C 56000 50500 1 180 0 header26-1.sym
+{
+T 54400 45800 5 10 0 0 180 0 1
 device=HEADER26
-T 52500 50000 5 10 1 1 180 0 1
+T 55500 50700 5 10 1 1 180 0 1
 refdes=J?
 }
-C 51600 49300 1 90 0 3.3V-plus-1.sym
-C 51600 46100 1 90 0 3.3V-plus-1.sym
-C 53000 49700 1 270 0 5V-plus-1.sym
-C 53000 49300 1 270 0 5V-plus-1.sym
-C 53300 48600 1 90 0 gnd-1.sym
-C 53300 47000 1 90 0 gnd-1.sym
-C 53300 45800 1 90 0 gnd-1.sym
-C 51300 44800 1 270 0 gnd-1.sym
-C 51300 48000 1 270 0 gnd-1.sym
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-N 53000 46100 53000 46300 4
-C 51100 49000 1 0 0 nc-left-1.sym
-{
-T 51100 49400 5 10 0 0 0 0 1
+C 54600 50000 1 90 0 3.3V-plus-1.sym
+C 54600 46800 1 90 0 3.3V-plus-1.sym
+C 56000 50400 1 270 0 5V-plus-1.sym
+C 56000 50000 1 270 0 5V-plus-1.sym
+C 56300 49300 1 90 0 gnd-1.sym
+C 56300 47700 1 90 0 gnd-1.sym
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+N 56000 46800 52300 46800 4
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+C 54100 49700 1 0 0 nc-left-1.sym
+{
+T 54100 50100 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 49800 5 10 0 0 0 0 1
+T 54100 50500 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51100 48600 1 0 0 nc-left-1.sym
+C 54100 49300 1 0 0 nc-left-1.sym
 {
-T 51100 49000 5 10 0 0 0 0 1
+T 54100 49700 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 49400 5 10 0 0 0 0 1
+T 54100 50100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51100 48200 1 0 0 nc-left-1.sym
+C 54100 48900 1 0 0 nc-left-1.sym
 {
-T 51100 48600 5 10 0 0 0 0 1
+T 54100 49300 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 49000 5 10 0 0 0 0 1
+T 54100 49700 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51100 47400 1 0 0 nc-left-1.sym
+C 54100 48100 1 0 0 nc-left-1.sym
 {
-T 51100 47800 5 10 0 0 0 0 1
+T 54100 48500 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 48200 5 10 0 0 0 0 1
+T 54100 48900 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51100 47000 1 0 0 nc-left-1.sym
+C 54100 47700 1 0 0 nc-left-1.sym
 {
-T 51100 47400 5 10 0 0 0 0 1
+T 54100 48100 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 47800 5 10 0 0 0 0 1
+T 54100 48500 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51100 46600 1 0 0 nc-left-1.sym
+C 54100 47300 1 0 0 nc-left-1.sym
 {
-T 51100 47000 5 10 0 0 0 0 1
+T 54100 47700 5 10 0 0 0 0 1
 value=NoConnection
-T 51100 47400 5 10 0 0 0 0 1
+T 54100 48100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 53000 46600 1 0 0 nc-right-1.sym
+C 56000 47300 1 0 0 nc-right-1.sym
 {
-T 53100 47100 5 10 0 0 0 0 1
+T 56100 47800 5 10 0 0 0 0 1
 value=NoConnection
-T 53100 47300 5 10 0 0 0 0 1
+T 56100 48000 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 53000 47400 1 0 0 nc-right-1.sym
+C 56000 48100 1 0 0 nc-right-1.sym
 {
-T 53100 47900 5 10 0 0 0 0 1
+T 56100 48600 5 10 0 0 0 0 1
 value=NoConnection
-T 53100 48100 5 10 0 0 0 0 1
+T 56100 48800 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 53000 47800 1 0 0 nc-right-1.sym
+C 56000 48500 1 0 0 nc-right-1.sym
 {
-T 53100 48300 5 10 0 0 0 0 1
+T 56100 49000 5 10 0 0 0 0 1
 value=NoConnection
-T 53100 48500 5 10 0 0 0 0 1
+T 56100 49200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 53000 48200 1 0 0 nc-right-1.sym
+C 56000 48900 1 0 0 nc-right-1.sym
 {
-T 53100 48700 5 10 0 0 0 0 1
+T 56100 49400 5 10 0 0 0 0 1
 value=NoConnection
-T 53100 48900 5 10 0 0 0 0 1
+T 56100 49600 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 50100 48000 1 180 0 input-1.sym
+C 53100 48700 1 180 0 input-1.sym
 {
-T 50100 47700 5 10 0 0 180 0 1
+T 53100 48400 5 10 0 0 180 0 1
 device=INPUT
-T 50200 47800 5 10 1 1 0 0 1
+T 53200 48500 5 10 1 1 0 0 1
 netname=serial_tx
 }
-C 49300 48200 1 0 0 output-1.sym
+C 52300 48900 1 0 0 output-1.sym
 {
-T 49400 48500 5 10 0 0 0 0 1
+T 52400 49200 5 10 0 0 0 0 1
 device=OUTPUT
-T 50200 48200 5 10 1 1 0 0 1
+T 53200 48900 5 10 1 1 0 0 1
 netname=serial_rx
 }
 T 50000 40700 9 10 1 0 0 0 1
 Connectors
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+2
+T 51500 40100 9 10 1 0 0 0 1
+4
diff --git a/electronics/io_board.sch b/electronics/io_board.sch
new file mode 100644
index 0000000..aef43ff
--- /dev/null
+++ b/electronics/io_board.sch
@@ -0,0 +1,105 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+T 50000 40700 9 10 1 0 0 0 1
+IO Board
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+1
+T 51500 40100 9 10 1 0 0 0 1
+1
+C 56000 43700 1 0 1 DB15-1.sym
+{
+T 54900 48350 5 10 0 0 0 6 1
+device=DB15
+T 55900 48700 5 10 1 1 0 6 1
+refdes=CONN?
+}
+C 54800 48400 1 90 1 3.3V-plus-1.sym
+C 54500 44200 1 270 1 gnd-1.sym
+C 54800 47500 1 0 1 output-1.sym
+{
+T 54700 47800 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 47500 5 10 1 1 0 6 1
+netname=x_min
+}
+C 54800 46900 1 0 1 output-1.sym
+{
+T 54700 47200 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 46900 5 10 1 1 0 6 1
+netname=x_max
+}
+C 54800 46300 1 0 1 output-1.sym
+{
+T 54700 46600 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 46300 5 10 1 1 0 6 1
+netname=y_min
+}
+C 54800 45700 1 0 1 output-1.sym
+{
+T 54700 46000 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 45700 5 10 1 1 0 6 1
+netname=y_max
+}
+C 54800 45100 1 0 1 output-1.sym
+{
+T 54700 45400 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 45100 5 10 1 1 0 6 1
+netname=z_min
+}
+C 54800 44500 1 0 1 output-1.sym
+{
+T 54700 44800 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 44500 5 10 1 1 0 6 1
+netname=z_max
+}
+C 54800 43900 1 0 1 output-1.sym
+{
+T 54700 44200 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 43900 5 10 1 1 0 6 1
+netname=a_min
+}
+C 54800 47800 1 0 1 output-1.sym
+{
+T 54700 48100 5 10 0 0 0 6 1
+device=OUTPUT
+T 53900 47800 5 10 1 1 0 6 1
+netname=a_max
+}
+C 54000 47400 1 180 1 input-1.sym
+{
+T 54000 47100 5 10 0 0 180 6 1
+device=INPUT
+T 53900 47200 5 10 1 1 0 6 1
+netname=spin_enable
+}
+C 54000 46800 1 180 1 input-1.sym
+{
+T 54000 46500 5 10 0 0 180 6 1
+device=INPUT
+T 53900 46600 5 10 1 1 0 6 1
+netname=spin_dir
+}
+C 54000 46200 1 180 1 input-1.sym
+{
+T 54000 45900 5 10 0 0 180 6 1
+device=INPUT
+T 53900 46000 5 10 1 1 0 6 1
+netname=spin_pwm
+}
+C 54000 45600 1 180 1 input-1.sym
+{
+T 54000 45300 5 10 0 0 180 6 1
+device=INPUT
+T 53900 45400 5 10 1 1 0 6 1
+netname=coolant
+}
diff --git a/electronics/microprocessor.sch b/electronics/microprocessor.sch
index a377883..ab0f9e5 100644
--- a/electronics/microprocessor.sch
+++ b/electronics/microprocessor.sch
@@ -19,29 +19,16 @@ C 48200 41300 1 0 0 crystal-1.sym
 T 48400 41800 5 10 0 0 0 0 1
 device=CRYSTAL
 T 48400 41100 5 10 1 1 0 0 1
-refdes=X?
+refdes=X1
 T 48400 42000 5 10 0 0 0 0 1
 symversion=0.1
 }
-C 44700 41800 1 0 0 ATXmegaA3.sym
-{
-T 45100 51500 5 8 0 0 0 0 1
-symversion=1.0
-T 46900 48000 5 26 1 1 270 0 1
-description=ATXmegaA3U
-T 48100 50300 5 8 1 1 0 0 1
-footprint=TQFP64-08
-T 48100 50500 5 10 1 1 0 0 1
-value=ATXmegaA3
-T 48100 50700 5 10 1 1 0 0 1
-refdes=U?
-}
 C 48400 40500 1 90 0 capacitor-1.sym
 {
 T 47700 40700 5 10 0 0 90 0 1
 device=CAPACITOR
 T 48100 41300 5 10 1 1 180 0 1
-refdes=C?
+refdes=C1
 T 47500 40700 5 10 0 0 90 0 1
 symversion=0.1
 }
@@ -50,7 +37,7 @@ C 49100 40500 1 90 0 capacitor-1.sym
 T 48400 40700 5 10 0 0 90 0 1
 device=CAPACITOR
 T 49200 41300 5 10 1 1 180 0 1
-refdes=C?
+refdes=C2
 T 48200 40700 5 10 0 0 90 0 1
 symversion=0.1
 }
@@ -64,7 +51,7 @@ C 46800 50500 1 0 0 3.3V-plus-1.sym
 C 42200 40400 1 0 0 pdi.sym
 {
 T 42900 42300 5 10 1 1 0 0 1
-refdes=J?
+refdes=J1
 }
 N 45500 41900 45500 41700 4
 N 45500 41700 44800 41700 4
@@ -104,18 +91,18 @@ device=INPUT
 T 44000 44200 5 10 1 1 180 0 1
 netname=serial_rx
 }
-C 44900 42700 1 180 0 output-1.sym
+C 44900 43300 1 180 0 output-1.sym
 {
-T 44800 42400 5 10 0 0 180 0 1
+T 44800 43000 5 10 0 0 180 0 1
 device=OUTPUT
-T 44000 42700 5 10 1 1 180 0 1
+T 44000 43300 5 10 1 1 180 0 1
 netname=spi_clk
 }
-C 44900 43300 1 180 0 output-1.sym
+C 44900 42700 1 180 0 output-1.sym
 {
-T 44800 43000 5 10 0 0 180 0 1
+T 44800 42400 5 10 0 0 180 0 1
 device=OUTPUT
-T 44000 43300 5 10 1 1 180 0 1
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 netname=spi_mosi
 }
 C 44100 42800 1 0 0 input-1.sym
@@ -211,3 +198,241 @@ netname=spin_enable
 }
 T 50000 40700 9 10 1 0 0 0 1
 Microprocessor
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+Joseph Coffland
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+1
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+4
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+}
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+netname=enable_x
+}
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+{
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+}
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+{
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+}
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+{
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+device=OUTPUT
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+netname=enable_y
+}
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+{
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+netname=dir_y
+}
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+{
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+netname=step_z
+}
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+{
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+}
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+{
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+}
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+{
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+}
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+{
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+netname=enable_a
+}
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+{
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+}
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+{
+T 44400 49000 5 10 0 0 0 0 1
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+device=DRC_Directive
+}
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+{
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+T 49300 49300 5 10 0 0 0 0 1
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+}
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+{
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+}
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+{
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+}
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+{
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+}
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+}
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+symversion=1.0
+T 46900 48000 5 26 1 1 270 0 1
+description=ATXmegaA3U
+T 48100 50300 5 8 1 1 0 0 1
+footprint=TQFP64-08
+T 48100 50500 5 10 1 1 0 0 1
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+T 48100 50700 5 10 1 1 0 0 1
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+}
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+{
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+device=OUTPUT
+T 50100 48900 5 10 1 1 0 0 1
+netname=spi_cs_a
+}
+C 49200 46300 1 0 0 output-1.sym
+{
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+netname=spi_cs_z
+}
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+{
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+netname=spi_cs_x
+}
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+{
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+value=NoConnection
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+}
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+{
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+value=PB0
+}
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+{
+T 44700 46500 5 10 0 0 180 0 1
+device=none
+T 44000 47000 5 10 1 1 180 1 1
+value=PB1
+}
+C 44900 46800 1 180 0 io-1.sym
+{
+T 44700 46200 5 10 0 0 180 0 1
+device=none
+T 44000 46700 5 10 1 1 180 1 1
+value=PB2
+}
+C 44900 46500 1 180 0 io-1.sym
+{
+T 44700 45900 5 10 0 0 180 0 1
+device=none
+T 44000 46400 5 10 1 1 180 1 1
+value=PB3
+}
+C 44900 46200 1 180 0 io-1.sym
+{
+T 44700 45600 5 10 0 0 180 0 1
+device=none
+T 44000 46100 5 10 1 1 180 1 1
+value=PB4
+}
+C 44900 45900 1 180 0 io-1.sym
+{
+T 44700 45300 5 10 0 0 180 0 1
+device=none
+T 44000 45800 5 10 1 1 180 1 1
+value=PB5
+}
+C 44900 45600 1 180 0 io-1.sym
+{
+T 44700 45000 5 10 0 0 180 0 1
+device=none
+T 44000 45500 5 10 1 1 180 1 1
+value=PB6
+}
+C 44900 45300 1 180 0 io-1.sym
+{
+T 44700 44700 5 10 0 0 180 0 1
+device=none
+T 44000 45200 5 10 1 1 180 1 1
+value=PB7
+}
diff --git a/electronics/motor_bus.sch b/electronics/motor_bus.sch
new file mode 100644
index 0000000..0a16eb3
--- /dev/null
+++ b/electronics/motor_bus.sch
@@ -0,0 +1,410 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+C 44700 46400 1 0 0 header20-1.sym
+{
+T 44900 46150 5 10 0 1 0 0 1
+device=HEADER20
+T 45500 50700 5 10 1 1 180 0 1
+refdes=J1
+}
+C 52100 44700 1 0 0 output-1.sym
+{
+T 52200 45000 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 44700 5 10 1 1 0 0 1
+netname=spi_clk
+}
+C 44700 49900 1 180 0 output-1.sym
+{
+T 44600 49600 5 10 0 0 180 0 1
+device=OUTPUT
+T 43100 49700 5 10 1 1 0 0 1
+netname=enable_x
+}
+C 44700 49500 1 180 0 output-1.sym
+{
+T 44600 49200 5 10 0 0 180 0 1
+device=OUTPUT
+T 43450 49300 5 10 1 1 0 0 1
+netname=dir_x
+}
+C 44700 49100 1 180 0 output-1.sym
+{
+T 44600 48800 5 10 0 0 180 0 1
+device=OUTPUT
+T 43300 48900 5 10 1 1 0 0 1
+netname=step_x
+}
+C 52100 44300 1 0 0 output-1.sym
+{
+T 52200 44600 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 44300 5 10 1 1 0 0 1
+netname=spi_mosi
+}
+C 52100 45800 1 270 0 3.3V-plus-1.sym
+C 44400 50300 1 270 0 gnd-1.sym
+C 52900 44100 1 180 0 input-1.sym
+{
+T 52900 43800 5 10 0 0 180 0 1
+device=INPUT
+T 53000 43900 5 10 1 1 0 0 1
+netname=spi_miso
+}
+C 44700 47200 1 90 0 vss-1.sym
+C 44700 46800 1 90 0 vss-1.sym
+C 44700 46400 1 90 0 vss-1.sym
+C 52100 43000 1 270 0 vdd-1.sym
+C 52100 42600 1 270 0 vdd-1.sym
+C 52100 42200 1 270 0 vdd-1.sym
+C 52100 45100 1 0 0 output-1.sym
+{
+T 52200 45400 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 45100 5 10 1 1 0 0 1
+netname=spi_cs_a
+}
+C 44200 48100 1 0 0 nc-left-1.sym
+{
+T 44200 48500 5 10 0 0 0 0 1
+value=NoConnection
+T 44200 48900 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 52100 43500 1 0 0 nc-right-1.sym
+{
+T 52200 44000 5 10 0 0 0 0 1
+value=NoConnection
+T 52200 44200 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 43900 48500 1 0 0 input-1.sym
+{
+T 43900 48800 5 10 0 0 0 0 1
+device=INPUT
+T 43800 48700 5 10 1 1 180 0 1
+netname=fault_x
+}
+C 44200 47700 1 0 0 nc-left-1.sym
+{
+T 44200 48100 5 10 0 0 0 0 1
+value=NoConnection
+T 44200 48500 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 52100 43100 1 0 0 nc-right-1.sym
+{
+T 52200 43600 5 10 0 0 0 0 1
+value=NoConnection
+T 52200 43800 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50700 46400 1 0 0 header20-1.sym
+{
+T 50900 46150 5 10 0 1 0 0 1
+device=HEADER20
+T 51500 50700 5 10 1 1 180 0 1
+refdes=J1
+}
+C 44700 41800 1 0 0 header20-1.sym
+{
+T 44900 41550 5 10 0 1 0 0 1
+device=HEADER20
+T 45500 46100 5 10 1 1 180 0 1
+refdes=J1
+}
+C 50700 41800 1 0 0 header20-1.sym
+{
+T 50900 41550 5 10 0 1 0 0 1
+device=HEADER20
+T 51500 46100 5 10 1 1 180 0 1
+refdes=J1
+}
+T 51100 46900 5 10 1 1 180 0 1
+refdes=J1
+C 50700 49500 1 180 0 output-1.sym
+{
+T 50600 49200 5 10 0 0 180 0 1
+device=OUTPUT
+T 49450 49300 5 10 1 1 0 0 1
+netname=dir_y
+}
+C 50700 49100 1 180 0 output-1.sym
+{
+T 50600 48800 5 10 0 0 180 0 1
+device=OUTPUT
+T 49300 48900 5 10 1 1 0 0 1
+netname=step_y
+}
+C 49900 48500 1 0 0 input-1.sym
+{
+T 49900 48800 5 10 0 0 0 0 1
+device=INPUT
+T 49800 48700 5 10 1 1 180 0 1
+netname=fault_y
+}
+C 50700 49900 1 180 0 output-1.sym
+{
+T 50600 49600 5 10 0 0 180 0 1
+device=OUTPUT
+T 49100 49700 5 10 1 1 0 0 1
+netname=enable_y
+}
+C 44700 44900 1 180 0 output-1.sym
+{
+T 44600 44600 5 10 0 0 180 0 1
+device=OUTPUT
+T 43450 44700 5 10 1 1 0 0 1
+netname=dir_z
+}
+C 44700 44500 1 180 0 output-1.sym
+{
+T 44600 44200 5 10 0 0 180 0 1
+device=OUTPUT
+T 43300 44300 5 10 1 1 0 0 1
+netname=step_z
+}
+C 43900 43900 1 0 0 input-1.sym
+{
+T 43900 44200 5 10 0 0 0 0 1
+device=INPUT
+T 43800 44100 5 10 1 1 180 0 1
+netname=fault_z
+}
+C 44700 45300 1 180 0 output-1.sym
+{
+T 44600 45000 5 10 0 0 180 0 1
+device=OUTPUT
+T 43100 45100 5 10 1 1 0 0 1
+netname=enable_z
+}
+C 52100 49300 1 0 0 output-1.sym
+{
+T 52200 49600 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 49300 5 10 1 1 0 0 1
+netname=spi_clk
+}
+C 52100 48900 1 0 0 output-1.sym
+{
+T 52200 49200 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 48900 5 10 1 1 0 0 1
+netname=spi_mosi
+}
+C 52900 48700 1 180 0 input-1.sym
+{
+T 52900 48400 5 10 0 0 180 0 1
+device=INPUT
+T 53000 48500 5 10 1 1 0 0 1
+netname=spi_miso
+}
+C 46100 44700 1 0 0 output-1.sym
+{
+T 46200 45000 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 44700 5 10 1 1 0 0 1
+netname=spi_clk
+}
+C 46100 44300 1 0 0 output-1.sym
+{
+T 46200 44600 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 44300 5 10 1 1 0 0 1
+netname=spi_mosi
+}
+C 46900 44100 1 180 0 input-1.sym
+{
+T 46900 43800 5 10 0 0 180 0 1
+device=INPUT
+T 47000 43900 5 10 1 1 0 0 1
+netname=spi_miso
+}
+C 46100 49300 1 0 0 output-1.sym
+{
+T 46200 49600 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 49300 5 10 1 1 0 0 1
+netname=spi_clk
+}
+C 46100 48900 1 0 0 output-1.sym
+{
+T 46200 49200 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 48900 5 10 1 1 0 0 1
+netname=spi_mosi
+}
+C 46900 48700 1 180 0 input-1.sym
+{
+T 46900 48400 5 10 0 0 180 0 1
+device=INPUT
+T 47000 48500 5 10 1 1 0 0 1
+netname=spi_miso
+}
+C 44700 42600 1 90 0 vss-1.sym
+C 44700 42200 1 90 0 vss-1.sym
+C 44700 41800 1 90 0 vss-1.sym
+C 44200 43500 1 0 0 nc-left-1.sym
+{
+T 44200 43900 5 10 0 0 0 0 1
+value=NoConnection
+T 44200 44300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 44200 43100 1 0 0 nc-left-1.sym
+{
+T 44200 43500 5 10 0 0 0 0 1
+value=NoConnection
+T 44200 43900 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50700 47200 1 90 0 vss-1.sym
+C 50700 46800 1 90 0 vss-1.sym
+C 50700 46400 1 90 0 vss-1.sym
+C 50200 48100 1 0 0 nc-left-1.sym
+{
+T 50200 48500 5 10 0 0 0 0 1
+value=NoConnection
+T 50200 48900 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50200 47700 1 0 0 nc-left-1.sym
+{
+T 50200 48100 5 10 0 0 0 0 1
+value=NoConnection
+T 50200 48500 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50700 42600 1 90 0 vss-1.sym
+C 50700 42200 1 90 0 vss-1.sym
+C 50700 41800 1 90 0 vss-1.sym
+C 50200 43500 1 0 0 nc-left-1.sym
+{
+T 50200 43900 5 10 0 0 0 0 1
+value=NoConnection
+T 50200 44300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50200 43100 1 0 0 nc-left-1.sym
+{
+T 50200 43500 5 10 0 0 0 0 1
+value=NoConnection
+T 50200 43900 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 52100 47600 1 270 0 vdd-1.sym
+C 52100 47200 1 270 0 vdd-1.sym
+C 52100 46800 1 270 0 vdd-1.sym
+C 52100 48100 1 0 0 nc-right-1.sym
+{
+T 52200 48600 5 10 0 0 0 0 1
+value=NoConnection
+T 52200 48800 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 52100 47700 1 0 0 nc-right-1.sym
+{
+T 52200 48200 5 10 0 0 0 0 1
+value=NoConnection
+T 52200 48400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 46100 43000 1 270 0 vdd-1.sym
+C 46100 42600 1 270 0 vdd-1.sym
+C 46100 42200 1 270 0 vdd-1.sym
+C 46100 43500 1 0 0 nc-right-1.sym
+{
+T 46200 44000 5 10 0 0 0 0 1
+value=NoConnection
+T 46200 44200 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 46100 43100 1 0 0 nc-right-1.sym
+{
+T 46200 43600 5 10 0 0 0 0 1
+value=NoConnection
+T 46200 43800 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 46100 47600 1 270 0 vdd-1.sym
+C 46100 47200 1 270 0 vdd-1.sym
+C 46100 46800 1 270 0 vdd-1.sym
+C 46100 48100 1 0 0 nc-right-1.sym
+{
+T 46200 48600 5 10 0 0 0 0 1
+value=NoConnection
+T 46200 48800 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 46100 47700 1 0 0 nc-right-1.sym
+{
+T 46200 48200 5 10 0 0 0 0 1
+value=NoConnection
+T 46200 48400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50400 50300 1 270 0 gnd-1.sym
+C 44400 45700 1 270 0 gnd-1.sym
+C 50400 45700 1 270 0 gnd-1.sym
+C 52100 50400 1 270 0 3.3V-plus-1.sym
+C 46100 45800 1 270 0 3.3V-plus-1.sym
+C 46100 50400 1 270 0 3.3V-plus-1.sym
+C 52100 49700 1 0 0 output-1.sym
+{
+T 52200 50000 5 10 0 0 0 0 1
+device=OUTPUT
+T 53000 49700 5 10 1 1 0 0 1
+netname=spi_cs_y
+}
+C 46100 45100 1 0 0 output-1.sym
+{
+T 46200 45400 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 45100 5 10 1 1 0 0 1
+netname=spi_cs_z
+}
+C 46100 49700 1 0 0 output-1.sym
+{
+T 46200 50000 5 10 0 0 0 0 1
+device=OUTPUT
+T 47000 49700 5 10 1 1 0 0 1
+netname=spi_cs_x
+}
+C 50700 44900 1 180 0 output-1.sym
+{
+T 50600 44600 5 10 0 0 180 0 1
+device=OUTPUT
+T 49450 44700 5 10 1 1 0 0 1
+netname=dir_a
+}
+C 50700 44500 1 180 0 output-1.sym
+{
+T 50600 44200 5 10 0 0 180 0 1
+device=OUTPUT
+T 49300 44300 5 10 1 1 0 0 1
+netname=step_a
+}
+C 49900 43900 1 0 0 input-1.sym
+{
+T 49900 44200 5 10 0 0 0 0 1
+device=INPUT
+T 49800 44100 5 10 1 1 180 0 1
+netname=fault_a
+}
+C 50700 45300 1 180 0 output-1.sym
+{
+T 50600 45000 5 10 0 0 180 0 1
+device=OUTPUT
+T 49100 45100 5 10 1 1 0 0 1
+netname=enable_a
+}
+T 50000 40700 9 10 1 0 0 0 1
+Motor Bus
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+4
+T 51500 40100 9 10 1 0 0 0 1
+4
diff --git a/electronics/power.sch b/electronics/power.sch
index e88ffd1..19beedf 100644
--- a/electronics/power.sch
+++ b/electronics/power.sch
@@ -7,14 +7,14 @@ device=LED
 T 55900 42800 5 10 0 0 0 0 1
 symversion=0.1
 T 55900 42400 5 10 1 1 0 0 1
-refdes=LED?
+refdes=LED100
 }
 C 54200 42100 1 0 0 resistor-1.sym
 {
 T 54500 42500 5 10 0 0 0 0 1
 device=RESISTOR
 T 54400 42400 5 10 1 1 0 0 1
-refdes=R?
+refdes=R109
 }
 C 54200 42000 1 90 0 3.3V-plus-1.sym
 C 56300 42100 1 90 0 gnd-1.sym
@@ -27,4 +27,483 @@ T 53800 40400 9 10 1 0 0 0 1
 T 50000 40100 9 10 1 0 0 0 1
 3
 T 51500 40100 9 10 1 0 0 0 1
-3
+4
+C 52300 42000 1 0 1 pwrjack-1.sym
+{
+T 52200 42500 5 10 0 0 0 6 1
+device=PWRJACK
+T 52300 42500 5 10 1 1 0 6 1
+refdes=CONN100
+}
+C 51400 42200 1 90 0 vss-1.sym
+C 51400 41800 1 90 0 vdd-1.sym
+N 51400 42000 51400 42100 4
+N 51400 42400 51400 42300 4
+C 45300 48900 1 90 0 capacitor-1.sym
+{
+T 44600 49100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 45600 49700 5 10 1 1 180 0 1
+refdes=C101
+T 44400 49100 5 10 0 0 90 0 1
+symversion=0.1
+T 45200 49100 5 10 1 1 0 0 1
+value=10nF
+T 45200 48900 5 10 1 1 0 0 1
+description=50v
+}
+C 42900 49600 1 0 0 nc-top-1.sym
+{
+T 43300 50100 5 10 0 0 0 0 1
+value=NoConnection
+T 43300 50300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+N 44200 49600 44200 49800 4
+N 44200 49800 45100 49800 4
+N 45100 48900 45100 48700 4
+N 45900 48700 44900 48700 4
+C 44200 46900 1 90 0 capacitor-1.sym
+{
+T 43500 47100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 43900 47600 5 10 1 1 180 0 1
+refdes=C102
+T 43300 47100 5 10 0 0 90 0 1
+symversion=0.1
+T 43400 47100 5 10 1 1 0 0 1
+value=2.2nF
+}
+C 47300 47300 1 90 0 capacitor-1.sym
+{
+T 46600 47500 5 10 0 0 90 0 1
+device=CAPACITOR
+T 47600 48100 5 10 1 1 180 0 1
+refdes=C105
+T 46400 47500 5 10 0 0 90 0 1
+symversion=0.1
+T 47200 47400 5 10 1 1 0 0 1
+value=22uF
+T 47300 47200 5 10 1 1 0 0 1
+description=6v
+}
+N 41700 48400 42400 48400 4
+C 41700 48200 1 90 0 vss-1.sym
+C 43500 46000 1 180 0 vdd-1.sym
+N 42000 47100 42000 46000 4
+N 42000 46000 47100 46000 4
+N 43100 47800 43100 46000 4
+C 44100 46000 1 90 0 resistor-1.sym
+{
+T 43700 46300 5 10 0 0 90 0 1
+device=RESISTOR
+T 43800 46600 5 10 1 1 180 0 1
+refdes=R100
+T 43500 46200 5 10 1 1 0 0 1
+value=15k
+}
+C 45200 47800 1 270 0 resistor-1.sym
+{
+T 45600 47500 5 10 0 0 270 0 1
+device=RESISTOR
+T 44800 47400 5 10 1 1 0 0 1
+refdes=R101
+T 44800 47200 5 10 1 1 0 0 1
+value=10k
+}
+C 45900 48300 1 0 0 resistor-1.sym
+{
+T 46200 48700 5 10 0 0 0 0 1
+device=RESISTOR
+T 46200 48250 5 10 1 1 180 0 1
+refdes=R102
+T 46300 48100 5 10 1 1 0 0 1
+value=28.7k
+}
+N 47100 48400 46800 48400 4
+N 45900 48400 44900 48400 4
+N 45300 47800 45300 48400 4
+C 45900 48600 1 0 0 inductor-1.sym
+{
+T 46100 49100 5 10 0 0 0 0 1
+device=INDUCTOR
+T 45900 48900 5 10 1 1 0 0 1
+refdes=L100
+T 46100 49300 5 10 0 0 0 0 1
+symversion=0.1
+T 46400 48900 5 10 1 1 0 0 1
+value=22uH
+}
+C 45900 46900 1 90 0 schottky-1.sym
+{
+T 45228 47222 5 10 0 0 90 0 1
+device=DIODE
+T 46200 47800 5 10 1 1 180 0 1
+refdes=D100
+T 45068 47241 5 10 0 1 90 0 1
+footprint=SOD80
+T 45800 47000 5 10 1 1 0 0 1
+description=40v/3A
+}
+N 47100 48200 47100 48700 4
+N 47100 48700 46800 48700 4
+N 47100 47300 47100 46000 4
+N 45300 46900 45300 46000 4
+N 45700 47800 45700 48700 4
+N 45700 46900 45700 46000 4
+C 47100 48900 1 270 0 5V-plus-1.sym
+N 42000 48400 42000 48000 4
+C 42200 47100 1 90 0 capacitor-1.sym
+{
+T 41500 47300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 41900 47900 5 10 1 1 180 0 1
+refdes=C100
+T 41300 47300 5 10 0 0 90 0 1
+symversion=0.1
+T 41500 47200 5 10 1 1 0 0 1
+value=10uF
+T 41600 47000 5 10 1 1 0 0 1
+description=35v
+}
+N 44000 47800 44400 47800 4
+C 44600 46400 1 90 0 capacitor-1.sym
+{
+T 43900 46600 5 10 0 0 90 0 1
+device=CAPACITOR
+T 44900 47100 5 10 1 1 180 0 1
+refdes=C103
+T 43700 46600 5 10 0 0 90 0 1
+symversion=0.1
+T 44500 46600 5 10 1 1 0 0 1
+value=220pF
+}
+N 44400 46400 44400 46000 4
+N 44400 47300 44400 47800 4
+C 41900 48600 1 0 0 nc-left-1.sym
+{
+T 41900 49000 5 10 0 0 0 0 1
+value=NoConnection
+T 41900 49400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+T 43600 50100 9 10 1 0 0 0 1
+5v Regulator
+C 53100 48900 1 90 0 capacitor-1.sym
+{
+T 52400 49100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 52200 49100 5 10 0 0 90 0 1
+symversion=0.1
+T 53400 49700 5 10 1 1 180 0 1
+refdes=C110
+T 53000 49100 5 10 1 1 0 0 1
+value=10nF
+T 53000 48900 5 10 1 1 0 0 1
+description=50v
+}
+C 50700 49600 1 0 0 nc-top-1.sym
+{
+T 51100 50100 5 10 0 0 0 0 1
+value=NoConnection
+T 51100 50300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+N 52000 49600 52000 49800 4
+N 52000 49800 52900 49800 4
+N 52900 48900 52900 48700 4
+N 53700 48700 52700 48700 4
+C 52000 46900 1 90 0 capacitor-1.sym
+{
+T 51300 47100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 51100 47100 5 10 0 0 90 0 1
+symversion=0.1
+T 51700 47600 5 10 1 1 180 0 1
+refdes=C111
+T 51200 47100 5 10 1 1 0 0 1
+value=2.2nF
+}
+C 55100 47300 1 90 0 capacitor-1.sym
+{
+T 54400 47500 5 10 0 0 90 0 1
+device=CAPACITOR
+T 54200 47500 5 10 0 0 90 0 1
+symversion=0.1
+T 55400 48100 5 10 1 1 180 0 1
+refdes=C114
+T 55000 47400 5 10 1 1 0 0 1
+value=22uF
+T 55100 47200 5 10 1 1 0 0 1
+description=6v
+}
+N 49500 48400 50200 48400 4
+C 49500 48200 1 90 0 vss-1.sym
+C 51300 46000 1 180 0 vdd-1.sym
+N 49800 47100 49800 46000 4
+N 49800 46000 54900 46000 4
+N 50900 47800 50900 46000 4
+C 51900 46000 1 90 0 resistor-1.sym
+{
+T 51500 46300 5 10 0 0 90 0 1
+device=RESISTOR
+T 51600 46600 5 10 1 1 180 0 1
+refdes=R106
+T 51300 46200 5 10 1 1 0 0 1
+value=12k
+}
+C 53000 47800 1 270 0 resistor-1.sym
+{
+T 53400 47500 5 10 0 0 270 0 1
+device=RESISTOR
+T 52500 47400 5 10 1 1 0 0 1
+refdes=R107
+T 52600 47200 5 10 1 1 0 0 1
+value=10k
+}
+C 53700 48300 1 0 0 resistor-1.sym
+{
+T 54000 48700 5 10 0 0 0 0 1
+device=RESISTOR
+T 54000 48250 5 10 1 1 180 0 1
+refdes=R108
+T 54100 48100 5 10 1 1 0 0 1
+value=15.5k
+}
+N 54900 48400 54600 48400 4
+N 53700 48400 52700 48400 4
+N 53100 47800 53100 48400 4
+C 53700 48600 1 0 0 inductor-1.sym
+{
+T 53900 49100 5 10 0 0 0 0 1
+device=INDUCTOR
+T 53900 49300 5 10 0 0 0 0 1
+symversion=0.1
+T 53700 48900 5 10 1 1 0 0 1
+refdes=L102
+T 54200 48900 5 10 1 1 0 0 1
+value=15uH
+}
+C 53700 46900 1 90 0 schottky-1.sym
+{
+T 53028 47222 5 10 0 0 90 0 1
+device=DIODE
+T 52868 47241 5 10 0 1 90 0 1
+footprint=SOD80
+T 54000 47800 5 10 1 1 180 0 1
+refdes=D102
+T 53600 47000 5 10 1 1 0 0 1
+description=40v/3A
+}
+N 54900 48200 54900 48700 4
+N 54900 48700 54600 48700 4
+N 54900 47300 54900 46000 4
+N 53100 46900 53100 46000 4
+N 53500 47800 53500 48700 4
+N 53500 46900 53500 46000 4
+N 49800 48400 49800 48000 4
+C 50000 47100 1 90 0 capacitor-1.sym
+{
+T 49300 47300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 49100 47300 5 10 0 0 90 0 1
+symversion=0.1
+T 49600 47900 5 10 1 1 180 0 1
+refdes=C108
+T 49300 47200 5 10 1 1 0 0 1
+value=10uF
+T 49400 47000 5 10 1 1 0 0 1
+description=35v
+}
+N 51800 47800 52200 47800 4
+C 52400 46400 1 90 0 capacitor-1.sym
+{
+T 51700 46600 5 10 0 0 90 0 1
+device=CAPACITOR
+T 51500 46600 5 10 0 0 90 0 1
+symversion=0.1
+T 52700 47100 5 10 1 1 180 0 1
+refdes=C113
+T 52300 46600 5 10 1 1 0 0 1
+value=220pF
+}
+N 52200 46400 52200 46000 4
+N 52200 47300 52200 47800 4
+C 49700 48600 1 0 0 nc-left-1.sym
+{
+T 49700 49000 5 10 0 0 0 0 1
+value=NoConnection
+T 49700 49400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+T 51400 50100 9 10 1 0 0 0 1
+3.3v Regulator
+C 54900 48900 1 270 0 3.3V-plus-1.sym
+T 44200 44500 9 10 1 0 0 0 1
+12v Regulator
+C 42400 47800 1 0 0 ACT4060A-SOP8.sym
+{
+T 44105 49055 5 10 1 1 180 0 1
+device=ACT4060A
+T 43905 48855 5 10 1 1 180 0 1
+footprint=SOP-8
+T 43495 49395 5 10 1 1 0 0 1
+refdes=U100
+}
+C 50200 47800 1 0 0 ACT4060A-SOP8.sym
+{
+T 51905 49055 5 10 1 1 180 0 1
+device=ACT4060A
+T 51705 48855 5 10 1 1 180 0 1
+footprint=SOP-8
+T 51295 49395 5 10 1 1 0 0 1
+refdes=U102
+}
+C 45400 44200 1 270 0 capacitor-1.sym
+{
+T 46100 44000 5 10 0 0 270 0 1
+device=CAPACITOR
+T 46100 44100 5 10 1 1 180 0 1
+refdes=C109
+T 46300 44000 5 10 0 0 270 0 1
+symversion=0.1
+T 45700 43500 5 10 1 1 0 0 1
+value=22nF
+T 45700 43300 5 10 1 1 0 0 1
+description=50v
+}
+N 45600 43300 45600 43200 4
+N 46300 43200 45400 43200 4
+C 46300 43100 1 0 0 inductor-1.sym
+{
+T 46500 43600 5 10 0 0 0 0 1
+device=INDUCTOR
+T 46500 43800 5 10 0 0 0 0 1
+symversion=0.1
+T 46400 43400 5 10 1 1 0 0 1
+refdes=L101
+T 46700 43400 5 10 1 1 0 0 1
+value=26uH
+T 47200 43400 5 10 1 1 0 0 1
+description=5A
+}
+C 45600 42200 1 270 0 resistor-1.sym
+{
+T 46000 41900 5 10 0 0 270 0 1
+device=RESISTOR
+T 45100 41800 5 10 1 1 0 0 1
+refdes=R104
+T 45200 41500 5 10 1 1 0 0 1
+value=10k
+}
+C 46300 42700 1 0 0 resistor-1.sym
+{
+T 46600 43100 5 10 0 0 0 0 1
+device=RESISTOR
+T 46600 42650 5 10 1 1 180 0 1
+refdes=R105
+T 46700 42500 5 10 1 1 0 0 1
+value=140k
+}
+C 47700 41300 1 90 0 capacitor-1.sym
+{
+T 47000 41500 5 10 0 0 90 0 1
+device=CAPACITOR
+T 47400 42100 5 10 1 1 180 0 1
+refdes=C112
+T 46800 41500 5 10 0 0 90 0 1
+symversion=0.1
+T 47000 41400 5 10 1 1 0 0 1
+value=22uF
+T 47100 41200 5 10 1 1 0 0 1
+description=16v
+}
+N 45400 42800 46300 42800 4
+N 45700 42200 45700 42800 4
+N 43500 42200 43500 40600 4
+N 41700 40600 47500 40600 4
+C 42300 41600 1 270 0 resistor-1.sym
+{
+T 42700 41300 5 10 0 0 270 0 1
+device=RESISTOR
+T 42000 41200 5 10 1 1 0 0 1
+refdes=R103
+T 41900 40900 5 10 1 1 0 0 1
+value=15k
+}
+C 42600 41600 1 90 0 capacitor-1.sym
+{
+T 41900 41800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 42350 42400 5 10 1 1 180 0 1
+refdes=C106
+T 41700 41800 5 10 0 0 90 0 1
+symversion=0.1
+T 41900 41700 5 10 1 1 0 0 1
+value=2.2nF
+}
+N 42900 42800 42400 42800 4
+N 42400 42800 42400 42500 4
+C 41600 43000 1 90 0 vss-1.sym
+N 41600 43200 42900 43200 4
+C 41900 41900 1 90 0 capacitor-1.sym
+{
+T 41200 42100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 41600 42700 5 10 1 1 180 0 1
+refdes=C104
+T 41000 42100 5 10 0 0 90 0 1
+symversion=0.1
+T 41200 42000 5 10 1 1 0 0 1
+value=22uF
+}
+N 41700 42800 41700 43200 4
+N 44300 42200 44300 40600 4
+N 44800 42200 44800 40600 4
+N 47200 42800 47500 42800 4
+N 47200 43200 47500 43200 4
+N 47500 42200 47500 43200 4
+C 47500 43000 1 270 0 12V-plus-1.sym
+C 44100 40600 1 180 0 vdd-1.sym
+N 42400 40700 42400 40600 4
+N 41700 41900 41700 40600 4
+C 46300 41300 1 90 0 schottky-1.sym
+{
+T 45628 41622 5 10 0 0 90 0 1
+device=DIODE
+T 46600 42200 5 10 1 1 180 0 1
+refdes=D101
+T 45468 41641 5 10 0 1 90 0 1
+footprint=SOD80
+T 46200 41400 5 10 1 1 0 0 1
+description=40v/6A
+}
+N 46100 41300 46100 40600 4
+N 45700 41300 45700 40600 4
+N 46100 42200 46100 43200 4
+N 47500 40600 47500 41300 4
+C 43000 41200 1 90 0 capacitor-1.sym
+{
+T 42300 41400 5 10 0 0 90 0 1
+device=CAPACITOR
+T 43300 41900 5 10 1 1 180 0 1
+refdes=C107
+T 42100 41400 5 10 0 0 90 0 1
+symversion=0.1
+T 42900 41400 5 10 1 1 0 0 1
+value=220pF
+}
+N 42800 42100 42800 42800 4
+N 42800 41200 42800 40600 4
+C 42900 42200 1 0 0 ACT4455-SOP8.sym
+{
+T 44405 43355 5 10 1 1 180 0 1
+device=ACT4455
+T 44305 43155 5 10 1 1 180 0 1
+footprint=SOP-8
+T 43995 43795 5 10 1 1 0 0 1
+refdes=U101
+}
+N 43900 42200 43900 40600 4
+N 44700 44000 44700 44200 4
+N 44700 44200 45600 44200 4
diff --git a/electronics/symbols/ACT4060A-SOP8.sym b/electronics/symbols/ACT4060A-SOP8.sym
index eecca97..c9ca6e2 100644
--- a/electronics/symbols/ACT4060A-SOP8.sym
+++ b/electronics/symbols/ACT4060A-SOP8.sym
@@ -1,96 +1,102 @@
 v 20130925 2
-P 0 1000 500 1000 1 0 0
+P 1800 1800 1800 1500 1 0 0
 {
-T 0 1000 5 10 0 0 0 0 1
+T 1800 2000 5 10 0 0 270 0 1
 pintype=pas
-T 555 995 5 10 1 1 0 0 1
+T 1555 1450 5 10 1 1 180 6 1
 pinlabel=Boot
-T 405 1045 5 10 1 1 0 6 1
+T 1750 1595 5 10 1 1 90 0 1
 pinnumber=1
-T 0 1000 5 10 0 0 0 0 1
-pinseq=0
+T 1800 2000 5 10 0 0 270 0 1
+pinseq=1
 }
-P 0 600 500 600 1 0 0
+P 2500 900 2200 900 1 0 0
 {
-T 0 600 5 10 0 0 0 0 1
-pintype=pwr
-T 555 595 5 10 1 1 0 0 1
+T 2700 900 5 10 0 0 180 0 1
+pintype=pas
+T 2145 895 5 10 1 1 0 6 1
 pinlabel=Switch
-T 405 645 5 10 1 1 0 6 1
+T 2295 945 5 10 1 1 0 0 1
 pinnumber=3
-T 0 600 5 10 0 0 0 0 1
-pinseq=0
+T 2700 900 5 10 0 0 180 0 1
+pinseq=3
 }
-P 0 800 500 800 1 0 0
+P 0 600 300 600 1 0 0
 {
-T 0 800 5 10 0 0 0 0 1
-pintype=pas
-T 555 795 5 10 1 1 0 0 1
+T -200 600 5 10 0 0 0 0 1
+pintype=pwr
+T 355 595 5 10 1 1 0 0 1
 pinlabel=In
-T 405 845 5 10 1 1 0 6 1
+T 205 645 5 10 1 1 0 6 1
 pinnumber=2
-T 0 800 5 10 0 0 0 0 1
-pinseq=0
+T -200 600 5 10 0 0 0 0 1
+pinseq=2
 }
-P 0 400 500 400 1 0 0
+P 700 0 700 300 1 0 0
 {
-T 0 400 5 10 0 0 0 0 1
+T 700 -200 5 10 0 0 90 0 1
 pintype=pwr
-T 555 395 5 10 1 1 0 0 1
+T 845 500 5 10 1 1 180 0 1
 pinlabel=Gnd
-T 405 445 5 10 1 1 0 6 1
+T 650 205 5 10 1 1 90 6 1
 pinnumber=4
-T 0 400 5 10 0 0 0 0 1
-pinseq=0
+T 700 -200 5 10 0 0 90 0 1
+pinseq=4
 }
-P 2900 1000 2400 1000 1 0 0
+P 700 1800 700 1500 1 0 0
 {
-T 2900 1000 5 10 0 0 0 0 1
-pintype=in
-T 2345 995 5 10 1 1 0 6 1
+T 700 2000 5 10 0 0 90 0 1
+pintype=pas
+T 555 1450 5 10 1 1 180 6 1
 pinlabel=N/C
-T 2495 1045 5 10 1 1 0 0 1
+T 650 1595 5 10 1 1 90 0 1
 pinnumber=8
-T 2900 1000 5 10 0 0 0 0 1
-pinseq=0
+T 700 2000 5 10 0 0 90 0 1
+pinseq=8
 }
-P 2900 800 2400 800 1 0 0
+P 0 900 300 900 1 0 0
 {
-T 2900 800 5 10 0 0 0 0 1
-pintype=out
-T 2345 795 5 10 1 1 0 6 1
+T -200 900 5 10 0 0 180 0 1
+pintype=in
+T 355 895 5 10 1 1 0 0 1
 pinlabel=Enable
-T 2495 845 5 10 1 1 0 0 1
+T 205 945 5 10 1 1 0 6 1
 pinnumber=7
-T 2900 800 5 10 0 0 0 0 1
-pinseq=0
+T -200 900 5 10 0 0 180 0 1
+pinseq=7
 }
-P 2900 600 2400 600 1 0 0
+P 1800 0 1800 300 1 0 0
 {
-T 2900 600 5 10 0 0 0 0 1
+T 1800 -200 5 10 0 0 270 0 1
 pintype=pas
-T 2345 595 5 10 1 1 0 6 1
+T 2045 500 5 10 1 1 180 0 1
 pinlabel=Comp
-T 2495 645 5 10 1 1 0 0 1
+T 1750 205 5 10 1 1 90 6 1
 pinnumber=6
-T 2900 600 5 10 0 0 0 0 1
-pinseq=0
+T 1800 -200 5 10 0 0 270 0 1
+pinseq=6
 }
-P 2900 400 2400 400 1 0 0
+P 2500 600 2200 600 1 0 0
 {
-T 2900 400 5 10 0 0 0 0 1
-pintype=pwr
-T 2345 395 5 10 1 1 0 6 1
+T 2700 600 5 10 0 0 0 0 1
+pintype=pas
+T 2145 595 5 10 1 1 0 6 1
 pinlabel=Feedback
-T 2495 445 5 10 1 1 0 0 1
+T 2295 645 5 10 1 1 0 0 1
 pinnumber=5
-T 2900 400 5 10 0 0 0 0 1
-pinseq=0
+T 2700 600 5 10 0 0 0 0 1
+pinseq=5
 }
-T 495 1395 8 10 1 1 0 0 1
+T 1705 1255 8 10 1 1 180 0 1
 device=ACT4060A
-T 495 -5 8 10 1 1 0 0 1
+T 1505 1055 8 10 1 1 180 0 1
 footprint=SOP-8
-B 500 200 1900 1100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-T -5 1395 8 10 1 1 0 0 1
+B 300 300 1900 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1095 1595 8 10 1 1 0 0 1
 refdes=U?
+T -5 2393 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 2193 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1993 8 10 0 0 0 0 1
+documentation=http://www.mouser.com/catalog/specsheets/activesemi_ACT4060A.pdf
diff --git a/electronics/symbols/ACT4455-SOP8.sym b/electronics/symbols/ACT4455-SOP8.sym
new file mode 100644
index 0000000..4eeb649
--- /dev/null
+++ b/electronics/symbols/ACT4455-SOP8.sym
@@ -0,0 +1,113 @@
+v 20130925 2
+P 1800 1800 1800 1500 1 0 0
+{
+T 1800 2000 5 10 0 0 270 0 1
+pintype=pas
+T 1555 1450 5 10 1 1 180 6 1
+pinlabel=Bias
+T 1750 1595 5 10 1 1 90 0 1
+pinnumber=3
+T 1800 2000 5 10 0 0 270 0 1
+pinseq=3
+}
+P 2500 1000 2200 1000 1 0 0
+{
+T 2700 1000 5 10 0 0 180 0 1
+pintype=pas
+T 2145 995 5 10 1 1 0 6 1
+pinlabel=Switch
+T 2295 1045 5 10 1 1 0 0 1
+pinnumber=2
+T 2700 1000 5 10 0 0 180 0 1
+pinseq=2
+}
+P 0 1000 300 1000 1 0 0
+{
+T -200 1000 5 10 0 0 0 0 1
+pintype=pwr
+T 355 995 5 10 1 1 0 0 1
+pinlabel=In
+T 205 1045 5 10 1 1 0 6 1
+pinnumber=7
+T -200 1000 5 10 0 0 0 0 1
+pinseq=7
+}
+P 600 0 600 300 1 0 0
+{
+T 600 -200 5 10 0 0 90 0 1
+pintype=pwr
+T 745 500 5 10 1 1 180 0 1
+pinlabel=Gnd
+T 550 205 5 10 1 1 90 6 1
+pinnumber=4
+T 600 -200 5 10 0 0 90 0 1
+pinseq=0
+}
+P 1000 0 1000 300 1 0 0
+{
+T 1000 -200 5 10 0 0 270 0 1
+pintype=pas
+T 1000 355 5 10 1 1 90 0 1
+pinlabel=Pad
+T 950 205 5 10 1 1 90 6 1
+pinnumber=9
+T 1000 -200 5 10 0 0 270 0 1
+pinseq=9
+}
+P 1900 0 1900 300 1 0 0
+{
+T 1900 -200 5 10 0 0 270 0 1
+pintype=pas
+T 2045 500 5 10 1 1 180 0 1
+pinlabel=CS1
+T 1850 205 5 10 1 1 90 6 1
+pinnumber=1
+T 1900 -200 5 10 0 0 270 0 1
+pinseq=1
+}
+P 0 600 300 600 1 0 0
+{
+T -200 600 5 10 0 0 180 0 1
+pintype=pas
+T 355 595 5 10 1 1 0 0 1
+pinlabel=Comp
+T 205 645 5 10 1 1 0 6 1
+pinnumber=5
+T -200 600 5 10 0 0 180 0 1
+pinseq=5
+}
+P 2500 600 2200 600 1 0 0
+{
+T 2700 600 5 10 0 0 0 0 1
+pintype=pas
+T 2145 595 5 10 1 1 0 6 1
+pinlabel=Feedback
+T 2295 645 5 10 1 1 0 0 1
+pinnumber=6
+T 2700 600 5 10 0 0 0 0 1
+pinseq=6
+}
+T 1505 1155 8 10 1 1 180 0 1
+device=ACT4455
+T 1405 955 8 10 1 1 180 0 1
+footprint=SOP-8
+B 300 300 1900 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1095 1595 8 10 1 1 0 0 1
+refdes=U?
+T -5 2393 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 2193 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1993 8 10 0 0 0 0 1
+documentation=http://www.active-semi.com/sheets/ACT4455_Datasheet.pdf
+P 1400 0 1400 300 1 0 0
+{
+T 1400 -200 5 10 0 0 270 0 1
+pintype=pas
+T 1545 500 5 10 1 1 180 0 1
+pinlabel=CS2
+T 1350 205 5 10 1 1 90 6 1
+pinnumber=8
+T 1400 -200 5 10 0 0 270 0 1
+pinseq=8
+}
diff --git a/electronics/symbols/ATXmegaA3.sym b/electronics/symbols/ATXmegaA3.sym
index b6950dc..33c2448 100644
--- a/electronics/symbols/ATXmegaA3.sym
+++ b/electronics/symbols/ATXmegaA3.sym
@@ -30,6 +30,8 @@ T 200 7250 5 8 1 1 0 6 1
 pinnumber=1
 T 200 7250 5 8 0 1 0 6 1
 pinseq=1
+T 200 7200 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 6900 300 6900 1 0 0
 {
@@ -39,6 +41,8 @@ T 200 6950 5 8 1 1 0 6 1
 pinnumber=2
 T 200 6950 5 8 0 1 0 6 1
 pinseq=2
+T 200 6900 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 6600 300 6600 1 0 0
 {
@@ -48,6 +52,8 @@ T 200 6650 5 8 1 1 0 6 1
 pinnumber=3
 T 200 6650 5 8 0 1 0 6 1
 pinseq=3
+T 200 6600 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 6300 300 6300 1 0 0
 {
@@ -57,6 +63,8 @@ T 200 6350 5 8 1 1 0 6 1
 pinnumber=4
 T 200 6350 5 8 0 1 0 6 1
 pinseq=4
+T 200 6300 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 6000 300 6000 1 0 0
 {
@@ -66,6 +74,8 @@ T 200 6050 5 8 1 1 0 6 1
 pinnumber=5
 T 200 6050 5 8 0 1 0 6 1
 pinseq=5
+T 200 6000 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 5500 300 5500 1 0 0
 {
@@ -75,6 +85,8 @@ T 200 5550 5 8 1 1 0 6 1
 pinnumber=6
 T 200 5550 5 8 0 1 0 6 1
 pinseq=6
+T 200 5500 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 5200 300 5200 1 0 0
 {
@@ -84,6 +96,8 @@ T 200 5250 5 8 1 1 0 6 1
 pinnumber=7
 T 200 5250 5 8 0 1 0 6 1
 pinseq=7
+T 200 5200 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 4900 300 4900 1 0 0
 {
@@ -93,6 +107,8 @@ T 200 4950 5 8 1 1 0 6 1
 pinnumber=8
 T 200 4950 5 8 0 1 0 6 1
 pinseq=8
+T 200 4900 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 4600 300 4600 1 0 0
 {
@@ -102,6 +118,8 @@ T 200 4650 5 8 1 1 0 6 1
 pinnumber=9
 T 200 4650 5 8 0 1 0 6 1
 pinseq=9
+T 200 4600 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 4300 300 4300 1 0 0
 {
@@ -111,6 +129,8 @@ T 200 4350 5 8 1 1 0 6 1
 pinnumber=10
 T 200 4350 5 8 0 1 0 6 1
 pinseq=10
+T 200 4300 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 4000 300 4000 1 0 0
 {
@@ -120,6 +140,8 @@ T 200 4050 5 8 1 1 0 6 1
 pinnumber=11
 T 200 4050 5 8 0 1 0 6 1
 pinseq=11
+T 200 4000 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 3700 300 3700 1 0 0
 {
@@ -129,6 +151,8 @@ T 200 3750 5 8 1 1 0 6 1
 pinnumber=12
 T 200 3750 5 8 0 1 0 6 1
 pinseq=12
+T 200 3700 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 3400 300 3400 1 0 0
 {
@@ -138,6 +162,8 @@ T 200 3450 5 8 1 1 0 6 1
 pinnumber=13
 T 200 3450 5 8 0 1 0 6 1
 pinseq=13
+T 200 3400 5 10 0 0 0 0 1
+pintype=io
 }
 P 1600 100 1600 200 1 0 0
 {
@@ -147,6 +173,8 @@ T 1650 150 5 8 1 1 0 2 1
 pinnumber=14
 T 1650 150 5 8 0 1 0 2 1
 pinseq=14
+T 1600 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 1700 8500 1700 8400 1 0 0
 {
@@ -156,6 +184,8 @@ T 1750 8450 5 8 1 1 0 0 1
 pinnumber=15
 T 1750 8450 5 8 0 1 0 0 1
 pinseq=15
+T 1700 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 200 2900 300 2900 1 0 0
 {
@@ -165,6 +195,8 @@ T 200 2950 5 8 1 1 0 6 1
 pinnumber=16
 T 200 2950 5 8 0 1 0 6 1
 pinseq=16
+T 200 2900 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 2600 300 2600 1 0 0
 {
@@ -174,6 +206,8 @@ T 200 2650 5 8 1 1 0 6 1
 pinnumber=17
 T 200 2650 5 8 0 1 0 6 1
 pinseq=17
+T 200 2600 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 2300 300 2300 1 0 0
 {
@@ -183,6 +217,8 @@ T 200 2350 5 8 1 1 0 6 1
 pinnumber=18
 T 200 2350 5 8 0 1 0 6 1
 pinseq=18
+T 200 2300 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 2000 300 2000 1 0 0
 {
@@ -192,6 +228,8 @@ T 200 2050 5 8 1 1 0 6 1
 pinnumber=19
 T 200 2050 5 8 0 1 0 6 1
 pinseq=19
+T 200 2000 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 1700 300 1700 1 0 0
 {
@@ -201,6 +239,8 @@ T 200 1750 5 8 1 1 0 6 1
 pinnumber=20
 T 200 1750 5 8 0 1 0 6 1
 pinseq=20
+T 200 1700 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 1400 300 1400 1 0 0
 {
@@ -210,6 +250,8 @@ T 200 1450 5 8 1 1 0 6 1
 pinnumber=21
 T 200 1450 5 8 0 1 0 6 1
 pinseq=21
+T 200 1400 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 1100 300 1100 1 0 0
 {
@@ -219,6 +261,8 @@ T 200 1150 5 8 1 1 0 6 1
 pinnumber=22
 T 200 1150 5 8 0 1 0 6 1
 pinseq=22
+T 200 1100 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 800 300 800 1 0 0
 {
@@ -228,6 +272,8 @@ T 200 850 5 8 1 1 0 6 1
 pinnumber=23
 T 200 850 5 8 0 1 0 6 1
 pinseq=23
+T 200 800 5 10 0 0 0 0 1
+pintype=io
 }
 P 1900 100 1900 200 1 0 0
 {
@@ -237,6 +283,8 @@ T 1950 150 5 8 1 1 0 2 1
 pinnumber=24
 T 1950 150 5 8 0 1 0 2 1
 pinseq=24
+T 1900 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 2000 8500 2000 8400 1 0 0
 {
@@ -246,6 +294,8 @@ T 2050 8450 5 8 1 1 0 0 1
 pinnumber=25
 T 2050 8450 5 8 0 1 0 0 1
 pinseq=25
+T 2000 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 4500 8100 4400 8100 1 0 0
 {
@@ -255,6 +305,8 @@ T 4500 8150 5 8 1 1 0 0 1
 pinnumber=26
 T 4500 8150 5 8 0 1 0 0 1
 pinseq=26
+T 4500 8100 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 7800 4400 7800 1 0 0
 {
@@ -264,6 +316,8 @@ T 4500 7850 5 8 1 1 0 0 1
 pinnumber=27
 T 4500 7850 5 8 0 1 0 0 1
 pinseq=27
+T 4500 7800 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 7500 4400 7500 1 0 0
 {
@@ -273,6 +327,8 @@ T 4500 7550 5 8 1 1 0 0 1
 pinnumber=28
 T 4500 7550 5 8 0 1 0 0 1
 pinseq=28
+T 4500 7500 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 7200 4400 7200 1 0 0
 {
@@ -282,6 +338,8 @@ T 4500 7250 5 8 1 1 0 0 1
 pinnumber=29
 T 4500 7250 5 8 0 1 0 0 1
 pinseq=29
+T 4500 7200 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 6900 4400 6900 1 0 0
 {
@@ -291,6 +349,8 @@ T 4500 6950 5 8 1 1 0 0 1
 pinnumber=30
 T 4500 6950 5 8 0 1 0 0 1
 pinseq=30
+T 4500 6900 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 6600 4400 6600 1 0 0
 {
@@ -300,6 +360,8 @@ T 4500 6650 5 8 1 1 0 0 1
 pinnumber=31
 T 4500 6650 5 8 0 1 0 0 1
 pinseq=31
+T 4500 6600 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 6300 4400 6300 1 0 0
 {
@@ -309,6 +371,8 @@ T 4500 6350 5 8 1 1 0 0 1
 pinnumber=32
 T 4500 6350 5 8 0 1 0 0 1
 pinseq=32
+T 4500 6300 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 6000 4400 6000 1 0 0
 {
@@ -318,6 +382,8 @@ T 4500 6050 5 8 1 1 0 0 1
 pinnumber=33
 T 4500 6050 5 8 0 1 0 0 1
 pinseq=33
+T 4500 6000 5 10 0 0 0 0 1
+pintype=io
 }
 P 2200 100 2200 200 1 0 0
 {
@@ -327,6 +393,8 @@ T 2250 150 5 8 1 1 0 2 1
 pinnumber=34
 T 2250 150 5 8 0 1 0 2 1
 pinseq=34
+T 2200 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 2300 8500 2300 8400 1 0 0
 {
@@ -336,6 +404,8 @@ T 2350 8450 5 8 1 1 0 0 1
 pinnumber=35
 T 2350 8450 5 8 0 1 0 0 1
 pinseq=35
+T 2300 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 4500 5500 4400 5500 1 0 0
 {
@@ -345,6 +415,8 @@ T 4500 5550 5 8 1 1 0 0 1
 pinnumber=36
 T 4500 5550 5 8 0 1 0 0 1
 pinseq=36
+T 4500 5500 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 5200 4400 5200 1 0 0
 {
@@ -354,6 +426,8 @@ T 4500 5250 5 8 1 1 0 0 1
 pinnumber=37
 T 4500 5250 5 8 0 1 0 0 1
 pinseq=37
+T 4500 5200 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 4900 4400 4900 1 0 0
 {
@@ -363,6 +437,8 @@ T 4500 4950 5 8 1 1 0 0 1
 pinnumber=38
 T 4500 4950 5 8 0 1 0 0 1
 pinseq=38
+T 4500 4900 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 4600 4400 4600 1 0 0
 {
@@ -372,6 +448,8 @@ T 4500 4650 5 8 1 1 0 0 1
 pinnumber=39
 T 4500 4650 5 8 0 1 0 0 1
 pinseq=39
+T 4500 4600 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 4300 4400 4300 1 0 0
 {
@@ -381,6 +459,8 @@ T 4500 4350 5 8 1 1 0 0 1
 pinnumber=40
 T 4500 4350 5 8 0 1 0 0 1
 pinseq=40
+T 4500 4300 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 4000 4400 4000 1 0 0
 {
@@ -390,6 +470,8 @@ T 4500 4050 5 8 1 1 0 0 1
 pinnumber=41
 T 4500 4050 5 8 0 1 0 0 1
 pinseq=41
+T 4500 4000 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 3700 4400 3700 1 0 0
 {
@@ -399,6 +481,8 @@ T 4500 3750 5 8 1 1 0 0 1
 pinnumber=42
 T 4500 3750 5 8 0 1 0 0 1
 pinseq=42
+T 4500 3700 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 3400 4400 3400 1 0 0
 {
@@ -408,6 +492,8 @@ T 4500 3450 5 8 1 1 0 0 1
 pinnumber=43
 T 4500 3450 5 8 0 1 0 0 1
 pinseq=43
+T 4500 3400 5 10 0 0 0 0 1
+pintype=io
 }
 P 2500 100 2500 200 1 0 0
 {
@@ -417,6 +503,8 @@ T 2550 150 5 8 1 1 0 2 1
 pinnumber=44
 T 2550 150 5 8 0 1 0 2 1
 pinseq=44
+T 2500 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 2600 8500 2600 8400 1 0 0
 {
@@ -426,6 +514,8 @@ T 2650 8450 5 8 1 1 0 0 1
 pinnumber=45
 T 2650 8450 5 8 0 1 0 0 1
 pinseq=45
+T 2600 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 4500 2900 4400 2900 1 0 0
 {
@@ -435,6 +525,8 @@ T 4500 2950 5 8 1 1 0 0 1
 pinnumber=46
 T 4500 2950 5 8 0 1 0 0 1
 pinseq=46
+T 4500 2900 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 2600 4400 2600 1 0 0
 {
@@ -444,6 +536,8 @@ T 4500 2650 5 8 1 1 0 0 1
 pinnumber=47
 T 4500 2650 5 8 0 1 0 0 1
 pinseq=47
+T 4500 2600 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 2300 4400 2300 1 0 0
 {
@@ -453,6 +547,8 @@ T 4500 2350 5 8 1 1 0 0 1
 pinnumber=48
 T 4500 2350 5 8 0 1 0 0 1
 pinseq=48
+T 4500 2300 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 2000 4400 2000 1 0 0
 {
@@ -462,6 +558,8 @@ T 4500 2050 5 8 1 1 0 0 1
 pinnumber=49
 T 4500 2050 5 8 0 1 0 0 1
 pinseq=49
+T 4500 2000 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 1700 4400 1700 1 0 0
 {
@@ -471,6 +569,8 @@ T 4500 1750 5 8 1 1 0 0 1
 pinnumber=50
 T 4500 1750 5 8 0 1 0 0 1
 pinseq=50
+T 4500 1700 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 1400 4400 1400 1 0 0
 {
@@ -480,6 +580,8 @@ T 4500 1450 5 8 1 1 0 0 1
 pinnumber=51
 T 4500 1450 5 8 0 1 0 0 1
 pinseq=51
+T 4500 1400 5 10 0 0 0 0 1
+pintype=io
 }
 P 2800 100 2800 200 1 0 0
 {
@@ -489,6 +591,8 @@ T 2850 150 5 8 1 1 0 2 1
 pinnumber=52
 T 2850 150 5 8 0 1 0 2 1
 pinseq=52
+T 2800 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 2900 8500 2900 8400 1 0 0
 {
@@ -498,6 +602,8 @@ T 2950 8450 5 8 1 1 0 0 1
 pinnumber=53
 T 2950 8450 5 8 0 1 0 0 1
 pinseq=53
+T 2900 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 4500 1100 4400 1100 1 0 0
 {
@@ -507,6 +613,8 @@ T 4500 1150 5 8 1 1 0 0 1
 pinnumber=54
 T 4500 1150 5 8 0 1 0 0 1
 pinseq=54
+T 4500 1100 5 10 0 0 0 0 1
+pintype=io
 }
 P 4500 800 4400 800 1 0 0
 {
@@ -516,6 +624,8 @@ T 4500 850 5 8 1 1 0 0 1
 pinnumber=55
 T 4500 850 5 8 0 1 0 0 1
 pinseq=55
+T 4500 800 5 10 0 0 0 0 1
+pintype=io
 }
 P 800 100 800 200 1 0 0
 {
@@ -525,6 +635,8 @@ T 750 105 5 8 1 1 90 6 1
 pinnumber=56
 T 750 100 5 8 0 1 90 6 1
 pinseq=56
+T 800 100 5 10 0 0 0 0 1
+pintype=io
 }
 P 1100 100 1100 200 1 0 0
 {
@@ -534,6 +646,8 @@ T 1050 105 5 8 1 1 90 6 1
 pinnumber=57
 T 1050 100 5 8 0 1 90 6 1
 pinseq=57
+T 1100 100 5 10 0 0 0 0 1
+pintype=io
 }
 P 3700 100 3700 200 1 0 0
 {
@@ -543,6 +657,8 @@ T 3650 105 5 8 1 1 90 6 1
 pinnumber=58
 T 3650 100 5 8 0 1 90 6 1
 pinseq=58
+T 3700 100 5 10 0 0 0 0 1
+pintype=io
 }
 P 4000 100 4000 200 1 0 0
 {
@@ -552,6 +668,8 @@ T 3950 105 5 8 1 1 90 6 1
 pinnumber=59
 T 3950 100 5 8 0 1 90 6 1
 pinseq=59
+T 4000 100 5 10 0 0 0 0 1
+pintype=io
 }
 P 3100 100 3100 200 1 0 0
 {
@@ -561,6 +679,8 @@ T 3150 150 5 8 1 1 0 2 1
 pinnumber=60
 T 3150 150 5 8 0 1 0 2 1
 pinseq=60
+T 3100 100 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 1200 8500 1200 8400 1 0 0
 {
@@ -570,6 +690,8 @@ T 1250 8450 5 8 1 1 0 0 1
 pinnumber=61
 T 1250 8450 5 8 0 1 0 0 1
 pinseq=61
+T 1200 8500 5 10 0 0 0 0 1
+pintype=pwr
 }
 P 200 8100 300 8100 1 0 0
 {
@@ -579,6 +701,8 @@ T 200 8150 5 8 1 1 0 6 1
 pinnumber=62
 T 200 8150 5 8 0 1 0 6 1
 pinseq=62
+T 200 8100 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 7800 300 7800 1 0 0
 {
@@ -588,6 +712,8 @@ T 200 7850 5 8 1 1 0 6 1
 pinnumber=63
 T 200 7850 5 8 0 1 0 6 1
 pinseq=63
+T 200 7800 5 10 0 0 0 0 1
+pintype=io
 }
 P 200 7500 300 7500 1 0 0
 {
@@ -597,4 +723,6 @@ T 200 7550 5 8 1 1 0 6 1
 pinnumber=64
 T 200 7550 5 8 0 1 0 6 1
 pinseq=64
+T 200 7500 5 10 0 0 0 0 1
+pintype=io
 }