Joseph Coffland [Sun, 6 Nov 2016 01:44:22 +0000 (18:44 -0700)]
Removed short lines
Joseph Coffland [Sun, 6 Nov 2016 00:55:11 +0000 (17:55 -0700)]
All lines at multiples of 45 degrees
Joseph Coffland [Sat, 5 Nov 2016 09:52:21 +0000 (02:52 -0700)]
Fixed connector positions and locked them
Joseph Coffland [Sat, 5 Nov 2016 09:44:27 +0000 (02:44 -0700)]
Moved all unlocked parts, lines and vias on to grid. Fixed via thermals. Lots of fixes to silk layer. Moved level shifters. Moved power cond. circuit. Added missing labels. Fixed R/SERIAL labels. Aligned polygons.
Doug Coffland [Thu, 3 Nov 2016 19:28:50 +0000 (12:28 -0700)]
assigned part numbers for components recently added
Doug Coffland [Thu, 3 Nov 2016 03:10:42 +0000 (20:10 -0700)]
added capacitance pours to bottom layer, all DRC and DFM errors cleared
Doug Coffland [Wed, 2 Nov 2016 22:55:15 +0000 (15:55 -0700)]
layout complete with no legitimate DRC errors, changed testpoints a bit in power.sch and rpi_bus.sch to make routing easier
Doug Coffland [Mon, 31 Oct 2016 21:47:45 +0000 (14:47 -0700)]
Merge branch 'master' of https://github.com/buildbotics/pcb
Doug Coffland [Mon, 31 Oct 2016 21:47:06 +0000 (14:47 -0700)]
removed and replaced caps on schematic and layout and added footprint for one electolytic"
Doug [Mon, 31 Oct 2016 20:42:31 +0000 (13:42 -0700)]
picked final caps
Doug [Mon, 31 Oct 2016 19:45:39 +0000 (12:45 -0700)]
new hbridge.asc
Doug [Mon, 31 Oct 2016 19:13:12 +0000 (12:13 -0700)]
Merge branch 'master' of https://github.com/buildbotics/pcb
Doug [Mon, 31 Oct 2016 19:11:48 +0000 (12:11 -0700)]
corrected state machine
Doug Coffland [Mon, 31 Oct 2016 05:11:50 +0000 (22:11 -0700)]
replaced caps with values that Joe and I agreed upon
Joseph Coffland [Mon, 31 Oct 2016 01:36:52 +0000 (18:36 -0700)]
Updated hbrdige sim
Joseph Coffland [Sun, 30 Oct 2016 20:31:14 +0000 (13:31 -0700)]
Merge branch 'master' of github.com:buildbotics/pcb
Joseph Coffland [Sun, 30 Oct 2016 20:31:01 +0000 (13:31 -0700)]
h-bridge sim improvements
Doug Coffland [Sun, 30 Oct 2016 20:00:02 +0000 (13:00 -0700)]
removed all connections in layout and re-named layer 2 from ground to power and layer 3 from signal to ground
Doug Coffland [Sun, 30 Oct 2016 19:45:58 +0000 (12:45 -0700)]
removed unnecessary resistors in gate drive lines in motor_driver.sch and in layout
Doug Coffland [Sun, 30 Oct 2016 19:24:18 +0000 (12:24 -0700)]
removed old caps and imported new modeled caps into buildbotics_controller.pcb
Doug Coffland [Sun, 30 Oct 2016 19:18:11 +0000 (12:18 -0700)]
replaced power supply filter caps in motor_driver.sch with modeled components and added footprint files as needed
Doug Coffland [Sun, 30 Oct 2016 17:50:50 +0000 (10:50 -0700)]
removed C1 from power.sch and pcb layout
Doug [Sun, 30 Oct 2016 04:45:42 +0000 (21:45 -0700)]
didn't get hbridge.asc uploaded on last push
Doug [Sun, 30 Oct 2016 04:41:06 +0000 (21:41 -0700)]
.4V PtoP ripple and cap models specified
Doug [Sun, 30 Oct 2016 00:32:06 +0000 (17:32 -0700)]
removed test file
Doug [Sun, 30 Oct 2016 00:00:45 +0000 (17:00 -0700)]
'test'
Doug [Sat, 29 Oct 2016 23:44:39 +0000 (16:44 -0700)]
plot settings
Doug [Sat, 29 Oct 2016 23:39:49 +0000 (16:39 -0700)]
better version of model
Doug [Fri, 28 Oct 2016 03:27:06 +0000 (20:27 -0700)]
created model of 8 hbridges running in parallel and put it in hbridge directory
Doug Coffland [Mon, 24 Oct 2016 04:17:24 +0000 (21:17 -0700)]
all DFM errors cleared
Doug Coffland [Mon, 24 Oct 2016 03:27:21 +0000 (20:27 -0700)]
layout complete with no legitimate DRC errors, removed filter components on open collector lines in schematics, corrected connection of senseA lines in drivers
Joseph Coffland [Fri, 21 Oct 2016 08:14:56 +0000 (01:14 -0700)]
Changed motor MOSFETs
Joseph Coffland [Fri, 21 Oct 2016 08:03:26 +0000 (01:03 -0700)]
Version numbers
Joseph Coffland [Fri, 21 Oct 2016 07:57:39 +0000 (00:57 -0700)]
Updated power conditioning circuit
Joseph Coffland [Fri, 21 Oct 2016 07:57:15 +0000 (00:57 -0700)]
Restored Doug's hbridge sim
Joseph Coffland [Fri, 21 Oct 2016 07:21:05 +0000 (00:21 -0700)]
Fixed cap values
Joseph Coffland [Fri, 21 Oct 2016 07:07:53 +0000 (00:07 -0700)]
Added low pass filters
Doug [Thu, 20 Oct 2016 20:19:40 +0000 (13:19 -0700)]
created hbridge model (spice/hbridge.asc)
Doug Coffland [Thu, 20 Oct 2016 07:07:58 +0000 (00:07 -0700)]
Layout complete with new dual mosfet chips that have heat tabs
Doug Coffland [Thu, 20 Oct 2016 03:55:08 +0000 (20:55 -0700)]
Merge branch 'master' of https://github.com/buildbotics/pcb
Doug Coffland [Thu, 20 Oct 2016 00:13:13 +0000 (17:13 -0700)]
new schematic reflects new dual mosfets with drain tabs, corrected routing of ASENSE test point line, it was going to the wrong place
Joseph Coffland [Wed, 19 Oct 2016 09:52:32 +0000 (02:52 -0700)]
Merge branch 'master' of github.com:buildbotics/pcb
Joseph Coffland [Wed, 19 Oct 2016 09:52:17 +0000 (02:52 -0700)]
Improved power conditioning simulation
Doug Coffland [Wed, 19 Oct 2016 06:43:46 +0000 (23:43 -0700)]
assigned part numbers to power.sch, finished layout in buildbotics_controller.pcb, put in new power circuit, moved +5 iso, +5Vm, and +3.3Vm powersupplies around for better routing, moved digital isolator circuit and rerouted lines from digital isolator to AVR
Doug [Mon, 17 Oct 2016 22:34:21 +0000 (15:34 -0700)]
Merge branch 'master' of https://github.com/buildbotics/pcb
Doug [Mon, 17 Oct 2016 22:30:51 +0000 (15:30 -0700)]
New version of power conditioning (power_cone_2.asc)
Doug Coffland [Sun, 16 Oct 2016 18:07:09 +0000 (11:07 -0700)]
assigned correct footprint to LM293DT in power.sch
Joseph Coffland [Sun, 16 Oct 2016 05:05:01 +0000 (22:05 -0700)]
Added new power conditioning circuit, some PCB fixes
Joseph Coffland [Sun, 16 Oct 2016 01:00:12 +0000 (18:00 -0700)]
Merge branch 'master' of github.com:buildbotics/pcb
Joseph Coffland [Sun, 16 Oct 2016 00:59:57 +0000 (17:59 -0700)]
Added power conditioning circuit sim
Doug Coffland [Fri, 14 Oct 2016 18:08:41 +0000 (11:08 -0700)]
Layout complete, no shorts, no opens, noDRC errors, no DFM errors from Advanced Circuits. Includes new L7986A layout and new place for 3-pin header for enable switch connection and new power supply charging circuit.
Joseph Coffland [Thu, 13 Oct 2016 00:47:48 +0000 (17:47 -0700)]
Fixed motor driver connections, shunk power supply symbols.
Doug Coffland [Thu, 13 Oct 2016 00:08:39 +0000 (17:08 -0700)]
removed network tags on CONNECTA CONNECTB and bemf lines.
Doug Coffland [Mon, 10 Oct 2016 23:31:54 +0000 (16:31 -0700)]
created footprint for DRV8711, added footprints for Nichicon 3mm cap and TO252. Updated references to new footprints in schematics. All footprints now load into pcb and I can start routing
Doug Coffland [Mon, 10 Oct 2016 20:16:06 +0000 (13:16 -0700)]
trinamic and old power supply circuit removed from buildbotics_controller.pcb
Doug Coffland [Mon, 10 Oct 2016 19:02:36 +0000 (12:02 -0700)]
assigned component model numbers and descriptions as needed in motor_driver.sch and motor_module.sch
Doug Coffland [Mon, 10 Oct 2016 05:28:10 +0000 (22:28 -0700)]
added models and descriptions to new resistors in motor_module.sch
Doug Coffland [Mon, 10 Oct 2016 05:24:33 +0000 (22:24 -0700)]
corrected conflicting refdes's in power.sch
Doug Coffland [Mon, 10 Oct 2016 05:06:28 +0000 (22:06 -0700)]
replaced power conditioning circuit in power.schj
Doug Coffland [Mon, 10 Oct 2016 03:50:53 +0000 (20:50 -0700)]
added symbols needed for new power conditioning circuit
Doug Coffland [Mon, 10 Oct 2016 03:24:06 +0000 (20:24 -0700)]
added model numbers to C1 an C2 in rpi_bus.sch. The are caps that Joe added to the serial lines.
Joseph Coffland [Sun, 9 Oct 2016 23:15:52 +0000 (16:15 -0700)]
Fixed schematic DRC violations
Joseph Coffland [Sun, 9 Oct 2016 22:58:53 +0000 (15:58 -0700)]
Added motor current test points
Joseph Coffland [Sun, 9 Oct 2016 22:26:29 +0000 (15:26 -0700)]
version number
Joseph Coffland [Sun, 9 Oct 2016 22:20:59 +0000 (15:20 -0700)]
Added correct refdes to resistors
Joseph Coffland [Sun, 9 Oct 2016 22:13:51 +0000 (15:13 -0700)]
Replaced TMC2660 with DRV8711, Added filtering to serial lines, Modified motor connector footprint pin numbers, Connected BEMF lines to AVR
Joseph Coffland [Thu, 29 Sep 2016 07:16:09 +0000 (00:16 -0700)]
Fixed cap value
Joseph Coffland [Sun, 21 Aug 2016 05:25:00 +0000 (22:25 -0700)]
Updated revision number
Joseph Coffland [Sat, 20 Aug 2016 08:54:07 +0000 (01:54 -0700)]
Added mounting blocks, removed unused LCD header
Joseph Coffland [Sat, 20 Aug 2016 07:04:13 +0000 (00:04 -0700)]
Added solder pads to D-Sub connector
Doug Coffland [Thu, 18 Aug 2016 18:29:35 +0000 (11:29 -0700)]
updated RPI connector to lower cost, shrouded connector
Doug Coffland [Thu, 18 Aug 2016 17:54:00 +0000 (10:54 -0700)]
fixed soldermask clearance on seveal vias
Joseph Coffland [Thu, 18 Aug 2016 02:31:52 +0000 (19:31 -0700)]
Doug's ground/power plane and clock line angle change suggestions
Joseph Coffland [Tue, 16 Aug 2016 04:54:40 +0000 (21:54 -0700)]
Split RPi footprint, Moved RPi mounting holes, Better noise immunity, Routing improvements.
Joseph Coffland [Fri, 5 Aug 2016 17:40:47 +0000 (10:40 -0700)]
Check all PCB major parts, improved routing, fixed MOSFETs
Doug Coffland [Fri, 29 Jul 2016 04:16:47 +0000 (21:16 -0700)]
layout done, DRC and DFM errors cleared, fixed footprint for P/U5 because footprint did not match symbol, reversed power rails in P/U5 because the appeared to be connected backwards, changed foorprint on P/Q2 from SOT23 to SOT23_3 because pins did not match symbol
Joseph Coffland [Thu, 28 Jul 2016 00:41:51 +0000 (17:41 -0700)]
Fixed PCB schematic path, Fixed bad MOSFET pin numbers
Joseph Coffland [Thu, 28 Jul 2016 00:10:30 +0000 (17:10 -0700)]
removed DXF files
Joseph Coffland [Tue, 26 Jul 2016 23:42:42 +0000 (16:42 -0700)]
Added i2c bus from RPi to AVR, fixed some part numbers
Joseph Coffland [Tue, 5 Jul 2016 08:01:35 +0000 (01:01 -0700)]
reorg
Doug Coffland [Mon, 4 Jul 2016 19:25:51 +0000 (12:25 -0700)]
added silk screen labels to pin header test points, moved P/R15 and P/R16 out from under the meanwell power supply footprint
Doug Coffland [Sun, 3 Jul 2016 17:10:55 +0000 (10:10 -0700)]
fixed a DRC error and corrected board width to 142.3mm
Doug Coffland [Sat, 2 Jul 2016 00:23:59 +0000 (17:23 -0700)]
changed some part numbers because we were using different models for exactly the same part. This allows us to get larger volumes and fewer different parts
Doug Coffland [Fri, 1 Jul 2016 04:31:46 +0000 (21:31 -0700)]
cleared all dfm errors and moved silkscreen labels around
Doug Coffland [Fri, 1 Jul 2016 02:25:59 +0000 (19:25 -0700)]
adjusted connector positions to match panel cutouts
Doug Coffland [Thu, 30 Jun 2016 05:36:01 +0000 (22:36 -0700)]
layout complete, not opens, shorts, DRC errors,or DFM errors. Changed Diode D1 in power.sch to get smaller footprint.
Doug Coffland [Wed, 29 Jun 2016 18:42:59 +0000 (11:42 -0700)]
added models and footprints to new components in power.sch and periperals.sch
Joseph Coffland [Wed, 29 Jun 2016 02:55:49 +0000 (19:55 -0700)]
Fixed schematic DRC warings/errors, added caps to H/J4 input lines, Renamed peripherial module P->H to avoid conflicts with RPI module
Joseph Coffland [Mon, 27 Jun 2016 08:31:57 +0000 (01:31 -0700)]
Tweaks
Joseph Coffland [Mon, 27 Jun 2016 08:17:59 +0000 (01:17 -0700)]
Updated soft power on circuit with comparator.
Joseph Coffland [Sun, 26 Jun 2016 23:24:09 +0000 (16:24 -0700)]
Fixed zener alignment, added new poposed power conditioning circuit.
Joseph Coffland [Sun, 26 Jun 2016 21:32:11 +0000 (14:32 -0700)]
Rearranged circuit
Doug Coffland [Sun, 26 Jun 2016 20:30:18 +0000 (13:30 -0700)]
reconnected C20 to grid of Q2
Doug Coffland [Sun, 26 Jun 2016 04:50:53 +0000 (21:50 -0700)]
modified softstart circuit in power.sch, removed Zener in polarity control circuit, changed R20 to 100 ohms decreasing C1 charge time, reduced C20 to 1uF reducing Q1 turnon time, added D4 to provide fast discharge path for C20
Doug Coffland [Sat, 25 Jun 2016 21:31:28 +0000 (14:31 -0700)]
added inrush control circuit to power.sch
Joseph Coffland [Fri, 24 Jun 2016 22:43:12 +0000 (15:43 -0700)]
Added load switches back on 25-pin conn
Doug Coffland [Fri, 24 Jun 2016 03:55:47 +0000 (20:55 -0700)]
adjusted clearance on SRF2012A footprint, all DFM errors now cleared with Advanced Circuits
Doug Coffland [Thu, 23 Jun 2016 04:16:28 +0000 (21:16 -0700)]
changed zener symbol to match footprint and updated power.sch, note this was done before the previous push but I for did not get these files included. Current status is layout is done, but still needs DFM checks
Doug Coffland [Thu, 23 Jun 2016 04:12:54 +0000 (21:12 -0700)]
completed layout with no DRC, no shorts, and all nets routed, still need to submit to Advanced Circuits for DFM check, increased clearance on SRF2012A footprint, added new schottkyA2K1.sym symbol due to discrepancy on pin numbering between symbol and footprints, created new SO8_extra_clearance footprint because stantard SO8 did not have enough clearance to pass DRC checks
Doug Coffland [Mon, 20 Jun 2016 17:29:13 +0000 (10:29 -0700)]
corrected wiring on P/J1, fixed wiring on motor connectors, connected P/R1 to pwr_en so Vs is off when the switch is off