Joseph Coffland [Thu, 11 Feb 2016 09:47:56 +0000 (01:47 -0800)]
Merged changes, changed all 0603->0805
Doug Coffland [Thu, 11 Feb 2016 02:23:36 +0000 (18:23 -0800)]
corrected spelling on footprint name for LM5160
Doug Coffland [Wed, 10 Feb 2016 23:12:34 +0000 (15:12 -0800)]
fixed rpi footprint and added board outline to footprint. Updated rpi_bus.sch with correct footprint
Doug Coffland [Wed, 10 Feb 2016 18:41:36 +0000 (10:41 -0800)]
fixed pin numbers on mosfet symboll for load/Q2
Doug Coffland [Wed, 10 Feb 2016 17:56:42 +0000 (09:56 -0800)]
added footprint for 6088uF cap and updated power.sch to reference it
Doug Coffland [Wed, 10 Feb 2016 01:59:01 +0000 (17:59 -0800)]
added footprint for P/T1 and updated power.sch
Doug Coffland [Wed, 10 Feb 2016 00:47:38 +0000 (16:47 -0800)]
Merge branch 'master' of https://github.com/buildbotics/machine-controller
Doug Coffland [Wed, 10 Feb 2016 00:46:24 +0000 (16:46 -0800)]
added footprint file for P/D1
Joseph Coffland [Wed, 10 Feb 2016 00:38:53 +0000 (16:38 -0800)]
Merged changes
Joseph Coffland [Wed, 10 Feb 2016 00:07:06 +0000 (16:07 -0800)]
Added bleeder resistor to discharge cap
Doug Coffland [Tue, 9 Feb 2016 23:29:36 +0000 (15:29 -0800)]
referenced footprint for J1
Doug Coffland [Tue, 9 Feb 2016 23:24:50 +0000 (15:24 -0800)]
changed Power Supply J1 from 350944 (which is male) to 643230 (which is female) which now mates correctly with the male connector on the mean well GS280 power supply. Created footprint for 643230. Referenced 643230 footprint in Power schematic. Reconnected Vs to pins 1 & 2 and GND to pins 3 & 4 to match mean well power supply output.
Doug Coffland [Tue, 9 Feb 2016 19:33:28 +0000 (11:33 -0800)]
fixed kingbright footprint again
Doug Coffland [Tue, 9 Feb 2016 05:32:07 +0000 (21:32 -0800)]
fixed name of kingbright footprint file
Doug Coffland [Tue, 9 Feb 2016 05:22:09 +0000 (21:22 -0800)]
added footprint for Kingbright led
Joseph Coffland [Tue, 9 Feb 2016 03:10:32 +0000 (19:10 -0800)]
Fixed LED
Joseph Coffland [Mon, 8 Feb 2016 04:07:38 +0000 (20:07 -0800)]
Added power switch terminal
Joseph Coffland [Mon, 8 Feb 2016 02:35:31 +0000 (18:35 -0800)]
Changed power connector
Joseph Coffland [Mon, 8 Feb 2016 02:31:56 +0000 (18:31 -0800)]
v2.0 close to done, finalized connectors, add some footprints, removed unused footprints
Joseph Coffland [Sun, 7 Feb 2016 04:18:15 +0000 (20:18 -0800)]
New load circuit
Joseph Coffland [Fri, 5 Feb 2016 09:57:22 +0000 (01:57 -0800)]
Shortened refdes, make changes, docs
Joseph Coffland [Fri, 5 Feb 2016 09:20:28 +0000 (01:20 -0800)]
Updated docs
Joseph Coffland [Fri, 5 Feb 2016 09:13:31 +0000 (01:13 -0800)]
Fixed DRC errors
Joseph Coffland [Fri, 5 Feb 2016 07:37:42 +0000 (23:37 -0800)]
Added probe line, dropped RPi -> AVR RTS
Joseph Coffland [Thu, 4 Feb 2016 03:07:14 +0000 (19:07 -0800)]
Fixed net attributes
Joseph Coffland [Sun, 31 Jan 2016 22:08:01 +0000 (14:08 -0800)]
Assigned numbers
Joseph Coffland [Sun, 31 Jan 2016 22:07:50 +0000 (14:07 -0800)]
Removed power supply diode voltage source
Joseph Coffland [Fri, 29 Jan 2016 02:23:29 +0000 (18:23 -0800)]
New version of relay driver circuit
Joseph Coffland [Thu, 28 Jan 2016 02:24:07 +0000 (18:24 -0800)]
Finishing up initial draft of v2.0
Joseph Coffland [Wed, 27 Jan 2016 21:15:09 +0000 (13:15 -0800)]
Update footprints and attributes
Joseph Coffland [Wed, 27 Jan 2016 20:55:21 +0000 (12:55 -0800)]
Finishing up initial draft of v2.0
Joseph Coffland [Wed, 27 Jan 2016 20:17:44 +0000 (12:17 -0800)]
Finishing up initial draft of v2.0
Joseph Coffland [Wed, 27 Jan 2016 00:59:57 +0000 (16:59 -0800)]
More progress on v2.0
Joseph Coffland [Wed, 27 Jan 2016 00:59:23 +0000 (16:59 -0800)]
Removed abandoned symbols
Joseph Coffland [Wed, 27 Jan 2016 00:49:26 +0000 (16:49 -0800)]
Merge branch 'v2'
Joseph Coffland [Wed, 27 Jan 2016 00:48:22 +0000 (16:48 -0800)]
More progress on v2.0
Joseph Coffland [Wed, 27 Jan 2016 00:35:52 +0000 (16:35 -0800)]
More progress on v2.0
Joseph Coffland [Tue, 5 Jan 2016 10:58:57 +0000 (02:58 -0800)]
Added RS485 termination resistor
Joseph Coffland [Tue, 5 Jan 2016 10:52:41 +0000 (02:52 -0800)]
Initial complete v2 schematic
Joseph Coffland [Tue, 5 Jan 2016 10:33:39 +0000 (02:33 -0800)]
working on v2
Doug Coffland [Mon, 30 Nov 2015 06:50:37 +0000 (22:50 -0800)]
added files describing back, bottom, and top of enclosure, and added logo file
Doug Coffland [Mon, 30 Nov 2015 06:30:35 +0000 (22:30 -0800)]
corrected bullet format in readme
Doug Coffland [Mon, 30 Nov 2015 06:27:15 +0000 (22:27 -0800)]
added all files related to front panel and front view
Doug Coffland [Mon, 30 Nov 2015 06:13:11 +0000 (22:13 -0800)]
started repository with readme.md file
Joseph Coffland [Sun, 1 Nov 2015 19:55:39 +0000 (11:55 -0800)]
30v not 36v
Joseph Coffland [Mon, 19 Oct 2015 20:44:35 +0000 (13:44 -0700)]
General cleanup, added copyright, titles and page numbers to schematics
Doug Coffland [Sun, 27 Sep 2015 18:39:35 +0000 (11:39 -0700)]
added tabs to RPI/J1 and RPI/J2; confirmed no DFM errors on Advanced Circuits DFM tool
Joseph Coffland [Sun, 27 Sep 2015 07:38:26 +0000 (00:38 -0700)]
Fixed shorts
Joseph Coffland [Fri, 25 Sep 2015 21:29:03 +0000 (14:29 -0700)]
Tweaks
Joseph Coffland [Fri, 25 Sep 2015 21:24:55 +0000 (14:24 -0700)]
Enabled and positioned all refdes, Fixed outline layer, Cleaned up polygon fills
Joseph Coffland [Fri, 25 Sep 2015 21:06:46 +0000 (14:06 -0700)]
Enabled and positioned all refdes, Fixed outline layer, Cleaned up polygon fills
Doug Coffland [Fri, 11 Sep 2015 02:36:12 +0000 (19:36 -0700)]
reviewed and verified all footprints, updated BOMs with new io connecton for e-stop, updated rpi_bus.sch with new connector circuit for e-stop, created BOMs and centroid files for thru hole and no through hole in excel format.
Doug Coffland [Thu, 10 Sep 2015 20:45:43 +0000 (13:45 -0700)]
removed unused footprints, all NICHICON cap footprints
Doug Coffland [Thu, 10 Sep 2015 18:29:04 +0000 (11:29 -0700)]
replaced 0201 caps on microprocessor.sch with 0402s to lower assembly cost; affected combined.pcb, BOM.pcb, and ASSY_BOM.xlsx
Doug Coffland [Thu, 10 Sep 2015 16:43:31 +0000 (09:43 -0700)]
removed unused footprint file ICS551.fp
Doug Coffland [Thu, 10 Sep 2015 16:39:56 +0000 (09:39 -0700)]
removed undused footprint file, CSR2010.fp
Doug Coffland [Tue, 8 Sep 2015 00:29:54 +0000 (17:29 -0700)]
corrected pin order on PS1/J2 footprint and then fixed layout accordingly
Doug Coffland [Mon, 7 Sep 2015 21:29:30 +0000 (14:29 -0700)]
adjusted motor connectors to .8 inch centers
Doug Coffland [Sun, 6 Sep 2015 22:56:55 +0000 (15:56 -0700)]
io labels in microprocessor.sch corrected
Joseph Coffland [Sun, 6 Sep 2015 22:17:43 +0000 (15:17 -0700)]
Merge branch 'master' of github.com:buildbotics/machine-controller
Joseph Coffland [Sun, 6 Sep 2015 22:17:32 +0000 (15:17 -0700)]
Added output
Doug Coffland [Sun, 6 Sep 2015 19:24:22 +0000 (12:24 -0700)]
Merge branch 'master' of https://github.com/buildbotics/machine-controller
Doug Coffland [Sun, 6 Sep 2015 19:16:19 +0000 (12:16 -0700)]
Corrected connection to 5VOUT on motor drivers, updated layout, expanded ground plane on layout
Doug Coffland [Sun, 6 Sep 2015 16:56:27 +0000 (09:56 -0700)]
corrected land pattern for C17 on the Motor Drivers
Joseph Coffland [Sun, 6 Sep 2015 07:28:58 +0000 (00:28 -0700)]
Schematic updates
Doug Coffland [Sun, 6 Sep 2015 05:55:23 +0000 (22:55 -0700)]
scrubbed BOM and created ASSY_BOM.xlsx for assy estimate, corrected footprint for PS1/C4, made land pattern for OSC match datasheet land pattern, assigned part numbers to MP1/C2 and C3 and corrected footprints to 0201 from 0603
Doug Coffland [Sat, 5 Sep 2015 19:05:31 +0000 (12:05 -0700)]
corrected soldermask line width around raspberry_pi mounting holes
Doug Coffland [Sat, 5 Sep 2015 18:51:50 +0000 (11:51 -0700)]
corrected raspberry pi connector and board footprint, added outline to layout, corrected footprint on PS1/C1, started working on final BOM file
Doug Coffland [Sat, 5 Sep 2015 02:19:06 +0000 (19:19 -0700)]
corrected footprint size for PS1/C1
Doug Coffland [Fri, 4 Sep 2015 21:01:28 +0000 (14:01 -0700)]
trying to sync with git
Doug Coffland [Fri, 4 Sep 2015 20:56:01 +0000 (13:56 -0700)]
cleared all DFM errors and created BOM
Doug Coffland [Fri, 4 Sep 2015 19:21:57 +0000 (12:21 -0700)]
moved clock oscillator on board reducing total clock line length from 8 inches to 3 inches
Doug Coffland [Thu, 3 Sep 2015 21:12:22 +0000 (14:12 -0700)]
New board with corrected connectors, removal of extra IRM-10-5, replacement of digital isolators withoptos, etc... No DRC errors, not errors or warnings at Advanced Circuits DFM. This board is marked Version 1.
Joseph Coffland [Tue, 1 Sep 2015 03:31:25 +0000 (20:31 -0700)]
Clean up
Joseph Coffland [Tue, 1 Sep 2015 03:28:53 +0000 (20:28 -0700)]
Removed obsolete io schematic
Joseph Coffland [Tue, 1 Sep 2015 03:28:04 +0000 (20:28 -0700)]
Removed generated .bom file
Joseph Coffland [Tue, 1 Sep 2015 03:26:25 +0000 (20:26 -0700)]
Ignore pcb backup files
Doug Coffland [Tue, 1 Sep 2015 01:51:27 +0000 (18:51 -0700)]
Corrected pin swap of serial_rx and serial_tx and fixed missing refdes on RPI connector
Doug Coffland [Mon, 31 Aug 2015 23:10:56 +0000 (16:10 -0700)]
Merge branch 'master' of https://github.com/buildbotics/machine-controller
Doug Coffland [Mon, 31 Aug 2015 23:09:49 +0000 (16:09 -0700)]
dir_4 and step_4 were swapped on the schematic and therefore swapped ont the layout. The schematic and layout have been corrected.
Joseph Coffland [Mon, 31 Aug 2015 21:17:20 +0000 (14:17 -0700)]
Added Makefile
Joseph Coffland [Mon, 31 Aug 2015 19:47:25 +0000 (12:47 -0700)]
Removed backup files and zip
Doug Coffland [Mon, 31 Aug 2015 02:25:58 +0000 (19:25 -0700)]
All DRC errors cleared. No errors or warnings using Advanced Circuits FreeDFM tool.
Doug Coffland [Sun, 30 Aug 2015 17:31:54 +0000 (10:31 -0700)]
corrected footprint for 2-pin Molex. All DRC below 7.5mil corrected and no warning about hole too close to line.
Doug Coffland [Sun, 30 Aug 2015 16:36:56 +0000 (09:36 -0700)]
Corrected foot print for 260 mil cap and 8 by 10 cap - All DRC errors below 7.5 mils are now correct. Still get a warning however that a hole is too close to a line.
Doug Coffland [Sun, 30 Aug 2015 15:40:36 +0000 (08:40 -0700)]
corrected hole size for 26 pin dsub foot print and corrected all DRC errors below 6 mils
Doug Coffland [Sun, 30 Aug 2015 14:55:32 +0000 (07:55 -0700)]
Corrected some errors so it now passes BayArea Circuits DFM tool and corrected a bunch of local DRC errors. Still working on correcting DRC errors.
Doug Coffland [Sat, 29 Aug 2015 22:49:27 +0000 (15:49 -0700)]
added copyright statement to silkscreen
Doug Coffland [Sat, 29 Aug 2015 22:38:23 +0000 (15:38 -0700)]
turned off component names
Doug Coffland [Sat, 29 Aug 2015 22:15:25 +0000 (15:15 -0700)]
cleaned up unused files
Doug Coffland [Sat, 29 Aug 2015 22:06:22 +0000 (15:06 -0700)]
This is a major rework. I changed board size to 5 X 8 inches and 4 layers. I also added the 26-Pin DSub connector for the IO connector. I also reduced the number of drivers to four. I added mounting holes and updated the BOM to reflect the standoffs, screws and nuts needed to mount the board and the raspberry pi.
Doug Coffland [Wed, 26 Aug 2015 02:51:40 +0000 (19:51 -0700)]
All warnings anre now cleared and all rats have been routed. In addition, BOM has been created (see BOM.ods) and gerbers are presnt
Doug Coffland [Tue, 25 Aug 2015 21:44:33 +0000 (14:44 -0700)]
I fixed the warnings but there gpcb still reports that one rat is not routed, even though it is not apparent from looking at the board. I also cut the board down to it's final size which is 85mm x 226 mm.
Doug Coffland [Tue, 25 Aug 2015 04:53:02 +0000 (21:53 -0700)]
completed combined board layout. Still have warnings and one being reported as not routing. Will continue to investigate
Doug Coffland [Sat, 22 Aug 2015 17:54:04 +0000 (10:54 -0700)]
fixed clock lines by adding clock.sch schematic ad symbol and modified isolation.sch accordingly
Doug Coffland [Sat, 22 Aug 2015 05:07:45 +0000 (22:07 -0700)]
continue to enter schematic and update pcb layout
Doug Coffland [Thu, 20 Aug 2015 04:43:26 +0000 (21:43 -0700)]
continuing to enter schematics
Doug Coffland [Wed, 19 Aug 2015 22:47:26 +0000 (15:47 -0700)]
cleanup
Doug Coffland [Wed, 19 Aug 2015 21:53:02 +0000 (14:53 -0700)]
Started combined board
Doug Coffland [Thu, 13 Aug 2015 03:15:38 +0000 (20:15 -0700)]
moved connections on J3 from Vss to PGND