From 23611d4f44fa60f487354cb7d8892dfcbde4af3d Mon Sep 17 00:00:00 2001
From: Joseph Coffland <joseph@cauldrondevelopment.com>
Date: Fri, 21 Oct 2016 01:14:56 -0700
Subject: [PATCH] Changed motor MOSFETs

---
 motor_driver.sch         |  88 ++++++++++--------------
 symbols/stl40dn3llh5.sym | 145 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 181 insertions(+), 52 deletions(-)
 create mode 100644 symbols/stl40dn3llh5.sym

diff --git a/motor_driver.sch b/motor_driver.sch
index e348bf4..2170e91 100644
--- a/motor_driver.sch
+++ b/motor_driver.sch
@@ -264,19 +264,6 @@ N 44500 44300 46300 44300 4
 N 48700 47100 50800 47100 4
 N 48700 46900 49600 46900 4
 C 49000 46600 1 0 0 gnd.sym
-C 51100 47800 1 0 0 csd88537nd.sym
-{
-T 51320 47825 5 10 1 1 0 0 1
-device=CSD88537ND
-T 51320 49150 5 10 0 0 0 0 1
-footprint=SO8_extra_clearance
-T 52245 48950 5 10 1 1 0 0 1
-refdes=Q1
-T 51100 47800 5 10 0 0 0 0 1
-model=CSD88537ND
-T 51100 47800 5 10 0 0 0 0 1
-description=MOSFET 2N-CH 60V 15A 8SOIC
-}
 C 52700 48800 1 0 0 Vs.sym
 {
 T 52800 49500 5 10 0 0 0 0 1
@@ -288,19 +275,6 @@ N 52700 48600 52900 48600 4
 N 52700 48200 52900 48200 4
 N 52900 48200 52900 48000 4
 N 52700 48000 53400 48000 4
-C 51100 46400 1 0 0 csd88537nd.sym
-{
-T 51320 47750 5 10 0 0 0 0 1
-footprint=SO8_extra_clearance
-T 51320 46425 5 10 1 1 0 0 1
-device=CSD88537ND
-T 52645 47450 5 10 1 1 0 0 1
-refdes=Q2
-T 51100 46400 5 10 0 0 0 0 1
-model=CSD88537ND
-T 51100 46400 5 10 0 0 0 0 1
-description=MOSFET 2N-CH 60V 15A 8SOIC
-}
 N 52700 47000 52900 47000 4
 N 52900 47000 52900 47200 4
 N 52700 47200 53300 47200 4
@@ -353,19 +327,6 @@ description=RES SMD 0.05 OHM 1% 3W 2512
 }
 N 48700 45000 49600 45000 4
 C 49000 44700 1 0 0 gnd.sym
-C 51100 44300 1 0 0 csd88537nd.sym
-{
-T 51320 45650 5 10 0 0 0 0 1
-footprint=SO8_extra_clearance
-T 51320 44325 5 10 1 1 0 0 1
-device=CSD88537ND
-T 52245 45450 5 10 1 1 0 0 1
-refdes=Q3
-T 51100 44300 5 10 0 0 0 0 1
-model=CSD88537ND
-T 51100 44300 5 10 0 0 0 0 1
-description=MOSFET 2N-CH 60V 15A 8SOIC
-}
 C 52700 45300 1 0 0 Vs.sym
 {
 T 52800 46000 5 10 0 0 0 0 1
@@ -377,19 +338,6 @@ N 52700 45100 52900 45100 4
 N 52700 44700 52900 44700 4
 N 52900 44700 52900 44500 4
 N 52700 44500 53600 44500 4
-C 51100 42900 1 0 0 csd88537nd.sym
-{
-T 51320 44250 5 10 0 0 0 0 1
-footprint=SO8_extra_clearance
-T 51320 42925 5 10 1 1 0 0 1
-device=CSD88537ND
-T 52645 43950 5 10 1 1 0 0 1
-refdes=Q4
-T 51100 42900 5 10 0 0 0 0 1
-model=CSD88537ND
-T 51100 42900 5 10 0 0 0 0 1
-description=MOSFET 2N-CH 60V 15A 8SOIC
-}
 N 52700 43500 52900 43500 4
 N 52900 43500 52900 43700 4
 N 52700 43700 53800 43700 4
@@ -698,3 +646,39 @@ N 46300 46400 43900 46400 4
 N 44400 46600 46300 46600 4
 N 53800 45400 53800 43700 4
 N 44100 42200 43900 42200 4
+C 51100 47800 1 0 0 stl40dn3llh5.sym
+{
+T 51220 47825 5 10 1 1 0 0 1
+device=STL40DN3LLH5
+T 51320 49150 5 10 0 0 0 0 1
+footprint=PowerFlat-8
+T 52245 48950 5 10 1 1 0 0 1
+refdes=Q1
+}
+C 51100 46400 1 0 0 stl40dn3llh5.sym
+{
+T 51220 46425 5 10 1 1 0 0 1
+device=STL40DN3LLH5
+T 51320 47750 5 10 0 0 0 0 1
+footprint=PowerFlat-8
+T 52245 47550 5 10 1 1 0 0 1
+refdes=Q2
+}
+C 51100 44300 1 0 0 stl40dn3llh5.sym
+{
+T 51220 44325 5 10 1 1 0 0 1
+device=STL40DN3LLH5
+T 51320 45650 5 10 0 0 0 0 1
+footprint=PowerFlat-8
+T 52245 45450 5 10 1 1 0 0 1
+refdes=Q3
+}
+C 51100 42900 1 0 0 stl40dn3llh5.sym
+{
+T 51220 42925 5 10 1 1 0 0 1
+device=STL40DN3LLH5
+T 51320 44250 5 10 0 0 0 0 1
+footprint=PowerFlat-8
+T 52245 44050 5 10 1 1 0 0 1
+refdes=Q4
+}
diff --git a/symbols/stl40dn3llh5.sym b/symbols/stl40dn3llh5.sym
new file mode 100644
index 0000000..927353e
--- /dev/null
+++ b/symbols/stl40dn3llh5.sym
@@ -0,0 +1,145 @@
+v 20130925 2
+B 200 0 1200 1100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 600 200 600 1 0 0
+{
+T 0 600 5 10 0 0 180 0 1
+pintype=in
+T 255 620 5 10 1 1 0 0 1
+pinlabel=G1
+T 180 620 5 10 1 1 0 6 1
+pinnumber=2
+T 0 600 5 10 0 0 180 0 1
+pinseq=2
+}
+P 0 800 200 800 1 0 0
+{
+T 0 800 5 10 0 0 180 0 1
+pintype=pas
+T 255 820 5 10 1 1 0 0 1
+pinlabel=S1
+T 180 820 5 10 1 1 0 6 1
+pinnumber=1
+T 0 800 5 10 0 0 180 0 1
+pinseq=1
+}
+P 0 400 200 400 1 0 0
+{
+T 0 400 5 10 0 0 180 0 1
+pintype=pas
+T 255 420 5 10 1 1 0 0 1
+pinlabel=S2
+T 180 420 5 10 1 1 0 6 1
+pinnumber=3
+T 0 400 5 10 0 0 180 0 1
+pinseq=3
+}
+P 0 200 200 200 1 0 0
+{
+T 0 200 5 10 0 0 180 0 1
+pintype=in
+T 255 220 5 10 1 1 0 0 1
+pinlabel=G2
+T 180 220 5 10 1 1 0 6 1
+pinnumber=4
+T 0 200 5 10 0 0 180 0 1
+pinseq=4
+}
+P 1600 800 1400 800 1 0 0
+{
+T 1600 800 5 10 0 0 0 0 1
+pintype=pas
+T 1345 820 5 10 1 1 0 6 1
+pinlabel=D1
+T 1420 820 5 10 1 1 0 0 1
+pinnumber=8
+T 1600 800 5 10 0 0 0 0 1
+pinseq=8
+}
+P 1600 600 1400 600 1 0 0
+{
+T 1600 600 5 10 0 0 0 0 1
+pintype=pas
+T 1345 620 5 10 1 1 0 6 1
+pinlabel=D1
+T 1420 620 5 10 1 1 0 0 1
+pinnumber=7
+T 1600 600 5 10 0 0 0 0 1
+pinseq=7
+}
+P 1600 400 1400 400 1 0 0
+{
+T 1600 400 5 10 0 0 0 0 1
+pintype=pas
+T 1345 420 5 10 1 1 0 6 1
+pinlabel=D2
+T 1420 420 5 10 1 1 0 0 1
+pinnumber=6
+T 1600 400 5 10 0 0 0 0 1
+pinseq=6
+}
+P 1600 200 1400 200 1 0 0
+{
+T 1600 200 5 10 0 0 0 0 1
+pintype=pas
+T 1345 220 5 10 1 1 0 6 1
+pinlabel=D2
+T 1420 220 5 10 1 1 0 0 1
+pinnumber=5
+T 1600 200 5 10 0 0 0 0 1
+pinseq=5
+}
+L 900 675 700 675 3 0 0 0 -1 -1
+L 700 675 700 600 3 0 0 0 -1 -1
+L 900 700 850 700 3 0 0 0 -1 -1
+L 700 700 750 700 3 0 0 0 -1 -1
+L 775 700 825 700 3 0 0 0 -1 -1
+L 875 700 875 800 3 0 0 0 -1 -1
+L 725 700 725 800 3 0 0 0 -1 -1
+L 200 800 1400 800 3 0 0 0 -1 -1
+L 800 700 825 750 3 0 0 0 -1 -1
+L 825 750 775 750 3 0 0 0 -1 -1
+L 775 750 800 700 3 0 0 0 -1 -1
+L 800 750 800 800 3 0 0 0 -1 -1
+L 900 800 900 850 3 0 0 0 -1 -1
+L 825 825 825 875 3 0 0 0 -1 -1
+L 825 850 900 850 3 0 0 0 -1 -1
+L 775 825 825 850 3 0 0 0 -1 -1
+L 775 875 825 850 3 0 0 0 -1 -1
+L 775 825 775 875 3 0 0 0 -1 -1
+L 700 800 700 850 3 0 0 0 -1 -1
+L 700 850 775 850 3 0 0 0 -1 -1
+V 800 775 150 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 900 275 700 275 3 0 0 0 -1 -1
+L 700 275 700 200 3 0 0 0 -1 -1
+L 1400 400 875 400 3 0 0 0 -1 -1
+L 900 300 850 300 3 0 0 0 -1 -1
+L 700 300 750 300 3 0 0 0 -1 -1
+L 775 300 825 300 3 0 0 0 -1 -1
+L 875 300 875 400 3 0 0 0 -1 -1
+L 725 300 725 400 3 0 0 0 -1 -1
+L 200 400 800 400 3 0 0 0 -1 -1
+L 800 300 825 350 3 0 0 0 -1 -1
+L 825 350 775 350 3 0 0 0 -1 -1
+L 775 350 800 300 3 0 0 0 -1 -1
+L 800 350 800 400 3 0 0 0 -1 -1
+L 900 400 900 450 3 0 0 0 -1 -1
+L 825 425 825 475 3 0 0 0 -1 -1
+L 825 450 900 450 3 0 0 0 -1 -1
+L 775 425 825 450 3 0 0 0 -1 -1
+L 775 475 825 450 3 0 0 0 -1 -1
+L 775 425 775 475 3 0 0 0 -1 -1
+L 700 400 700 450 3 0 0 0 -1 -1
+L 700 450 775 450 3 0 0 0 -1 -1
+V 800 375 150 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 700 200 200 200 3 0 0 0 -1 -1
+L 700 600 200 600 3 0 0 0 -1 -1
+L 1050 800 1050 600 3 0 0 0 -1 -1
+L 1050 600 1400 600 3 0 0 0 -1 -1
+L 1050 400 1050 200 3 0 0 0 -1 -1
+L 1050 200 1400 200 3 0 0 0 -1 -1
+T 120 25 8 10 1 1 0 0 1
+device=STL40DN3LLH5
+T 220 1350 8 10 0 0 0 0 1
+footprint=PowerFlat-8
+T 1145 1150 8 10 1 1 0 0 1
+refdes=Q?
-- 
2.27.0