From 6724f88d2f38bedfaf53d18e1a0f93ebb0f7ffa3 Mon Sep 17 00:00:00 2001
From: Doug Coffland <dougcoffland@gmail.com>
Date: Wed, 19 Aug 2015 14:53:02 -0700
Subject: [PATCH] Started combined board

---
 Combined/.~lock.BOM.ods#                     |    1 +
 Combined/BOM.ods                             |  Bin 0 -> 35372 bytes
 Combined/README                              |   11 +
 Combined/combined.pcb                        | 2931 ++++++++++++++++++
 Combined/combined.sch                        |  126 +
 Combined/footprints/CB3_OSC.fp               |   12 +
 Combined/footprints/CSR2010.fp               |   11 +
 Combined/footprints/ICS551.fp                |   22 +
 Combined/footprints/IRM-10-5.fp              |   12 +
 Combined/footprints/Molex 39-03-0040.fp      |   12 +
 Combined/footprints/Molex_39-29-1027.fp      |   16 +
 Combined/footprints/Molex_39-30-3036.fp      |   15 +
 Combined/footprints/NICHICON_WT_CAP_4_5p4.fp |   78 +
 Combined/footprints/NICHICON_WT_CAP_8_10.fp  |   78 +
 Combined/gafrc                               |    5 +
 Combined/isolation.sch                       |  235 ++
 Combined/microprocessor.sch                  |  459 +++
 Combined/motor_driver.sch                    |  352 +++
 Combined/power.sch                           |  258 ++
 Combined/rpi_bus.sch                         |  291 ++
 Combined/symbols/3.3V-plus.sym               |   17 +
 Combined/symbols/5V-plus.sym                 |   17 +
 Combined/symbols/5V_motor.sym                |   31 +
 Combined/symbols/ACT4060A-SOP8.sym           |  102 +
 Combined/symbols/ACT4455-SOP8.sym            |  113 +
 Combined/symbols/ATXmegaA3.sym               |  728 +++++
 Combined/symbols/CHASSIS_GND.sym             |   24 +
 Combined/symbols/DB9.sym                     |  112 +
 Combined/symbols/IRM-10.sym                  |   58 +
 Combined/symbols/MAX18450 (copy).sym         |  191 ++
 Combined/symbols/MAX18450.sym                |  182 ++
 Combined/symbols/Si8441.sym                  |  191 ++
 Combined/symbols/TMC2660.sym                 |  508 +++
 Combined/symbols/TQFP64_14.fp                |  352 +++
 Combined/symbols/UA78Mxx.sym                 |   58 +
 Combined/symbols/Vs.sym                      |   31 +
 Combined/symbols/cap.sym                     |   39 +
 Combined/symbols/clock_driver.sym            |  104 +
 Combined/symbols/crystal.sym                 |   36 +
 Combined/symbols/crystal_oscillator.sym      |   57 +
 Combined/symbols/gnd.sym                     |   17 +
 Combined/symbols/header6.sym                 |   64 +
 Combined/symbols/header9.sym                 |   91 +
 Combined/symbols/input.sym                   |   15 +
 Combined/symbols/io.sym                      |   26 +
 Combined/symbols/isolation.sym               |  680 ++++
 Combined/symbols/isolation_old.sym           |   36 +
 Combined/symbols/led.sym                     |   46 +
 Combined/symbols/microprocessor.sym          |  339 ++
 Combined/symbols/motor_driver.sym            |   71 +
 Combined/symbols/nc.sym                      |   19 +
 Combined/symbols/output.sym                  |   15 +
 Combined/symbols/pdi.sym                     |   68 +
 Combined/symbols/power_supply.sym            |    8 +
 Combined/symbols/resistor.sym                |   39 +
 Combined/symbols/vdd.sym                     |   17 +
 Combined/symbols/vss.sym                     |   17 +
 57 files changed, 9444 insertions(+)
 create mode 100644 Combined/.~lock.BOM.ods#
 create mode 100644 Combined/BOM.ods
 create mode 100644 Combined/README
 create mode 100644 Combined/combined.pcb
 create mode 100644 Combined/combined.sch
 create mode 100644 Combined/footprints/CB3_OSC.fp
 create mode 100644 Combined/footprints/CSR2010.fp
 create mode 100644 Combined/footprints/ICS551.fp
 create mode 100644 Combined/footprints/IRM-10-5.fp
 create mode 100644 Combined/footprints/Molex 39-03-0040.fp
 create mode 100644 Combined/footprints/Molex_39-29-1027.fp
 create mode 100644 Combined/footprints/Molex_39-30-3036.fp
 create mode 100644 Combined/footprints/NICHICON_WT_CAP_4_5p4.fp
 create mode 100644 Combined/footprints/NICHICON_WT_CAP_8_10.fp
 create mode 100644 Combined/gafrc
 create mode 100644 Combined/isolation.sch
 create mode 100644 Combined/microprocessor.sch
 create mode 100644 Combined/motor_driver.sch
 create mode 100644 Combined/power.sch
 create mode 100644 Combined/rpi_bus.sch
 create mode 100644 Combined/symbols/3.3V-plus.sym
 create mode 100644 Combined/symbols/5V-plus.sym
 create mode 100644 Combined/symbols/5V_motor.sym
 create mode 100644 Combined/symbols/ACT4060A-SOP8.sym
 create mode 100644 Combined/symbols/ACT4455-SOP8.sym
 create mode 100644 Combined/symbols/ATXmegaA3.sym
 create mode 100644 Combined/symbols/CHASSIS_GND.sym
 create mode 100644 Combined/symbols/DB9.sym
 create mode 100644 Combined/symbols/IRM-10.sym
 create mode 100644 Combined/symbols/MAX18450 (copy).sym
 create mode 100644 Combined/symbols/MAX18450.sym
 create mode 100644 Combined/symbols/Si8441.sym
 create mode 100644 Combined/symbols/TMC2660.sym
 create mode 100644 Combined/symbols/TQFP64_14.fp
 create mode 100644 Combined/symbols/UA78Mxx.sym
 create mode 100644 Combined/symbols/Vs.sym
 create mode 100644 Combined/symbols/cap.sym
 create mode 100644 Combined/symbols/clock_driver.sym
 create mode 100644 Combined/symbols/crystal.sym
 create mode 100644 Combined/symbols/crystal_oscillator.sym
 create mode 100644 Combined/symbols/gnd.sym
 create mode 100644 Combined/symbols/header6.sym
 create mode 100644 Combined/symbols/header9.sym
 create mode 100644 Combined/symbols/input.sym
 create mode 100644 Combined/symbols/io.sym
 create mode 100644 Combined/symbols/isolation.sym
 create mode 100644 Combined/symbols/isolation_old.sym
 create mode 100644 Combined/symbols/led.sym
 create mode 100644 Combined/symbols/microprocessor.sym
 create mode 100644 Combined/symbols/motor_driver.sym
 create mode 100644 Combined/symbols/nc.sym
 create mode 100644 Combined/symbols/output.sym
 create mode 100644 Combined/symbols/pdi.sym
 create mode 100644 Combined/symbols/power_supply.sym
 create mode 100644 Combined/symbols/resistor.sym
 create mode 100644 Combined/symbols/vdd.sym
 create mode 100644 Combined/symbols/vss.sym

diff --git a/Combined/.~lock.BOM.ods# b/Combined/.~lock.BOM.ods#
new file mode 100644
index 0000000..ff87fbd
--- /dev/null
+++ b/Combined/.~lock.BOM.ods#
@@ -0,0 +1 @@
+Doug Coffland,doug,DougDebianSid.doug.net,19.08.2015 10:59,file:///home/doug/.config/libreoffice/4;
\ No newline at end of file
diff --git a/Combined/BOM.ods b/Combined/BOM.ods
new file mode 100644
index 0000000000000000000000000000000000000000..c695545db432ec676d39d2ed184a1ca8e7d9b44d
GIT binary patch
literal 35372
zcmbrm1yGgU|1Y}f?ndeE2Bo{CySux)r6i=KYt!8=At50GQX-8?ONby1ck#Zz|2^k_
z&YUxM=FSK@Dx3X0&syJ4F4SJZ!Q(?9$PkEA5}sU?)5|z^2n6!<0sac&Z0~IC<?m)~
z?&juXZ)xsj@9M(g<6_0`YVK+8$?ocA?PBF>>FsRo;>GUi=3#Aa<!NVa?WOkLUUQs~
z`q0M;0(tr%2Cu1Q=k09aVs7u`$>H^1e`I%av3;YaB8P!WiVFS<hJw7b2KfCa_;^Hy
z1)p7Lk0KxtD-i{02`#_8qkM!;ZJDp5ms?WF$Fc?n5_DRUw6q9X@JtyROcJ#4>ielW
zisH2Jv~(HCsmIvT`-uCvIHt#!J+|&UWIp+xN$Y4=$NmL@g)h?_Z65v<w%JS<kO@&!
zfB$>5(qu8heK&RRRq7nRy-SPm?wE?XB=QhNscZP9Ocl2>Q(apY>X*=*Jm=avPIhMj
ze=XSxk6Hr#XBO38{#I<w$k40jFGC~eW7Z8uL~!`{Lq!W!@7r%Ku<t9J*&PWhurp`#
zsxf7lFAa<&BR&dRyF2s*&Pg_iRGzA!7;#6hy$fV<a5AJ4-tD@b8F_mubg}aERtnp@
zYW4FZjTAkr1@Ws^9o<n-NDtFTs*aA8(R%+D4GPh@jT8GA9@kYiN$Hml&A>~ZM`{!W
zYNZqQFxHK+H%V+`sUsn)hc#yE`t}FP$L5GD#T`_^6a<<X(dwBSL|N3BVtv6|+R@NY
z7?^ZJRVSe{QZ<{Pn_^PTuvfIN8_|m0nj~y*Y9H)uUHhp{l0VU;W91xMCA(4>Ek%?q
z?d=ect3eUqNN_1VzqB|{->>PrvcugrLpR)>vRLhWJ3@HeF5+?otJxc!-;&ry@UiTu
z{m1S+<4T;<mJ5cvqS=Z=#W6SED)0Fs^YNR?rn)K-o3^9ol@8aMb1H5Yl?~}u9bd7T
zjIFSd&^-NoW{ioX>g3R_Ddr=1_Q&h#(1+=hQ|#DLvW5wid3lO<^mIx-Sp^#wL!{5p
z9Q(5vJy`t*6&@+CV%^9)rHh^{K0$<@OO+gEPQE)4I`aFj*bFVNqRND5vW?v48moZs
zOHC(U%@<91>=p4U)^Q#NESA^#)yNEQ2#%@}7R&T!<DDetat$0-0_poF$|89$G8D^~
z8Sl$E>>fSfUM*Q4F4loxffoz9n&nDwcE?g^8hZccC{}f-L|-@bKR_#JPb$?*Fv$ex
zD^w|HIKN&$&PZX6tLAspa)irnz9}osd+E6&un{y@Z`>mpg{nY!t;!aMQ09<LtkL5z
zSZCN#Dwwg}n!^(O+UIkjSie!1$4if&SKFDUI`u~1D%EL5%mXaT*irGt@tXa9TSPt=
z@?k}x&Eutxws=8?6;P29mW~s?`&aQAN9_PkZY+n-@#gQ5kmbjO7w+FH$u%)DsnP<T
z3Ao&yed5rq)l-M(93Jq<!O+>v#a-HoOJzuhT`S4+Qx~3{I_ZCW7{U@;?eb(8%jLD7
z1#jEoYyJHwMd*y&IhtK^-@9+Mjf^GDLDy%6p$}cU4JNel&ji@-U;SFB(Z!=zV*H_u
ze9tbgp%k<~TUM%&_PyWd$Y3ZM!_<E}V=|iu?d{{;A6110Y$h6s@1HU`7!*>ar7Z%~
z<deunzK_KF-rsmPt8u)c>w&FwpohAwwAabR6OP0aJ^mi0_*!p#`*+1vz-~sIQ`%&L
zws&k&l`agw)A4Klcp5|K^>(I!>w3Bk?(OYKe_BD|&$1v%S|V#jD(*RC^&`H!J?Tw&
z6kN4tD;)lexY@E-x?LXDd?<9uiVCuXB(N#w2lG{v-HI8^OskKol`x&)+JkP7Itqi%
z6r#~da2ZsTD&AjxkEeU}?$>G;j|jKxx-eq7{akqz8WCc?^GbWZXz)!okL^1)L)n|p
zxdOhwmfW`nqpTX#OFn{|_df8_W!Cp(Jzp<?2P`1{W-Ah5KhBYeUzh8FN#>T^3C~}q
z`g{ENh~anq)ijh%r<V9Rmd|figVwz@-woq72Lc&&A~pKwRy>pGg=~iWdko+ez@4Fk
z8MCxA4cIT!sWWI2RYQwX&E?0iI%L6pokJ}XCldG<vUt8fCw6x_gf2XoC+Hm)Ucq>$
zU9H8W4wbIbD8q*Eo-8$4-rrob*nC#Z7v!5uswQI9Q>)Rb14EOissHv^Xkh-m|DRvq
zT6lWxS>xgI#f=Mt|B`qXob9t1NF0i<BvVNZP~&p@?_md|zJ%~n1*UFKW~V7O7<Iv#
zzCRsAn;$F^zS%3Wo=7h)VNApEKdkFuysl~JV>WDOZQ%uP<3{j~V*?}k5u0iaLt6A|
z^EE62DzfTxv5-5k25DdT{30HsL8C!>jr;I$d(y(n4GqhB=muLL29qodHW@+N3?G+N
zz~%YcXL;9+zI+qJJxP8ucChflTJ-yoC~&Y?*W>;}R+i|oWm=TwC;W#JTu8)XogvR8
zI@=+K1vX|n3A0@m&gXm~0UFe>fWN=|Z_e#0uU0*$aV}O|`(f+`kg!N{2w98>#6p51
zE3&ny!b`>6zrznwhz1cqNJ+*;goVS#8Z}uU;Jzj1is-hZKmDA>Fn!q2k2wf-A!5(m
zGq5ojNIs_%QoU@IOQO1q#(0+8W!fJynaA(EJoAcmby9Wbr8T!}cB@yzfi2^o!6>vz
zkt~n7a%JT4bGYG2BpdoRo)l!O0?O$kiPv6E#E&<@I@i;Za3;kVv44J!r`gpvN5e`#
zz)|YIxx!M09&lAsJ_~p~5Jp)5{!#4D<kN!t)*mXCKsO_iZ?R=_MPf`Gm5$%zx*^Id
zBMz7Ebuf<t!}yLl-ADc=;Nk$Lv+PwSH^2X%9qX%NlXtE~<CH0{hAr>J^%iUOak6B>
zpyF)e{twr?;|RPM%6J(F_~S4nq*O*3{LTjZFlKD1SgCjs5buNe>#Z1yEZ5fWO{3%`
zjFB-FTPitkz}+OL{q&_o&V1Ent(%H%6R|c{TJDVl3=<)f2E3i*?o4PJz49JoV=jv>
zdn(sU8IIXo61gKrba@%684ZmxMTBDsPD!7m<qQ<5aWAxcg~CsZi5e-7+lcQX=e}~n
ztJ!^Prc1j5(}E$cfQ-imozf<cxK8Z;?Rq%kRDno5lGRL-pBh}z(!>2NPdy}x3&K)c
zmmpF^%aN>YD8rh`iD5Yq${7xEdzKSME%rR4KrFPttyx?$0ox4;^^~L(Hq6Se62D$D
z;rEZx$MZSWP5RJ>J3aN}LZ=uegA5y38bw5GyKYvrfp~bvm$h)oj7O=6)R4*G4=2))
z;d1d|$aa<;^7JaClQLQxb_|vyN1W%kJVQy-416;U8ymv+N~L+dVo8J$?i!e;EbDU~
zo*13GZC}ay?^M`UJkQZF9*Z3oMVJxVDp`=}yE`2=`|pHnD(}Dpv#IAHC(c4|SHna*
zZZscK8;p(UmLKm{dW;~R35&Tn->)dNi9|#vhAf(k>Ij}S(+?_O!<Bs?`3ViRepA7I
z&c6ehAo)asf-K?hcTiP<{&+`4w_nU28v{Q-xGZ;6dxDN`6kjhJ8;c|hGkUO4!;~DS
z=b263tf86Tr_K6Tt}o~sQU;O##gmgT36<dfHX!IH32FTsfq=%1H#R1`#o&O84U=-p
zQqBAbLvjBaRlPstUXI*9(kMb}q3n)U$oq4F$g{TGuJfO1s!;kwa*>?<&%+<(i^Nfj
zRreH-vsjf}4@RUeQ;D~}bjph-!Khsktb~!ErDuDX>2_XYw%i<t@YA>-e`<R3$BPJO
zsa<W}*;=RVLoox7`Ej9z&i*&W5C&PU==iaLtKggcitbY=ZLzlk>^!0)9Lberi0y>+
zRYwiHz@`Ebfyff_uV0e7r4`8<A#%tz?}iu8g~rFGsY4jVVCtE%gSGA)RGFz85!44x
zXobSCu^KJs>prLJBtvp#2g}sOHMyZ7VXh)y$pZeIAZncoQC)e2RM2KJ#pS?+4sGid
zPWnjBOwlF&f>Yco9i2>NPi^Pij>aUbK3FKE9Da-ZE3EPbLOF6zFv~aeS%F#FGUj1;
zdPgb;SY!d|)qAB`rp&-}zA|!XfdR@}>)bcu;SD%T{_lcG_F>v~p*Io%%0A{YArckK
zNZJu8;s+Tf^x;;#txU9SXe6)HnKN&gxZ}|sS~OGlRm0Bfb#l{FjdN(?t4x~D-#g8Y
zAD64H9MffToT4i=ymF0rpqyEzx<m4;<T|ZPFKOQ`l`0Lqh;fF6Q<qO4a0u0fk7X<4
zfrAgSutYuDpFYNizt}~k4Xe)(zmkc{M0}Nzs&o-?K*L)AhlDBodl)ZTcGp49czaf2
zr#`$hatv9W5|JsM<{-t3aVzlhSSA%J6F(tXPo9WMKQFEEDLzc8TN^d=NHs-Aq&BtJ
zWt`oZ3ND)BN5Z3>2Q22feJ$RN#0eMOOADu!c8rm?-kMg)qF%E(_}22=DCu3LZsn0$
zS!s&eH6z(mlCgPS`NZ*pN@d2fVfdwt=XCG9`L;`u!2FHu<}i$Lh(4UwlEH;}-6y$j
zj~`mOV8_qcB~BQO9EEP9lf<a3>Y;9z#p@Or8QKxmRs`l2xFG4Yp|Q0#M<V8;NvyX0
zx&XPn^meOpTqhhp`*}Rc3(akAF5mP#2L=b~M=?No05h;Sm{5J5Lt;1ZSD^JmON3|!
zE<aDno~}SLK}G(id9Kx7v$aFN#YO>cpX*%L2B$os?Hd1WJCe-!087=w+dl~8?fb^e
zS!&yd_Z*m|)F`r4JDGgFv)Jc_AJ<xl*oQFT7%ICQ5Moo~C&Th%zx8+@>dc$ht{t!S
zU{Q$XVH))KIA?QPt6hiQ{T>~P!J50B!QFw)k0%_&|L|8jpw+VR?JDDsEHW0|`t+mR
zCd*M#fZCg3vueFe@I0_{sd1d+3ghTfxjVLrq<kK`Q;BhZ06C?G6Er>hIsRqt%V}dw
z4zE4+pQUQ}XZ3<L8hzKQ<E<&omFemgZUYj=7G}Y}M~DDdlHD2_e(8Tk8~u`S2yl!q
zrcH^Q$@_aPw$l;BtZV^@Li=rBP2fDa)AXt7Rr2J+D;>SYTJ7f;9RNwOv$y*=fBRWr
zgHy_3p*rdf%^&z5C?%bM2c11f?m>zeZ8Xb<V#mTw$RW<QEb12;8q^^Nt2y_`N1<6$
z@6K0gjv$U23<klAw??!VweL)3<7KDB{pEHbR<*JnBbHV(><jWgx1XT;tSWX7Pu{4g
z(CGf-BcSbS^lbOwV&#=QiKQzOQ(@528thZNh!%L8n-DJ22eYW28z*gbg+7KP@KHv6
zpKOkDM|y4#w`2{25OH2!3)?8t9AV~U7$^DS#cLCnrAG7JseGJn={LAb*h>Q9BvM-=
zM5b1GS>(JY%WaNY!@OqITU4lH8bV}9ww4>5*F{Ha{HRVDF#7rSIGQ!DGTD`w5oHT*
zcpVoL+6d5mug|t86(%*XU-}*!g+=_FWOvdVmc`APwvZeXI(h$Ecrp)%Mz+?l<E?j>
zO1|LypcfPgJX)F^INmof^Uc<;NL5JRu`2luhP#fZ(lI4Q&v|cl8niiN`BtdpLuFBm
zS*iiI><#c%G=rUsq5ZfH`)!gD4<)J-?>j#GTvpZW#EAwFL{&&_mY2VlnqFUz!$)fp
z(+loid^JU?jSej?;!yw=0Y^FS4>YbXuO^)l(E<Ygd={{OtLLO-d=uwh!9py(3_BrX
zh+(Xysb!^-y_h8Om-s#c<7z$d1dwXdU`Pb~@YrX_Tqz13eR5U`#1@J;#?JefkLs*3
zMm!4wKS#EQi=JS|d6s~=;P!JYMf6eA$%cVEXW|9d(H;@(IODBb0yTcD2@G<2h`sa|
zrn1DcLg?P8Y3Mz{Pm!O#Yu(-@NcNb@x2Ho``<fOUrhVuU`xc}syR-16&}%zUvviy&
zb$ZnT^fSE(X(_$lfD52U#$Wv*dG*qR)9=)5(!3lVw$Y_oEje@0Tt8<hU;@Ik4oHk7
zr_Br2sk_Lv>_^+FJo7p$9C7>Ng)w^6-(uTA;d53m823};$Un^5)<+226!Atf#TD{P
z{#6Vfg|q$gOz9SUlewBn^MT;K8LD^mq=SMG8)7fia9_sI4-p8HN(OPz*i;njyZm<P
zhzxRg60hXFkw{*<nK1T}TuNg9?x8&m3>vDQ53-Q6NHZ4Bfk|~U=1SO&S_@YA)0mlO
zQS$7In2|b!Tt!yJDHxa<P@Wly%`6z%(W0;EW%kCuB;6x)7ab#u8BZ&SiC!p<Hc`S#
zd<@eWvh_>GfS;qbAsV;=bX*3P5J^6QO2QQ;b5eCEN#+#kic{jJc=Sw{g)}na2qL>#
z`&{BV7Bh^#o;VDbz5E-b4?nYD$OdN>V55!D`R<k0Hhd?_i><`R<4}c)>N#caDi(N2
zsx98frsfBIqoCv%Ld}OE{t5q?SSc)Hq2KI71bAqCukdE>4r&^tovafyXpE7d=+3XG
z(8p<<WlKw2_9$r@rz7B{Vla(c?QnvIRwdEQ-&Y}GmP_gP6LSU>Vn-92gkMvUb57WC
zCEL{~Nt~0Du*oj(h8~Qi55T2xUZX#5;qJ6@V%Ht5^#~l&XOycJl26fKd|O!TSeNXr
zV$ao?sJHqsm<7iRizW%5GE9x0NX->*JY687ANr;&TutTn@6m_fXdLecXz>x=C?I5p
znJr@qBAhb@x$);oh&5skewa1k6;^*YARrZ+6Yu|lS$aX7P)U4zKsO+R{G(P87RF-;
zL)!DQc;+IvVyqR64{CxR4l+H$aE_q8U<O($H7OyRx9!gq!}Y>LVy#7MejL2u)txu;
zlJs(4hV7qiQhGW2DI4`&2%&-?%(^vpO5R2IPI3W^H74hGjdV@JRXKi-kK&u?8G^W~
zmt6IGs<EH+xT&s^Fj!VlC&~A)zf*BVM%FW_a;r^I8aKlUF@_gIQ<@{hX`xKe_qTVs
zKe?r{$`kMmkl+-K^q$#;PZ}&M!Fq{?rvwbM;;xvyu<XT>bLLFREQr!H7af*$l|YQu
zp^VC*TKQGEwzoH_FbgNQNU}p7kEm|k<CF0gP7uH&4+|OYEQ3P{#4}O5;MjtmbH$#X
zoZfjPj-Uz_c|sgk?L`8Kyy7B;m$VHBUYIq$x!x#5#Cigb-)-^$MHD-s+luYXUR7Hw
zuq1#X=|(lCD4Hv1P?Ob;nAk3C)<Mge%B%^Qi^N{&2QoQ?8aK7TI=NgSpp)=99wvol
z0<2egULLBrbp;z`27mRouInrOdaSq;U*?p%Ofppe0kfRUS^k%!OqC-P(<fFF)X;Tz
z54XsKRK1Z|@&_~xjK=~CkN&hHSvSko-W3LRMZ|YFOUg={zIUZTL;XIlxVQX<`i+_8
zFA%04Cy23OOVN+qQCOmJmYOuS>_TKWiJS4+$*99Awa=;pv=6l?QkA+5@`Dla6wQV{
z?6?6Vu``QMJnb=|{MWQ54QJ7UWXJ(=m=opL*(cRfjh<id)fkp}R#ZlOJk*=3E4T=7
zhwa<s+@_oU(aZa4ac`HYF70FHf|l*!L>eA6Ef$9K2%vhJBJ8sj=^RTWnMH=W4*jwj
z<)md_D>ZU*%y22G-N;Rj;uT02VsMtjuVV-BFuW;;n5(M=-uYzaT9BEVscL;)rg>Oj
z%+MPC1#lt*XGu<X%c1C^;LElaO}!ZVm%_qBq3G!LnXc9m1uaeA`^%Rx3NbTMN@5od
zN+C4`#jh+4%N6J~pAF79IkoI%korokqROSwmd`q+n6La;%(gjHVuh*(rV*<sd+x&<
z_HW8cjJ7Y72Q29IT&7kTt2@Wvjs<*0dMTK>RCI>qY@ZH~TtdaZRwiClz?apjPvJ#G
zVj-@jIT3p8uhUDYN!7l#h3m+Y@M`5XyP68@i<G>!e;v*$H&b!@rnuryzgk!qxj3rb
zeLEgMO}9kj9%{+N>gO$!Q+FZOF*?=9&E{C<Ql6i4(H!*O9qCjsR=`tzM9dJA-sYBu
z8MKopUb9AZ|C)O8rqWl1-Qcn#p{HY83o#gO(nnXR!@*cmOLnNIe68MRB|6KY_1^x4
zSBipGMLQ$aMRA9YyQ=g>*1{M6$pdz&$@m+Net`kcNBT?fyLiKsKkFp0^l=&W$E;79
zoV6G8sDb)q)>1h%J^Av7OBi3<_{scQdzTWM7fO?JX`91JNK;ggbCO}tfL4R~u9Ky6
zl)HV;(bY@7iFRtkPD80Y+@<#Asvac_0gT?ZxIpUa(OUi~%f;JFePs!qetZ5(U`RuM
zqLhhWG9D)QR*&>5)p)+aU=E#mC#w*~Ns24$n=Pp%6)F~cAo8KvoxEkeVv<=R07s|4
z3ie`-UpHO27=Mr4`bfIMVD(e$e|tLSUYSh8yyus%E7#>#obq1vvTvyz+N8gGP@9d(
zqEtjpb&i;s8%?P6EihZdG{P)ek4Qo`Iw{r@)Y&w!z0izH&WxnK8zrHEz5IQ1ry`Pf
zim-mADG)DTrV$Z>u7!KZ!$<9QCy7F)U7b9L@%Rd<z193s*v31PYDXq<UjM@J&q5nQ
z-v9w3s?>qg`_7f{-0FEUD%8FkWAyT87Z-+DN~-HhQKPf<$0*ZPi`8gC>9;~70mmj?
z@_BV&i32AF_<MYJU#&%enKCVU`wQr8@R<kp$4Gn!041#|4FV<&tKZ*80EJ4sRCipg
zCE4na=u#~dB@^-ycK<#Mj2H_4pDBRfVLjtVw;D~Nc&zJKzuC!kef#{Sq!}<)9&Zjg
za0MLZ8J(9~g?x|mM1uoTX%&!z0BeSs1D4=tRql5jrY0^|DZXsyU9{}ObS90MR!L++
z(N0DEfToVQ*1R{&f90gMz$i^d2^OY_$=dxf70``bOb$Pp`z=S`0@tMX&y>*JN1mW7
zw*gdk+sP~#aTcx0WMC+YBbusYb8p{YZae~uRl*Hi_n45!&#_{un06p|G%Hl@GQaW(
zI4#Y9YX_F1=3u+?ia7Jg6!3=uDnWRSyS+9qo{Y|rd%>=-!0*Fv<PwOf1R`Fm`&Z$f
zpRDy<MiH5)WzN>{>mA9}_}ARzBzW#l0i$yX7~<W&C!%hf;@-ZAbF<|M78RmxZEiI0
z*TRTjOrz?c5-_(~e<J)yfORe_7{(X)_ZLUs6>Pz$GzKirYP}|E<iPVUa))0VuuQhz
zXRzqnOlCC!qMIO6`D6=*1p+f;U=JvWRC?urtJ5uDA*t^Gf40H6=Si=1rR%R#8v#xS
z#OF^`+7JyIv29Fbzu@)v{=i^_ird6bH@_x?rU|?;Y_*e6pEqnU5lOo_>_QrosfOV+
z0*b0=sMGz&MBAs@+`GwirnI0HO5J)RKmy>RlJU$C9Fi%<j=wfg)Lzf2iZw05wH1g2
z!diGC5}pJ8Un~jftJba|eIU}udj6u(=^HmT@LFvcc_bp>0oR>Orh+reV4=<8@#umR
zyH-`49WyNY?v%+OGJy}J47onD_DW5qdj&mW-0Sg*>v-l?c#KH=5dW>&cDfIUk%918
zl$sAIM=Kq2Nb<njMH8s)vKWa25|htv27(ITcXpkkDtaw_Y!{v|T_}bX*yLl{>9z&l
zCmZl)sW6`L=ZS@iQl(?L75`+`uKqb)NWr`NDO1(tsvN${boI2K3L`^<a{tMFevO1B
z*?nLl6YP!o<zqTQVOilDxw#qVyxE@2ozxL4WI1msN;?_zm9Ok1LoT0s3HWepA;_sL
z#@)O>n0+@v)=}p7`+IFMpTm5Z1&TCMlrQiDFm_IhaDne!0W8VrM{3I=lxj5$G<-(L
z7}y7I?}xvmk))Bs9hM}CMl6Vn{edy&SIK*^q&JB=181eqlMKTOWq>q1f9Ww6^|v%#
zcRA7R$T!?Cm)|+do|OpL!%at|(<0dHvjeHmPU<j;!(ZvBUXND-qOQMo;C$sD|F}Jo
zK|?oDvnmzM^21jHmbn356zF)_0ZF-U14%x`x-kZ|y3Te&owA*-sL1Tw<SZEj6}>wr
z^KOo{m*oQ@L>E(uZS*Xxl0EwatwRkAi>_{JxpxOXv|L-;h*aY>eLI!Sd*biOI`1T%
zzbW?8&oO)PiGK~8PyEr;YM7CqSAn?N?+~WCGTqUqU*`I31l1_t!fq*bO-;c^$c-VU
zK<~3U*>-eP$oXxFG8TfDUsRuW*@;gTDMq4x{>Oop?rznN`r4hWg%hi}Z~v9>K&}4B
zj&u4x&GcA97%Eik_Kc%rUn~@NDN1^o3l-ykAvLBFE|O7v=~GS5h6t^+^3y*}wJg6-
z#pn!OfM`0TZB+F*duAK#;aaT7J1(@}TcG)_kazfmSD6e=eft-!R(^Xrq&v&ByLCjr
zplft))AY?Ibs_yHO4K?bV|}*Ebr?KRtAp|sh|c+&U97_W5Qh8o(cfX<z6Npcx-LX>
z|KR^~vRZvPSd{2l^_6awHtT;)U8^tE2EKF+KcTe&21rUtKCPXQ<5G8hEUhF5*Oa6$
zVgvBka<PB3mL1n`%JVXVr?4BfTQ-K+F0Qx3L7Z{_^~V4Q@HF`}Fw{D9$BOO!mG#%m
zi$gEJbl!5-#9gcf|24_~x~LjfBTiF354q6nJ9M%ewQ?SD;~4FYD=JV65nS*ntc00$
zb=b2snU}Xga6UV7zwX}O{*<|W+j#KvG4YvzJpG1m+eefB5RrF}b5nQkz4lXs+(;j<
z|LiXGQ~|RfjU!#K$;pe;v3B6=;Px7K;p6Mo>d`v7p7b4jJLkdvEdAhcUHOEbjTdoT
z>NM9jz!Cs?4)g|KS9mo@A2zzZYXE|g@YqQAf&7Y9uQ4ncM3H!<A(v~u@O_UDw;;!o
zSp|;&J<z~K*ZIEdFGKEL$cUWJNIi`KPIFj<h)pn56N$NCH$_331cr)lz!8(6k@V&R
zYh)=w=)<*bzM!{aI%9Ev_K&Wae8@S-l@d+@PkMEmEMzKtTcG1>>To}YewWB4^#LI2
z*a#5<nb6iy%;n)%Rb21GMdyWT?H{8_F@^GQ*rSQhF2Bf8kUU)U+D;b~ZGGbCho6WH
z1z1=jn;5X2p&LiQ@^|(X2N+aNAeCh^Xr<I~8R522!$?LzqYAt@h)U+Ivl>tJYPwBi
zRiQ)5INGQ~9E%%9&7+b+l>b~Il9Wir2Pp+voevOhYdyY?z;z~8Y3u|E9dM$6M<c;5
z{jJ&h6G*o}h{F%Y0?1LVrt<t(+MU5SlsX3ku@+3y$t*7AT>g9^U-m{YVlVdRD&mPa
z)&U?e6!=B($|aGnHCZB+<_h_`T&Md^V&~3Q1Ah%b<c;}I^pg#Zv)rR!fVQU4A0G4c
za?=I*8Gn5?J@>iVl}2PEC_?XWh?T+X9(8O0A5TEIA4FVA+1%l}@DZ96fxoyI)AW+#
ztZMfe%ZCS5#T(tW24^@|nYuxw)Vk6aEQI{@d_mls0<x5_S1-k%FGN(?I~3evz79<9
z>83G8@1db}gcU?VO?qWgLAq9AbUq(yrAh5%JOg%##Vq{=Rmm$5qg5vC5aaQA@CkeT
zM0Uyn_Z;NcO*$4)PjlP)(>st;Q@-Ou9JQ-da{^u<$q5<}d#lSDX%OD+^==`!ze4u2
zrL|Xpqdcvy29w^nV<EelA`tU6o`b+P2)IU!xcKoFW&xiUZr=5x`UZ@Mo(IBNeH&c1
zEEboq?FG<$kbk)L%*;6+ch<`_Z0m$q@DIp%H^6-kheOgcD~8+$?__lf6q)n}Op84V
zM+bp40^1JkoFxs9Eqo6U<wklxcji+q5T>=+oCB#et3I~{lghDhkN=-?v&-GWP?bz}
zvLyt<(%}QxlHi+j2`YM+VW%AS<L>;Uo9}(sWieN<zN65AJxN4uIHLn^6yMo(XlX@s
zs^~C0z%<ABuvBkcXH*qyZ$9He>^0~*S0ndT{v<B(ms1*p`d)g%i~(dbqmPCo-zDCt
zH^JHw1~@%}XoNJJB^Eqn_aQO91=)OO+xr%k>NI*rs)cPbF3N%a@hSp^01cxAjIz$9
zo4%3+Xyov$i{96UNVUsamL3y!oi805KbO&HIEk#$6s|36{kxMrXyTXs6G>nmlvOBP
zP;jVY)!{x>9G#Ocn{?xjkwWRSzq{S<P;9KJwkRo9ztO)~vyu977aO{#3{z7XZGEGk
zfAo-3#~HAN^LQYDpww{|tJ&=|8GFzh=ltXUE-2Ez;}1atD(ZzV2VP*+f(}Za?|4+=
zA1|GnsQ{oDxN3IEiFd;nJh2kuS25HWaEG@tS86aG-L)m>x2$R0j;D}?(|O27v^PF!
znV!ctKG$o#$W4%TWWQu|RMcdn&RR#!RB`_wLw>E-p8cO{4IvE#VruqPm|o`oWS3J}
z<s*;+E8WFaL<b`<1ZA7`GexuUreC$3?&-BZ?w;aLF-_!X6iSL7Ih?5dqeJLFtmYC1
z9JMQ>(S^VI$hi#VmA|L=8uCvsk(!rx0=*1&K*sv-|E>U<3bA<a_nVa8=>_2EfKk3<
z);<797$6h&GezM+HMkNWI~T796#_5{<E#KT1k@;#)&bN2`tQ!r2;Scu)STTdHZG}h
z*_c%ggXMV(1c2Q#$coudg!~ZSX&R;{)5Cp2rt}88W+U`5_#LahNyznfk<XHts~MZg
zdtxJ(jlTP?-GacKY}=0jIs8sH`5YJXg#A4L3HMuWwSR4;kVa4U2;v6$WY7SZ$Y8-+
z2fY*kC2)$k*g`;xfO$s9ti=e1?`58T;s8lB=uUtkdk-|m5y-_0MT5QSJ}v@9I{ywh
zGoE9~R2PR|Dfk@lgZ0`Rv@eb-h_U%R4pE!KmGS5l@uyE9)J```mPy8)ZZIm#J-)8s
zYPTENQp*%G4#3zl0WO?Y0H}h1Vfqx{v*^?&`^&z`1slKJ+3?TKXP_*|aQt@s8?rJm
zWquK|8E}pQdd^Ttgf3_UAey@-?}nJm0-k&T6;~^Q*h1&xwM3M3@ho^S5hGxJzhlwG
z#8uAXG=I3e4nLVGmZAvQqq;W8cu+srdpJSDLE9^~Y6Mwz;g9{bo(?y?J^mPlln&(|
z1(W=d{!z5GMlo0v?J5KeySUG^9*Wo!Qz7Qh*pEXlvD5Z{{Gq5!ZhDvTPDanG|DORE
zN$R@V=??BRxb<Qe^O~pFl~H`Afk$mX3;o^u^13h<A!ti?@bYA1IyEjeS=j#!pgf0h
zH~xJwfMWbX>Uh#H_FO(k9b?D$43h_F?<3c0bQ?gEhJeH5`EP>`m%6WxOD~i3^SyMQ
zA3B7?B8VRV7x)W$zAV3>bRxXtliE;?eX4$hH3#4Rt^Hxf?t8onl$QijCurGxOdyF;
z1_*{xi(=H{!*>4Cd@vH|1McZ8A4Xg~W4i$aG(y^*Ez_vAahmRYr-t`H3=-?fy?st1
z63~hhvAFlraCC1-M=9`~+9bq_8OAZ;!nSk@b-QxIj6H2*T=hDOuGSu&^C5ks>KxRB
z`ihOo)hAETZTq+^-sz7dT`yH@vxtQIO3zfWMZ>jBsGf_HxVx9XlCp@<*Jshr5Itha
z=$>h6ZLqAqJ4lPD7JZXALyo$K+S%rtz5#OBf3|ur+PSKCv<GCh%p}t-&FrZO=d)5C
zl{!FYN$jki6DDlJbyv~=Cx|GW=nUVd$JDP}IF!!wD0mk1uxl8-CIzEV)K70_H;twx
zpTJe)5S#k#_PNc{WVN8?#zhZOOv97Yp>U!l=Ikjmj;9!Ytge&4R7H5nT{lI?UwJ2C
zNJ{r#mJS!j{XJzhxSEgtlMdF4w-Q<>ZG_KkpZ#McIgd_Pskak+8(bs(o<7jNpt5G|
z&}qL{r@e}&e)3-BsI=ukfGi7itGJENH*uldq+fi-qpE-z75xVRcAbuB@fG_qk~-+a
z{cEE*tggM*`TyCk`+uF4|4cNAC|||RRIXp`tA_vM8<C>^iIS+N3Xo))5n)!m!=X$4
z$Ki=>C51xFdEWiQ_&pL8)O%xK-~J!&2w>DtL_N3~(QoqL=YL$53-tem)XR|69_wt0
z<$h{ZOL>)UkHh&bqg+z5)mdsBR4SRp)jXGap^Zn5nF;0{BgV^ngnaEs5oJ@2)pD((
zpDqqkKjs+clM_|E?Wpc1s1920AXw0}50+7jsx*3P2L2Q-dtdD%bSlGgFY0oLV|dZs
zIINf*?aMz<&lWxO4Z?SRklsR?4)$z&fn>G79mB!n)sLhY@&NgIEbee|;REdYi8A2>
z&xRKh{#RQu&d;!M{EEdd_cWCs4lh5b?E`z@_p9utJ5w8|__ckGisF6>QFHLJ$nWEw
zh}~Kh@7f??K9|+bk82EvmIE@dE`yOM@@gF}Yk=DYfpit{2T<;6e1BrlY&A|J_ZFX7
zYY)^fK$*??iBo2BhynUzTNvyEOa}2%;DXSCW=bF!m~Sb>L;<C=E%4vzIq55b0lZcZ
zFd0xURBTQHp&e)joxJ~}0;+Nz+Y=X{qNL75e)a$=eQ=2Am1@O<fYYaeOdHTkVA31|
z0uFEpS2hpSz`$@9abD(?CKL4912YMRvGEWD2n0v#y|-ZIpBs<9CELE2MmUch*yYRw
zc98AV^K!M<h!_Q+{dNJ{l=f#H;%G<>t80`96!qi7y_a{7&yhx{{8njzOiX2pnTY>c
zDLOe1h*Wt%HvT@~!U6C+a8;j(N8^cHfs__^`|&ZcO0xp7)-Q~nQxFuWx<FSlonDzV
zWN`QiXMm9eUJ^AO#sb)A5<nreF;RixR`m0!1-8`f%>tpe0xu81Dkk{y*EhJL4}xW1
z9)R&c8vYE0@$cRBpLDUHt5YB^{+?`5JOYk)s(A%&0f3kuw=GF*CB+(-gFm6xZwE73
z^#{@Yfi0AW`QCqO?Th^>>}zDn9De6+yDv~+HtY*DOLxSVQh$5_4282TF+FVBi(lXH
zva<w~b9iC;?u`0Fg25HNxd$bqEirkVD^z1Tl{~-W)h<eM%80X@i$f{s6L<r!0hNgT
zy~~;)DV#usVus==s`=0i1X%;vM4C6}``H8#L4d-Xb^zt~@UzZ1`iC^ZB6u>l9zjQp
z5wF<xb4~_es<SPa;tK%QgYPfCKGE?8MV#===T*NKbWN=zBv4pM6`j5J@mKUJSj*XD
z58qnOB+6dK4X$^2jT6fnrXPO=YYr$BlWwmnul?Bx(KjUOmhsf`YtW?+sz4GNwb)>|
z(UJy1UL<o_3?nb<lX&1G4mI?I8GkVYdQQDW76TuV5IOm4ouL4(*u&M2bRNKXK!fWO
z(z-qI05zIh=+6|ntfJZn0P5uqVN<GMZ)vq_bP~zjsOj`i)2zXxL_o#&`_(jB8F4K&
zs$Hvxb5R2BvmFlD4Lnsa8vEtSxn>*TAu*zsemyW-)i7Q=Z^?x8J`cc2*=tlnjWNU{
zGED+d7SibafUmZFkLitv3>}Q1TKo*46UZY16Zp3SL<N=$vZm55i@w9kskA7hunsPF
zSHF9__F)^v+5ADoh<*Z#qvJC>^nLFGwm*naKe(q*%Y<BQAt_=9V#dA>q=!3zM-w^A
zVAe(*AzBL~cn>5RBLirzmgI_ysqeKZp;YF3NQZK_=_~bu%PT&UJOV7Mos4!m>iYnO
z!vGK@Nw~2pBgi|T8%*zAEpKDZMh+Y;KvIZ9u1yYs1xzIj2^Xi_1aW_)>F=->fbA`t
z5m<{lYBHpynaXfi&A|3@<8c@O;QBWI{F`l|@q0gYEriBFW+g}czAc%Mh<?yuO-9J@
z1+0ws+2S3TD)Q*QQ1w^?Skt%91TeQ@US_LL5~9}X)R9_*Ii(X0J<6zBpVcTsOgAx{
zXsrr3DdGs(99Da8%~zP#@mLS>SZUn2o|Pj@4Kea4eO#L-K2mLzu7UIP;D`^}B~F#1
z<Ad!n8lG6w_T#+!ZFMfB$x&ijU1L;>X*`G@VK1Z3dVDp`sH-lIa>k_W9%eXA7shkv
z>p3vfTq|dH>3f){WoUnvs2Uvl^>o1DE8!4KEi@N)5$x5P^F`4llSby3_-s{$(e0yE
z3~3@;E54>P^+Xl{B5JAGg7Q&I$6}xIQWOaq&y6iiH~BHrQmYRI1uc{chrD#3J6jIT
z{Bh#x)+JNC3Dv>zQYd=Vs+<)#tqUfvgFajy>0FFW%oG(_XcvD^Q5WcCt!}I*EfIE5
zU2hCzE)OeXj@$MX+`DKqgu=%vI$7%;w5;;}SO^8wYuREILpfhR5yGi;v%(cb6R%)Y
zvtjSCw9{<kj_S_zx#~cz)T3d9j@Iti<BOJctpBcgkaVU+IHv+N0YoCcTNvo3c#3y`
z=II%#J&=xA?wS{PL8rFyOe5TZMoMh6ws0$>r_uWFm_CW=CU2{1;CH91j^hRX?7m)t
zEiuo!oow1Pk6~B%zb)tbcB>*x)`fhPbjL3lD&%#Yn?~=(+m>*ADS{UJU6?~wV)~i+
zsZS}{-}&5kU1;XqxI2k71ZmL>o~6imb89Dc*R8d&i9M0yjP3Tn2nHx$I>eNe)$pdv
z9E~jUZKC2C(hF7E^wJR6<gnb&dSbG=<x`?aVS^EpNYrU0S}aE~tAR)S2*hd=7-)C?
zXFnA(m=}Qh;Q@ffq*)HKTw^d7Pu6=qy3flpO%(H9{07!`P<WE95opzXfyw}#f-lTw
z+9wRA>QjaSBnglm`2Zh*C7%y43bbuMXL6W=T}iK;b3Vb+K&zDH21F9@;Xwt3ln&Td
zn}B%ZXMv(MaHYTyl{K+=>3x9jy-=wRr$-^|hh2sJ18j+@T!9m?+i((2f&2k2mgV#E
zFb6h!o6k8i>hi>vF&vN9DtcibM0|cN`ECSfiUj%~?vcM|;slLu|D8ZE+CgCk0_%1S
z-cg6^#sg^n0O&pfDvH}`tPz-GNn#IvAQOrNFw_DJ888J94P$$N-2@Qr=S0RKzy+~@
zb31S^nCkSJEKd4v*{>iurP%<QK`($4XfQkm6<(($PSAedYy<cY<fS3->`;p9<tT!^
zz}^NuDU<hpT*2m7{r$+)zzvgoskK(2S_m$I%N&eOV3pNyS$;&P5WO1+hXXpWfXDXj
zg+$mu@cG^s@ofDsKpp|T8c;Zd-opln$-!(Hn$rcikngse=X^Z$<fydr$>JijkvKqq
zh?)<=b7~cd!<0_}bcI1Gid=xqf!VY>U06t~kP6h;YxSYW5EytALKKEq-Cq0a{<~x^
zx1}xg@CFjeg!lmyx(a=~_ua9MLM1SB%u&n%qJtf%9@I?BX0;uFhuZ`cLyx=}_P~@R
zz4O8@f*;0ieBMDvf?(3=Mg_dJrdHKaVi<#rn2!KqB@j>Vfg4v1&u+PMgsA5WmoV@<
z3B*vaSpclY0$l}{p}_)Sl!&+mLqnmPQJ4e7L$;vNZjKU-R_OQr4L*}bm^?g!$^GqR
zOtzLK2(M7Hnr%L#q89gpCo~=)L7MI9mlf5jb_b3Vq+x}sbN@oi`bk;4^;IaFtrCg4
z<CH?(BKtQ53QD%1H}e6i|5L_iJ56p?4h7Y#;=H|yv{^4EH^70?!$i#v$P8_tfipX$
z^)lMd7zXM~21Wmv2%TZ>Rs_MvUAt;WKTj_<boHe0`DWjSWA+0JfXFlm#~4p-LZSb|
zYoymIooU{lfEjYq9ehBd2%`K(?CplW56x(v0OuSau|w%<+&@PpL$6NF#ZjUeBP~pW
zFSOG!P$ftZZh&%Q0uc%w7AddYKo|_`o*gNW*O1?!BjXK>IKaRHb|y(?fNE3}o)KPX
zx(Nb87<h42AT+a%P`|-!N{M-tPvy1OFm_Hve&4-TB8P>)E$DqvG%(N{efSM-8;k~>
zj>-cFhzkCm9e}8S%R8mnh=g@sObPiT(Wa~&QZ&?XUcRxJ5e|(LsR@KwYLYXiIAtIc
zO<<4xu*alZ|J)J_<Mj@(SW9wkKE1<GZUQ6=EZ`E><wlQfMd(z%P|Vx0?<)2)41$a|
zc7Q~IW&QwCR!*j-veWnAbVThAKANDq2v{a>U?J%+gg4t)zklEm<y(RO%Sd(SwARhH
z`lbq=`in1%c6DU3m2@=-wcs;0BDLBIwE?9B!wLJ9#n3TH<hZ{>m^Q}g^|ax5wxdoz
zz<2X`i|oB%f+L5pnLvVm&EmasijXU+Eg-NzR8mWk_tT(?YbxUOYwlaO;3>VP5)Q!U
zOohj8xpH@X{~PhqaiMx7R7+z*ZXZ~fB@<B><#z|S@w6<*zRalKyhzR;E)brFxFyh4
zXdnig&k#zfjPa)^YK`-OB+N78X_-(5qbc?Hp489gw)2%3&I@%QPZV_Jh&TUc5h}6}
zs*!^zj?W}TGGpS=$tvPSX|H8K3ox%*H5Wu5>3Ozm7+_@qs57aN8D|`c+~d5y(+Uh>
z$3iH58U6RA(n|4JUcBaydh!`PEK|9To|e}oJ292?u=?9vtzC5E@cBAXvas5OLrGW*
zv}Ag+VO#Ta@Cr-_2Sj*Pa{A2iaT@wwcU3M6wiUSJ3MF6jZO!yopje5TGGAQG^!=9(
ze5pNGjMUHmFUQeh({wzsWG*n9{f@)kn-);nr+h>fc$Usu=FYZoziZ@ZE)>geo5a78
zpILfz=i3ayUeJVlo?n63`3d_EG{7P3$u10r4E-m(`QH-l*7u7R7xE+RBpA+e;|6Wj
zUzsMly|=aEtFVXs?f*TERz{yRv8VO6joML4iEsIV_j&giZS|AICi)4lHjw?mxX>+=
z&DVQpdDr*A#;YPwCw<pv)5G_IIxJ*!Lt%B#r<~po3*q7I+~~X_<Cml3_e^d88w@*K
z%H&fbig;|NXu-4s!!H7y00T#tWH+0uftgjNlzmnlLq1z*w$|w`Ro^cheB%W+<B#Dt
zQk&q+0Dw!sKRe2>Rdm2s#Aj)MWKDrMJe+Rs1h674W`;qi1225y%?4K^H7pjUd%~IX
z(GUg~r338-I16M4OfC<}O&|loyXXzM4*(JakbBu^kUM|_H>pct?>>Lwwh8=fkg*s5
z;QVR9uK{3(7lh_u3sQ&#oc9Ia7HMmQfOBjhVNReBd&qU|Q$P{-2db+yg{PUTyag2l
zq#BlBk4{!*nuc71*nWm$mUL=rP9LLZO4w^}2KbfheZhe<(8XEeS^aQJV2XD89Cd>z
z0EiR`C;+s4@I3)ug5w6_al>!$u*ijp--m$V19AWR>l<hyknz|k0TqkhzoXV@_5pl>
z`Z;Llh5|B9c?(c#wxFUgq#HozXJA&Yw6n2AHUb$}^A=V9qJwRNUwy0Txu}!J%JD7v
zV)_km3<Chv0<9F~2c)fT(B}C>t^%>h3~fR&+0G0?OTfQ}IkW2#TNdqZ=c?kBpn`2O
zC?to+D`)fZd90d%%%uFu#t9*^gvu6BGU+$}1YrvZkuCs`17N!Z6h+wYlyVlL=Jgtw
zyP(p6jyw@HMClDK6a-(p;1OWAf>;JXI1Sw=5iLdgN*IMyT9_(|;B$2V)z=Ea0F6Sy
z$tN}Pc?JBc_28~nV>;&&CnBOUPoTDaKm)b41~3Vn<qKDpsVC>F0)b2MRVd@WloGa<
zgh$o#GU2|!$9tT9IO4}5Ol)XniX40<yD{pf4alnjzJtCpeh#o3t$>vLStF869S%GQ
z^SV%Q{z>mL6v#$&5^l=+N#>?9y}j*LK2irz)&7`7p_=2n?jHkR%7BV6;MFMHoj)1q
zU<4rfd6La6@bd5rva0S)ca;26b&KawYO~x^1X%)@S;xGd#`>fp@=_|?*41_{9&j||
z%-34&@dV)}#6gu}wnA0)3eX1iXF!UJfx-RNBoM>+-2g6~B6uH>g`k{?(7@P?PhM<{
zgAH}DMRQzXG*p&<$F_qdYYrAiQ@xs=v7!&tXS(<*6m@OG*E;y^gnRX$dvu*w2%AQ-
zkL(g^dx_bmh5sb%4+OTxk)kYub<&(;+80C;A6IC`0?s>uv?)sH1L2E4k8RY&H|T#k
z`tKyU3B4?E$U*@o{LB@lJUiVQ0>1Q*T|8A`cd**^9vn^eqh4h&m+_CF_uQ*&t8ev%
zS`=#YQ;_mGXo0hW_ypM@aclW{ANUt_h_zD`IBWjxWTlwYGKJSc%CR+H{(DULe64qy
zdCQB8<`zh}aP?YSO;y>BO5b{W)h*w_17PG-Zs|H97>?hm5KuK_R4@GuVQ8|F^G~+g
zgD}4`>etj%v)?Wk<yP3?W|HD{)fQ{UFICQ6?7XeXZuif3@JjM9*YtHjQ4h1@Yg+p@
zCFnUnM(RTpFI`jl*n36${rGm-J57y97lci+@Ogsc4Mb4g+O)*9^`qv`gf}jE<E*ir
zx8891oP(S#tJd+=-UPt<``7c<B-$^nNwSny>f@}m@;I==Yqzl1ZO^6UA2G;8WNDJ?
z;NdeFCrsnM6Uq~fT^td#$@4v!0P5z?z(E(%M}Jq;r5Bk2#)HZcQFfLHpgNaESGm8h
z(Wd!ygn9j|!N0{X`VW$=O%dRcj(>Lv=+-@&2Zy5%LK|vRH*`WHhjg-?+0zzI{;^EE
zrmMeNFb}sU8Cm>OWg9Qy7R<1$8(YTKOl%j!h+*e`b1+XxS9)?B{AACn+Wylc$Y1#A
zFL-!g(-JV{i4_R~sAs$TwU<>>q!Zj^(e&8Rf6lr>TbE?)Wqkf=LI{e-!bbMK@4j7=
zlAMRP(9k+bMU(rV@&I1igk$cgtmp@TQFHntAm4Ho82H#Ve~5eB>LP2uk3|<8ivlgB
z{6>!~5)8635<UK@rzMivo-52;qWN+$4s;u65AvVsKY)(cb=}*LiCk@um^PeFVE{ef
zlV)7n)K0$3rw8D1OA67{1V{uAX}qBp(^egS6?G#*+Hvy0S%K=Sn{n=Q(D8h!Twoi6
zYsSDvYhkg7AgT^QRw1`Tx#)4;opq>gUHbkO)iD+-8?o@WBoIn2KY!HIFJ-T{PW5hD
zL)MO?K5PAZTL|Uc$iAsonrj3TS9)bR2l5N9ngg_z%WB|8x67c|ADG+|67uEr4e0;M
zvRniwMO>F#_uC&eD*?%V2_(}SJO;&gtO^JJR;{=IvH%|Xt<(Jp1|~8&Lhr8J@1jG;
zz~SI)Ako<Mn@d4GZn$2r={t~1;ESG2&T%jp9)W+E;sK19)^^ZJ0+qMb-arASr_;eB
zJ>s06JCjJ5&l$l^o-I{)(nsbuAO;5d=K_EmK%ZNnq(H!hI??a7uK{MPl)26VT6#Nh
z`nriftP(&fW{sNfPB?24z5*>p$YFv`3%od|01DdWYyuSEH?@Ot3zUf~5O!&*q6z>=
zfl&M@Sq#nvtAZXJ(3!w81K|D}C=VdGWL^wC0!0exjG+ke12!b+KOjW`Jy1sSBnH7(
zg9BX49j>OZ;ekLIJe~^eKsHqhMel+6(|3E^1MIA+9KJ&!mq8ojajzt4J?M|}LD@Sh
zsc0bB;9#!63GWhM^LB$s9mF~Qf4|vgYXKIzf8Z<Gecau(>cI!RO;ABl6FLhz{eX1f
znYH-7eH%Wp*#NHnuf$9tI|hn6WCfd{KQQ*e^ksA(kmE%bGer`Bp@bJJeT|W+scec`
zc&ZFk;^QJvfHN(iTs8z;XP5Q&*-V=Bv7R8<0%-esWy}q*l@uDea>a}|x2`Y@?gCJ5
zzypuZ0vMCufmy6uXCRXeN)I3`e5QSdHvrQI&WD7{(9_{<f@8f<!llf=JR+!sta{)O
zF~DQE(Wmpg6mZryuzL-f6;t3I++G|C0L%q=rB$t^5X`kMgTV<~I7BOCBx*JQ8P@3z
z-%{c%AT`s5O9&HzGb~d`vjI+_TE_Y$h#phTh~?ky1IT&Z1@xeJvQj=U79cN#IVmb-
zM8{D$2Ft;G2fiiF3rq8;gVQl%R&nRk%@1zO7-?t*LE)|hRR&MytVg((#g@|pNIMN$
zO|Fs>#O}{EFOS!#?2&U{x*g0jy`gU6ga#eRo3ylJw%ZfSqsV>{$s(SVat!rn$KORW
znt;XC3;DA<?RqoehTbWZX#|{7C;+yiEnv0x`u(O}MYJHcyl!>_?_7TZEM??s%6`BZ
z8`(ekhGRS?5~qi)+Tje~KfD6XJTZ0lX|UYD+4mfz^J|n~$#>FURG>2wRPqzM3`S^K
zGrn7{%_Rile}#O06*<uV2Ii{*qVo^2(1#$<5gn+Xg!i=}$VE@l6Ud@X4hDWJ2GX(C
zl%<ZL4FLv0RPuu>I1?K{R)SqJIf1pPKMpZrP|1tshUmj;cBZvGQ_`wbgIUjTRnV!?
z!B~SV!rMae--7d(=SA2)lPNSvtLV!!HhLefuYqq_WRO56^iJVhx3{C809c?!qo*4e
zu+&s4_;7J#{7!m+rd1KOB!oz$j8wzTn59>Lp=j*Tn*de<$8watUES-t5N?ukm3+l#
z+m?j^NyJaAQn~5ur4r?bBG4+0aff;7U`P+by?Om@!`@*oOF(+f^`5Jr!Mt+EF2z|&
zgDpDgy)58E!+bV&pldpekF=$59arIQX7JbXi#x_+$4kfgN-Fh(v~0x&UvnMP%{fnm
zI~CPUXXBS`BW`9ozs1Y4rkH!Z@u9}H+JWzJd`(q~QD^&As}!}orR_5HvX6PS_7}b~
zx^CR#D0`1WgG$$CjtzP53{{$7O+WLtA`vcPaV;MQS1xZey}nw=#KW-tNB`5l)~40`
zSVZbMb52DMerkuTA->)DCpamRs8F?eA%W&SsTw(!ewP5lPujkQdzpXs64j9x8K5Rb
z`?;9`MW1##*K{fP_%7^ijMr)bcre8)L{~b%O0b{?ntMOJni36xMbl$#rMjs1_Tcqn
z(XA~SRvgxJ)UHLRW$&Nbf3rHO|4FF3&pI3zSFZd2<3|cjJNyvN=c`n319kIxh}>=!
z%rW=y`~OtnPBd-!B0juC-)&jh@m6>aLQyJ--I^+)!A-3SR(g#$%uhA=U+r@CpPQ7i
zQR`&iv_F<t`ijPo;JmP9yFC@{=YchpXMWwiv`pmYk^Z5=`9uyr?}3cw!WyfW*Zu5j
zy<J<>*-%S_HCfS{E1_q%kZE|gzkKblXO@a3C5lqhBC}TKx-N6Wf8br7V=;X|2cj9<
zmW>no1Ld7!EoQ@>y@l-jV@Tc^2-E?y3kIPb-FG0Em^4bUx4@L9D(s>TA7jSG&wC1G
z(kTlEo+2oy^cyAZ@4$&l2Ns89$fc0v_t7K{ijWiz$MtUSLoojRuqlBIJ3}Xpqys;P
z!n<%Y<6z8D@UP>cmLpS)(VcXN=7}G>bcJ9Vjx9Wika=aO6%*zcnTU+=Uvm{$ZLpc6
z<bl6H8{-+j6R|vKddUIB1q4nDus=YLmmH`q5YdPL#RTMGg>tSBC`ALyN9^`j3xEy;
z2hgz=1Y;db><&^Y=zFZR4lKK=EH1bNjTbXd^8i%CpDL$7?xpnsU`S(7eE=uU!IXN{
zESpHGocH3(X((@vd<r$Nk4ioQcZ+Ho3?DWMLm{_K$hY5GH9AM2_|OqjKlPIub~?QO
zj}UX6ZUZ@N&9r#{J2)imw|$J%566?>SFV&@Yef>wepcdqmj4N$f~3uphy%4LU<iU~
z{r@y}6<}HAS)XnMX^;--?(S~skZvjIl928W0YQ-N?iA?|DG?;4yBqob%<k;W?9T4<
zT^|&Ax%Yi<opXM1&V^?pn*vH3@ZEL*Z4sn<Yk*il?JT+p&cSdJ?J4l*K`>MyV8J~h
zlpzD^5I&F@f%Y~{{Q~$r+FpHQa{Lb3ThaCFtiA$ePj<l!CJET=e8G5)$$a^5081WC
z0mTw*j6w=TkZx|zVy!JtVAiI(e_{qbgP#17u-ENy@eQz+j6{H90amgZ$grSk4EW`X
zKusW8QKR0M7il&F4jPimvRe~;9BUma0mncZD+S?TOB?Wcs~}H--+c{cJBYx2N}yIA
z^FsZW#p?{WH&deVYAA_zqz(A*Dh%2Qq!coFSkoYEMue}M(57gzXFop*R--w9EdpvP
zIdVE&ea{vtwut3$N;EB`Gf>4+B@GP*-vS19EE6zocW3F_&XOgvbP}{pKqdmDxS+Nr
zoYapu>Rk<L0`I3wYKQ79)9_TTUV(HAqX`lqJ_f+|c>%CA01CpjU5$P?dH5MCECnS~
z0sMo@&~wn@Ri>b*&}o7sS@s23PG@Gt=z5FZw@Q+Ulxk@ds%bg74KV4Fui6|}pqAl+
zRh}DBA(3ZuI}pqJ0GZKP?)ff|6Q!c?M2CQrpY`>U$4}HEEulN5fE^!3B_YhhISV4!
z?2DLrKq^1#y>bPTaiw-%YK!R5=Z@xBb0P4I{j>pglVY;KP7u|AV6}|P0~G<f8KglV
z*9E}nKKUmQ@K5g1aooEAX-Vp$nFkpu9)coT2xC_N>YD}8mv`)iK0J@+%A+MfEIY3c
zJ&quW8{JW+eVj=HY(k_g;}BmTD<z<Bf{`Dy{*cfH-us+Ulp@)Dt~QRq_bB8$<PuaH
zz_!z`=g<z@93di-n4jJCXtQLX83#Fmcn(%f?HACWbw+cXc{T9P-Xm?x&A_mU4LV_b
zb2jE-EyR11G7btcF<AyL8%$aYeahM)_W*p=aS9T2m@v?hQK^yxm6=MdOw2k<CY&Ur
z0wsEaX%3+;=46DM1kG=Y%Yn2(I5Ok~iHR9QA_PiM{vT4LXT=qDc)U)O`2l1u`cROp
zi9wD$Sya!QQQHy{%#s2#0V7Vn1A<l<8I8;LdK{(X3R{qi6Jav^_gV;+*KAFD7G=;{
zSPu+TT@LG7DaZYWg3&y*@v573@O0uHina8_vChXfS&CnbO$=i*Sl^Ewv8zR3(MI{R
zB9NbxQ%2tiks}fV10gMp)sE|_+6I+UeVi=DiXW@g6x^Lku{x#U_as*Va1WMDxcFLn
zC4U;E6%3%8;uey;JZY%N-AQtiB^e3};z0r_<xr@UujdeX@8}uiiB?1~UlH@f?on#g
z&d;Ko{&o$r=NaOH%;OH2Y=}lM8?i`QP<Uhl37VX8WH<HXOz&5>%Np!d-xnLgtsCqK
zm(|YUtgSXON?uPF`>LHc=t+`sv0*{}c&|bH<(>$)5B-kfVC<(R?DNv4I(qBdmSkEL
z)dKmjAuFpj5EZ9)vGSRb0iI?o5JL&2UBmj#a#Ow=vaeh?XZN2oxvVYuLV){Et9re0
z`p|inwr+I2RzSrK47@^ZRpb;*<te1u%_{nBYnJ>ye}!gcsI1d~6mr}mPb^ZhW92xX
zaw|K``8_ilT5uj@8EAG+!Ufq?(0KmCHS>%^bxzXhUyV^!jX^&^qfJ3hClLD<u^e4~
z8_YE~L4){Dd;M=lBAX*_*i5LG7(oL~N&z9}x*7U-BQ|<Tz;;fS!}2PqcQ(wxLL;Z6
zE9LOve(9mORGH#HXnYxYuX;FMGuv&1BgKtCS1S?Kj(!n$mPUhCW4~a+MdyvXVWll+
zuL3H&4p&Fl^H)I^cv76-`5?SPdCrT=N3o18<D2yG8lbc@ERsL>TCvOKelzJ!sb`dv
z(ewU_J8Kp_e$X2Z9OKgv_oQ#5@(Bs6g)XN1^<p(}OQm7#(`qh)%cpZq&K)oNN1s!H
zei|bTjYDQ-R7b>W4QTQ@YPP-wEyP~`qIl9<;OqklBLn1GP?>k0O~`}R&1Zn?1Yi-w
z9E}{YU=ZAaJb>;81a;@NfydEE02_fa^9H1>_rSkcqF#&udY~!+EvO4PL6Dz`d7aEa
z<&NdFHJ$_VWp6m<X2U}SC+{f`Lsoz-0Ys8Ykd7t`l^*~jS)t!7)&~l5AOltbn**@9
z6M`fJeh0viA;L7C*Ct?!)0OPa639B2OMXBcY1uwbTj?s3g7^;dX9f^^gdbl6X<+Be
zCJO&1YiTmDM;3noK=$41LM>o!7~ATnsXb`~JSVt`>+R+rz2hL`EVg@J0$c>F3Ep6Y
z6wn7pGkI%4R(`~903(g#1A{a`J)jxv(d`F5F(i+`_gYKp2H;+BdUF9{{bN=I`Os~9
z0@l&xaFOUL!N29G^SJMs#2bJFAE~@2=ugamf#!CQI(rHX0|OEw$jlC)Z4CI~0kBnQ
zCjqb!pkm<77iTG7yqpkDFm4*t67a7F<q|NgKjW}MKQGa$$;@O7$&9m0=TfEm2IzxP
z4bg9esU_uhPtV3(qvik=jM%IF6lWn<DhB_`sD%NDcr`GVpu9mRrxXAP9Srq(G|sS@
z4@nFG{Z<$Z^#D`Q2#jF4Nohfl0o)z5-Z*=>D4jEt@7)z3n1eI{T&xGpNFS~N+!t*J
zwGK<bV^D-Cf&KtMC?Jec%VbxU02~HJr?r><fFcJ_Y!VRKg)lIWbqq|b45%TdIu+Iq
zB*@4Fe{_OrUqI4v*_-`Z7w5?&v3c4Ge!_|a*1~MN7@&w9=>GU&@-W*8^b$fsx%h+q
zF9)q&z%Kb#_Y*LH(=NwNPCklgVEh$?3W%kok|$so6Hz!fF!ciZV8%TO{wN)QIgptK
zMgmQaJ5Pq_AH_uf_3^sQEUvq)&{xM@<1UaewpXf=5J0zn9L4sQHT)~z2WND`VZR;a
z_UfX{$Y@y{ER^T-z{kZ8HVmlG*#dWFz-SJlH_Y{ljv51pPDABOFdGo(-Q89I$`8Os
zs^YpPGqgxXb5!}$j>9N#r4~VsuK`;L8o`>-0~mM#NuZ4rjFA#d0Ewx92os9>tN~<H
zz>2tm%MQ%I0NS6wc{l!%n586Ig?cfDjUqVlkJQN&%1$EYcZG4l=Hn}#0Y4Q`tStiI
z3W^{}6L`Di9!us*o!Uq57J`%<&AVx8;7S@nIz#d$_m|asp*SJF_KLA+N(3igzvH`+
z+%|_r)|ibAL7dSj3>+RdLmK#P)nRp%?XtVLR~M?%20q7<G??^A5wP4eHAP-1TtN?j
zMo$97j~NQD8XY(VG)W4~5}|U5RPt~G5Q0`xkr0?cn_w7+IwY<NLgS#f`uIFhkP$*x
zx;V~caR-JCNb!t|UfvDp)><fjO@w#@Y|do12pG?X%@$fw8f?3A4s+$lVJKtApBRRA
zS2n0J+3qMY0?Crgv>9-E3NP1?e|(w;+NP$eOEa+Dfd&f%pOG+v;#w%V@Q?PCUC?G^
z>avh?QxmjGi!+}ByP2%%v?|Kv7!2B)RvHP{?>LD+M9q|5n82Rh1(kpGKNeVZFM+9p
zeJO!aH2K3RWUlEpzB+Mov)Tt&78dShq@bk}-?t&hejnw<=7N_Rw2ew4iH*>>rGYG1
z()SrjA%0nd3yjrwTIE~W=m}0o@=V>0lq%IWQlGj{#-e<bpmDyrl6E)B(bC71?S(W1
zlqmU>MoeKdM-Z<y`v=jZx9Y($RVzu^t2aW4VUgO>&p-BR?2`v8)tgsLg`_<_ANvmR
zh8`aA^Uc#xv$Xxb1!b54Dy^!paWAj+vtDqGm+s`5^*qewWxZIs{x<n6Al7KR-)AjQ
z`>DGh-ptvaNT<c3=?qKelm0XxSrzx{;5FcG4oQa2$qmm%d{mG>xiPfT)Zm>|cHGe2
ztOBW|I=8B8EL&I@NXu}j1XW3<zJukW*z}s997gIgC+cSb(u5OW2Wc>)O+d&5Ac;KU
zY^xrKWr~1*0WGt#U(yp;j6Z?Sk~j=SD-htA+s`m`Aw%W>ilQk5!4}lk5+9|5sn$V>
zS_MnH4>-UAsk(Xa2}(c&=^}DXk*mJj`Buq%IIf%Q^4i#{)L3s^bwW*Cmc#_=(PO&4
z7(p;thDRc@7KkR~zsYje#ni{&fDjdI2NP2DS!a?}4IvZwvO(+yMR*7amI+-z8)z*l
zkWGZ6sWj}&`V6AQrwh=qlMTo~*VWI6Q6(T|1A5B=fE{gKTqb=yK`#z3797Fz7hxkQ
z0II$9*g!;L+E52<6d(q{#JJBOO}y;{wO}J?wgNc>8Hb_kNiQ1^k+DBfAhMZ`<RB&D
z^46LSzMTcNbNr}ZYI3g{w7!@EXo@4XS<@DC0CrFa@<$g)T7VL05XG~wQgBlM>B*DD
zefn^%f+oxjNaD-dQ=&BJ&w=BQTi_DRU=fc4M~I4F()i^uNl3^h$hb&lIU-?4AQ+G_
zPnrU_ng{tEV7WkPkYg36K^;sDnrclz^vlChc@!|7$`eqM-GYML$g9M{3j_&EV0TSZ
zQQ`Cu1Z~8?E=OLc#z|b;61kSN++nKOgJxVU3}#kdgSmx*Ad=@n_%SqT?}7#|Di+Wf
z3$!$tU@!tyi@J98hG-2w1c)mz8y(jh&pv2^*4pJya)LlGo!J8JmN=B>aCUO{*kh67
znFugMpJq<>M8qWChn6b?AhtKldKU)yKG3L1Ux*E@6PO#rAArW=1d@E0Jy3H@7w+*X
zdQ4~F-|OHjRl$<wD2i1uEKx$yGt^l5f?hb-_gin#=?LfuKp}!W=mzQx@X0<%o8&!?
zk*v3whQhz2gbeoAWdSoK4VtZDM2uPhzy|e=%0jdACKy}<KU{N=h~go-b~X6q6_m6(
zlne9=fFIM7KpU4NmH#a*HArtowZL#|1^9DdSr~i^^)gT9>4#W6TxNqdpKCTG#Pu!B
zq?4ixdiI%yT|3irTKoF=Wa)Lze@>s>?oG#-MKVIFwyW0&=f=(tI@2LW`r)if(X9*6
zlcrr9q|2h$E+dYi|L{&WxWjOMfcm8z;8fB|KyHJg1EMCE)&y_=M|0vi(Y`aVU_H7P
z`tTW$NucFK7%r=g8C9`vpvU2D)We@3@#WY=(YdI+5X)EL(Wu(`=w#IXp4Zs|9GER?
z;9?|&34tpH#SUB(NWMW+Uy%SqE=_hqq=*h~Y?HiTHIP0zfPHk{l~RtrM!rmqS9KZ^
z#HYRW>Bo-C+~??txqT_o6K{Q~MeoW$LZ<onsNc!a>2=4^Jb<gM>=PuCX7g2d3sP$P
z8=Ti8egZ5-L8(XliG&afRXojvn6frAWyMfnj41XyHxV^4``b#=6lyFyKRT8ax7z4A
zu9WN<MTt^iR2KiJ5T1aF(;WrVhon!oHI@I6NAMvu;<~JXlHzW@Q%(rq_dFd$($2lt
zL)6+D0XEN;HvPyyT&SF{OX<=F-0W;4>+g~$%Y9(-?|7&*Q_(ro7(uY5%)r5o)p;qV
z@RIVrn91r}qpqs~sM)cbz|P<VD{H!ySxblx2eC;q1k;J%W|ctYA83W6+C7nxpTcQZ
zzD+7!#N`{JIPm=`qG%}YUD#E}$+&V;OWzLvH7z`$7PrJe+450-*>1g6&Aw8tp139Q
z?_TU}par5P=si@gl&TyXBH396NM5`C_H5gExeF3Y^bVALkUONitv8>8>pc$wj2U8>
zN=5K?)2-MX>5!PRKy7Tw&|p0&MbvRI1(Aw=-zhL2GEk*ZML50-B>RYj5IfTh`gDot
zAHqX%WPv~Q5vA}|J(H=xo610Io5C`&C!!pLM7lCMK3X5Sz~s68)m7xo7O_#q6o&7h
zIdZKQwZkY@@8x4hT#Za_-C5{AI^sUg;iwM!!{bC+l>(a;7$kszReC@Yd(>)$4LWIg
zeD6Gfj|}+!T*2)JTK7Q*>LCnysCwltgq%xaKi5$fd#MSm#ZLg&L4Z;Nnli$EukJq%
zKMXl0rOYxi9tQZS9FS_Lvwc1hXf)XBxVF&Dy>kT?32^(<gW?<T;H;&fDn&GdN5ND1
zAQGS*fLuT#VZjO2-wKE-?G_hnuLe*a*3ho7mU>S&*foP71q7;Jcc)(-fdqgLAp9vN
z(Zu`I%1(TSsePoNfYS%K{P!mEhXH*E!hRE=qku^c4CC5!TRw#oZN2Jnl>y$pV-R%%
zbdyfJ8ONZv$?ud20XyV*zN3Lda|W3tmGlinondYklMO;mN>?yU_#>#~PFhuR#Gcbe
zqYo_qa*?xSTy@95TUlB{I8GM-f*-K(>{sWGJBD_F0{-z<i;0W8)8<iq$t-Turr5rT
z6ifqq5=J=_XS~Q{M=_l)<Vz~G^&$h6L7zFd@S!5Da^!L?vl2;W#cK^{)Q3gQAonZ2
zpthaPj*e0$jn=sW#(k@A0PO6sLh)Y|sEyn-@=dS!VOx2>lM8D2i1Tz-j13B1ogd}t
z9Mv(B&5Tz5dE!(KCHr(mwl$i0`H_oeA%=S8&iwxKlyD(cQ~KF^fa6delhH8=7~={g
zwL2d$q5&A`+yNg2)Ic(PI<BFJD?h;h0iPyx_oOc_wGtr)2{2X=34kgB2s@zHbO6|(
zl{^5hlaa!T8%>}>My1df3O2to+`y4n6Ggv&pM86ING(WQBA>=W=9Wcx3=o79=(v!P
z%1?3xDVjmdGd|L>`pI$Hkqtjr*6l6R^II;AGJj}!UeGoSfpCt`z6&~?;}2g0s;~%D
zBf#AQu0@iYAyA8Vf>FP~F#|lWoj}zAJ=5TPDgx7IsYWSWmcR8<#~YBiC6@vA0|QO<
zL1UbwGFHk@P>iodX=Dj_8h~lXkE#CEw<ja6`*Y`8Uq3#2gDyZ1iWNX@RtKf`Pr^WF
zSdy3Q(g#s!U?;piRD<0x0$vW9#Oo@63_*!Q9Mu5^=q6pv=sDyoW~7v0r+Ob4{v=1M
zVX2EV0k!>gJ3uv{cLLJ_fCFq{MExowQ9$JaIZgvOEkV~FvNdEAn9uPG6!<mqWZ9%a
z838f?D+GK6brtY|&z0%0BSG#0_ylNS10VnvBYdJ*1A$#4fUAie#DFP1utk+tVE9E5
zQW*{kkb@MIdD-klC6bE!P;3HRLRZ5njPn4wf|~&32pNJN+hWj$0)Ty#(awiWVhP;A
zGSFWa@<g-;=$j(YD*WCTw!o_c5_oSMc*{57fHE{Wjo^Dxn1lQLI1Z002b4=6U>w1q
z5p<!H`5?dw)R^=lX`^F7sfC?_@hPBq%q;@OMo3N-1ZO~!<HDRegAxoh7~lcp(=&%Q
zQ6?lXEe_&JDNCRk^g{zHF>vOrgGscY*@pe?U@B@cQH->%b~9kmlj4953Y^4SeH~v`
zzSgdwSj}s{X`lQ^{tJE#PP?>;I#-H7TZO>rZN7*G*imCS%?UtO5Y<($S`NfPstAE$
zFlB8F_m3?nuvsVpMjQj+uEqt;J^=3oO#tNz@?5Ock<v#87^BsddGL}_X;jI9F~~@j
z62fh3XpKDcM7A#z(%B061FAx8nHv9qMM9h}KsO*A2F=Ci0mc9TZhT>1fe#Xs9^hut
z@RnFFG>fQd;F4>I`7OuRS3F{Xo?eh+SIw9g#Z@Vm>|sAR;<Zpv!m|eyf+4p(ZXl{X
z_W1yL4O|sBQ)<djVavM7bwDP8D*#-6xEQbf4<3)FrpUAP){}7F2yAc%czghWhdx(*
zYixh5atCaw{!#(Ch$6*jfPcty>+$1zT9L0U@Hph;Z5Qq<l<@4+R^T`W*B(Y5)H-nB
zvN+2qyahFG4r5#-Yyiw-`CbotG@&rR)Rz7-XG+lNrtxS2Y_%EU6auJ_ifomAL4aUb
z5<#uF0qsoqzNBwgprmpPqP&ho5ki`M2rxfay&X3G1u{lFF*+I^3j|Rem>5#^KJE16
z-gZjU2@y6oCqhV$$GPiBxWs5o0;WRUC`$k|t9;IdKz}R7pw(|&ZTvD`!NBPbbb?vO
zoGa0zH9bJNZ_bzVsPsDETQtjv_2KC)j`Qdo)OJO%-7Tqe-?e5KDX9dLBfnVZ31D`V
zjQG)fQnhrfW{=%BSbD#6M@AZnAdsw5*gV~BP=8*UrSqZcB$4g>;&UvCp}@`P@y_jc
zn=hPE{g6sJ3VN5SZ<x^Qa;qA@|AzS~st$eiZjla_{5+oK7P(*OOj~rc;P)c5A>~#?
zs02K>o5Q{0C^Z_!^?<X0$>I!KN|M4IE_{=u@y*wT(-2LI8MmlUn-T6FGO8t6hHRR>
zDib`Oz=f^Ke+W4A$q0>G3Iv~{lmT)=A)N!!ybiEYK=S1QCbnFGlL3mdUo*zFcK(z8
z_$lx*Gf@R_X+x?u9p~#%YF=t#>DFd<;C9&<dym}71uV$xdM^vt1E%L5yEmjhu(PT{
zppb#onm8O}sxUQRcM2H(+%&FNGblYI*i|4(0$%80ul9?G9bkjZtroPn3)g$7KIe1H
z>mR5x?IIrlEo`d>Oi9QBlpNp%%NpC}H&Cg@=U^^loM?g2pf>sTQ9(7(o1(X$#Q?2%
z{c=DTYj{y@A~Gez2|)~YY7bN%K(h(FA9EQ@qQxxG0Dxf1)sHT4|9LR&I03ec_b0c&
zo*BBD=$ZocIjDO*z>)!zJebd&3o7I1<~=iy?j3uKk#_5xZ}#(bDi}>>C?6SzoQzxv
zK*9n%nutu0q;sSupho=x<eVwhLZi5k=3eaDdfEfa#r6`N_5jjE^DFt*C<q^G00n|F
zS>+R$oU^Z9BX7;5^GiC7liaAJLa*^jrcoG}zp5`}kegDRW;6q^Uk;p6FQ7Y4fj|b*
z4SX>G9!Zz?u7L|4AA~seklP;Gfu!|FfB~-|NK`G)%>*0G6NU(^Fu)TQ{^e<Pe+Pz%
zZBPC4$rMqpm!TnV0!#ynUI3ypL}xvnHv3{m%_Wk6mm1W~yr8wAKn7G|k}-hF>IAN8
zr<e8H(=+e`*HFyP0FYXM*Ji7nlBHBQyPP!(r!=*rl1spthi0es8k_L1JLJ>;z{fdE
zCD6C<Ex%}&Qo&P9RZsl4$5H$?NkTz<YWgI^A|W)VIfTY9449Chg36H}EmdVN^O6EU
zUL<fQ5skrDJ^X=RZvRa+bmu(?;{Gn0;^KvM!(JToGoE~<<zsZdkWs{2FCGPi8>sn>
zllik4|LLyB-+S|FW{S2!w|G(N)!swXSP8Y-LXj1xg~Yv|kih*~khS3zc%BG^tfZ1e
zg_zOXe>|%M0RiE+=bt>j^811UzHv5paj~|ybY}9fv)$K~cV6W|?>MZKxo%1B<^qVC
zO5t5785#zQ1Cv?}V-=E)lPnvY@BNU#3&cQbn4>*HE?f~!Kf~7Pg#-J|i(B$8E$0EA
z+%=`I9YsUfluYO7?-ps>D_rjtuMKW?Q<R<$1WU%Ys6vD{ZKxnL2OG-1{uG%p>@N3N
zCLSurBi<k4B-b&LBgl+e)2Fqy>G^ya0}FXAe=jaM!-msqLcj1+Lz;{Yjvf}L-O|=_
zCMrx0!4#X?TSn~svt*j5voy8OCpGHh=I=Bs8ss`yqbri!+-4Vix83BcuA8Kw;KJ=H
z8ivDd+#~WB#-2tQmKP8vcr#B*6Y}Dvqr7E8O<s_!Mp>7X2zv3t!C5%a2k8n?NrGzt
zdJXXb{Y;Cq@(us94#=-l!bL3x1Gx4vy`4`)Jfg$kamVL3-yW~1=?=?0m<*e8gdDdw
z7Cy&SXz_m`M<{liRDigZmGzR8@gzR?P?Aq5NR0mzH2u?`N%b_+VsKqY%hp+L35W60
zp>g$?Z>mJ`bydkB4ubH)pPw&x+`kzbJ9<3;<5VlQH0f)ZBj2~BchBC%{W4&~G1?xQ
zO_4R$m*7fi33;=esO)`;`q<}o+h2=0DaGg<JTN{kzr4`|3OKgpk|MoapyuFt=A;+k
zu8X-K)Y2%w8Rjl!A}k(T>swk0JMbr&AcVcZV0arEkH*mPMnCVR!REQC_^bEFYQ(e|
zQ@(CHukm|lAsNoeDju9exbF^4p5e+P4ArE(tH)EY3E*(gfEZD`+s8|1HFGH!erOXW
z34BnH)EqB_U6CF@v<WsDy7<7VC?+%MaMJSY{4>_gfj)bc9JFJx7Z!R(A1Z>t_Y5<!
z8YN1$Ni%=nFNWk~x4g4Da8G*Mpf5?9amlvP(cOwsoBVI#--Hj$K`foxDJS3uqBaX0
zPTlD7^I{(MkT8Av5_BjL6S@&rSmH-^)H9U5!}rX?Il#kGRzF+yt>)3C2K2n|*%8?2
zF-7R8*k=)^uIzV$0;<d3+1gd!rs@c!bP--~n<nGF=uWbHDty`2@*c+3r)%QNAwz`p
zK-l0@((<q-awz!pVtMp;#$l;~Pjs*m9ItJ4;^Ckw&aRPA#o#=hSa2&RbZaCOb8#Z9
zI-fZ~gmMS7k^3_yzrf=DHCF8FU6fp$*tl6yam`dsy|3YY{(@0izr7PC@Ym3t_^&zL
z&IP^TOTl5Qz?K}oYfDxFp(646VlJ&ok2JqNd;jWZ8PJoq>A@GJTkY1--Y3o*1NBNq
zq^<VFA7h$};%eIZD|b9R99+sy^0Y2D4HmR{p<iw5NS!y&F>o-NauN##{WL!PIykJ{
z?8i|jF3pVB-co%=fF^|3KqB4pl={NP_0^#JflSP6Eo7;{UYj3JFkgnRrANc%Y;4%Y
zFW0p^chFqDDz>pVJ3*^Gt}1(5(&EF_Gdqnti+rPh;O(;O#!_+V%Hq*iNw|Ce(=qQd
zssO*io3nLiYw-Sxv-qRoyYK0GhDO?`hHHFWuXvoEy{Ru`-Z0=Si-tE{dd8qWNq1}7
zz69HY-Z?^P+0%D0#qny=slL=^-)$*tR<m=V{9IaG<JI^2#g96*x9xME2(+b!v!V~i
zoW5CJQ{;cQsq?M#p`$^Az!atnzT-X*MNx&hwvK8ahlbKsaFby{sJ`>Pmf@xlrH5!$
z<vObG3do|$7?^4~j%8~0Rhv#z)i~2bdWC8FeTB06SmZqtDbwdv>cOV7(S}Y>F|!85
z^|NiqU!6>f!e!%3i~R+iHq|uFahswix*?eltLuny)-b+VLJn%&l+-wK9CBA`D&Frg
zrBD0^k(`9J8;hD_*M}V=!dzODS_PqUq}mLJvgZd0pT>WW<*doNHDfOys{1zTfe?4>
zag;e|VdL=rb{p1@Y2T1U?g2_g9v-1riV`Xr76L+m3<Bc6hjU~Q&P^TcT^^rR^%%`x
z+Bwhh;r#086zf^|{(ZjJ=sLL3&MPz_Z_rMrg>w5%##oFA%+*XoTMbdd?XFf$H|x}M
z960zFd_-&m(i0y)emu>j_`b2PjMe~qz<RE*N~mF^SOKwzXJ*Cs^W)I|Xz^6Z-PwVI
z!=RNJK@&Trl#ywFD$45B9<xzBQ6=U}!4jCMZS=Kw2K}O37knLG$(Y<W>iJ~1m1ecn
zSFd9=4|Z}KYZ_un?%I-@_rzYhq;_tq@aTBUeC2R3XBtjQFB2m7q!;!`;UHJoZHV-7
zM(hnV=QE6@!(4LbKfiI|D_5K*$oa`<+c<xIWP>srw*JFkH)m?R$Q1c>tc|a%`$m7J
zPiQDIcKA6NZ@`;SYx`+Zk~i$7OufXI#y#sH?<#Z5-oxIukZd+o+`bM;k4DUG-e<rv
z;J|iGTT-7guBnK=lkK}}*m>i|dbedL@EyDU^rF`sSKVA?a#V0chEFFO9YcH_JGYnk
zlZKg2sq_-&#ANcSn$1nx^Uu-At8g_@+CM)lsSzXwx;`gc@wPuXCSQ#>Vxyxu-*RHu
zLuJqSRqyxOPN6C~D`<2xm}>IaXHCF5<V1FWu-Kq*mTD>%n|<ie=esQ}YeTq$-uH??
z!}pOf+m2~;L(4_38&b36DF=!I_r~3g6%C<of>?4llgZd0^f%d#6U-*>*Y37?HVU62
zW*V=-k()2W<EkYZifL+>*N%%#yk)GBN@Q1(ud7<#QnVe_@)O9LvOtKpjm3v%_gZzs
zsK@mToI|@#{~4kb@^Kv}6{mg0vm~3VkvovD^ZDyJv(GHMv`?96lHE^dNl#!61ex%v
z@k9y8pykDFwHI3(<6~nZMbF;<6e`hAi((NwfBR~!D!GsFSbvJEy#M2naGZRbAM>DO
zFm}~AM`~){tZ{_V!KaM$tVYt6^p0-A9l=}+t2gJ<<1xqCTh3Jknqtq<@}$4?yOAj*
zrS(+tJ4P_<KEXGvt$stVht#JQ@j7GzBQ=7&$Wmv%j1X4H7{-R+#jKKT$jT;^L10%?
zE&kXzf3-&!l5HVd<vWHX{e}{jbH%-Yr`tbNqdMf=(->K1NDsXhR~3A0p75sjq!(<V
zP9nm`b=4wez98qR&j|}q8-^;JN^%p&g)U4kYHs*}16`O3|AdP}G~-ngyplB?Bdg<R
zP1j((ro5G=bqaNkSqn^5GNr0ys>cdU#?SCC{NL)i45Le*!V{;2?PhS*<e9l<!)e2K
zgrw>qH_g~^$U$eV1k6BHl%S`;3H0!n!|Get>%D>|AsfaN%UWrf5nD70(oP>@|1qcA
zW$gSWI&$SgwMFY4?p#=}yt>m@Jo(cB*C422LjrXZk*_f`<7fKFf@4P`x<B7FZbwmN
zpy<fsB;WBvZbsFL(c0>q(lh1y(6ipvV6ar4?Q<MuN{FTKx>3f$BpnLJjD&jrWDxG7
zSuD(a#+_Y2D{0U3OdxQ@Fl$vi1R+{y&@7xLtHngMI97X+NDGmfQ7$yT$nsY&glO+M
z{p;^8T>I{y2_m-G=uf-_TSiL5%UDj&t;iQjECM&Al9HL2<zxof;}esqnFdepm5_xg
zC)fgL2azfa-Q*fxh3K%}E@tEeTnni-FEY~idq@tAltz?AZD1FZPgZCTNp7jGho+1?
zgj<!@OO_v3#axfDuD5nh5dI9iH^p<8EcC>lUaZK~j4DJChFZtPGq88;U0r!6;nA1S
z=8I@<cS&8Keb*9P%}ictd4TnW=|}v^&q>zM;fb~!?(SK?ORk~pPhWJHu#H<cQokoj
zo6AlKgzFV?&!@{hMZNrJiLaX%Y2}a1#=u*&X|L=Va6tgIUwnFzdkb%on}v0)A|Oy=
zTi%boFRJrF)NT@W$CCi-U7bFHB!R81hti35dmK{6mvro;6|WSLL5_U+j)&Hu7|xWC
z=)=SjWsP`jqd`9x)-N(e+fnpJz5?%^qU*m@HXRC8ufghvP<ZQQC%2a~yBiQ>A|Sqk
zo&8LWg;G5DB@)uj!@Xw}{ajHr@5(Pg_86U|1;QQX>w5^?1+-7vR=8a#M+odDTr50&
z#F2bYGrq1i%>}<^<ycvOi<)+ae9{Y7ZMTQ=j#ZMj3r^GII3JIv08QWK03q`MX5d)y
zf%UEWW@!w?4_N-#oanUv6KX3{8+v=a_VF4Y2kt5l-y-tWWkt^s)Z7;?ykhnE=7J>b
zT`cdkBj8V95#)6JRaBndA5^Nm+IG5JTQf8vklFSyd%DIvHmWMA2#+z?$1~+R)k(f)
z7;{#$QTC2bN2M6G*nOtGO`sW~f0Ja)p#^vO?q(;~+nJN5%;YH^mlunjFYZ#BQ~ea)
zN)VTDZrb{Mn8UKS1`9|3hSnXP;kov+ln>A3A#Griq#<Lgc}I|A=o-KE4@;33#?shR
z5>GCzr!%CYJeeVAUSa*ddi3Jk(^K_kO^ifLs5tlhE}qzp#<y@dd?j(Jn_IEE%GW0w
zv2*WEsHW);V~EOFi%tdcr-+}%%%!NmyVrW=Ey3-{AKJ_pnqT8DUywE<VEV$Ro&&l6
zrEn_$g*}?jY7cyY=?cyA?!`{Opb`2eu^Ne5cU2_~MPip}Vs}x43sRyaj{;K%59~{`
z@~`$tO@kXLGB`umGC2062v3nF-|=5|O`TEu^Qz#>rI(5MAH-W93qcGEeXD0=)m0a-
z(Bc-2)N2^z>~rmie{DCP(kOSmgG2M+GoJc^VY@Q!DA|YX`cnR?aYRiM@|Gd>>K2c8
z8FvvK8PW&p>`Q-p%fy@2`xjp`;e16{d8(^c)K=4^j*G-cs5ouB`q*TTW%Qd|d}^5d
zl@}A}tu6eub;lH|4<e~&b!A%Sq-3<PO<uYV*FB5b^I@k@v%%lin(InCV)}Z(#kN1c
z$b6)rYV>dd<=Z3_cX%n?A*j8d%zr08nU)r1)}4C{DH$KA)<rk>Tu-zM+3ISGd02-q
zn{#hQPV(LC36tO#y9UV@fo|JZ>N=tL$n@B`x&l@6$NLBMO7AXc1Y7UdG52a%+Luh_
z&+h}MJH)e8N(J|WJxsc<AOyxG)<VwjuF-Lsh)8T-K|vV5CYFEs-D_-L_oZX&g$M?1
zznh%i+nNcVV3^lD4c>4gU)B>$v$d}vuhht!3!rKIf?!B}wUDZw-liFGFnGcr_C7gS
zOMjlgVzo|<lFsBbn`5^<>!%0reme>?KdVV_=3S@~aB|3fVgz0Ip|u|_)MbSi*?(HJ
zxu^3Y{&?EFEKWciGBO3h%#pLYJ3C<CL>IOscgtwamm4uK!S6H!IW<OEbNX)ciT+(2
z>z;excq_5~Nn>S}uk8-*?PpBY?g`oH+ly3gxspu<*c9U(`L2k5F%#A@<t@LDmb-2t
za&>bbt~P>YVmX_Oq1mcS{ng;ZGGoyMfM;<DvNvn{dPVW%GhA`o>4J)!{Ac6Fp-yuZ
z>oD5{yH}g5T{O-3RHz-gKSIyU6g7Q`Wt`Mh;c$Bwboug9pOey%;8{IG$y0~#HC2o!
z_7gW%=t`J|l0=-uH9)Ai?Pq=ZhTE1Rp)+i;wKn`tQd5F!wV|Hf$ta`dBo!@CXzE-P
zGfPzGe%7u&=29p$;AlAG41Q_yQvGz{3F0v7a;j_|l0vNZiZ`Qsuo_B{7V7L41hgh<
zK2nquVgZTD8U=*;CdVo!w3=B4oUo{Lh$m?>5qa`mqq#$@+K0@CqqQ!&XU55Jdp3&u
zKM|)4Axmit7xOx|*CoHW4aqA+)JPsjhjY%Z=!wJVf=8aw_&ra_ri_6$-$O8`iJ)`Z
zP1e85JBSNw+Y^oW5jRboRNo=AbzyIRnawiA?7$JgLAewlz;G#ZGtXgGIJOndH7ufi
z0qJ?8dNG+wQXT!K%C^zp51tb*v#%|8cv)!e9dzd&O6LG-j`Izp;IG#MvJ;3>!`>AM
z2S&kJ$lF|cZ#4FaE`2e59CUmITHP<dF%?kr_cAm(LX+i>mv3@n`*gH4g$uz^li2rY
zZEJL&PopA-bQjtmnqKw{x{H&NA9zADf5a3{#{E9|qQOP@h)j@{QLs7gTuo!z_aV>F
zz~JIyo}PplO=lQp$d_n_v!=ZZKagr3no|Q+skC;X)TSv}L(tY_-zXucD`h}@BUG`B
zO-F1APQFcx>RkVAbO%Fv6_Jd|%lyM1-B;7DmHMb>TOT(mkbfANuA)aqT`LQ)>a|^E
zR!MdJ%DUHpwQT=2&Dqr43^AQg{l&5z4~Mk_Y8Ai0Jp7@ocX0x-toYiYZv9jK&%})V
zJC{$N_4MZJ_ymHq<tB1=tNdPj)k+IsU^5T~qg2>4$2th#Cz6D7bWYWiz>Y~gu}$o`
zCP^*zKfNl%>0<4$WDKr@wrD^a^JXx-Mp#_R%F054*t3dqU;Fj_@Pq3cR|8<>MPpKx
zFc2<EdLXxvGQ4iAY&vq&A79zmvR0VThU#5Qh%Ve<`~oq7^y|e4`>5aTvyj_@V@|Ii
zZ{e+Eiy6MO@7*H?R^!+EMfDs0bD=sv@@oBSW+v*fh4)*aQgV|8aNh|&m*3bw$qK>n
zb)>xzz&ZDB+hB;$x$55aG(Jn5J#`Q_fw_}L+U#_CICywOYM)}PkY1xgKxk$DFQoR{
zgNMysj2~fIbfRi(5(`%F(mgiJWqn<64K!-cbDJo%S3f?p9@~AYds&v^_F`!4>W~pu
zN~-_!(Uf!Nyt9{lX{d8yF0Qe+^%++mVgyCbyOkG>^H;+Mf;6k4HyY+y*;JTG&$wK~
z_{R~yNpxsjy3pDE?6$E<H@Hyee!o?0Iz<?4pu3e`&~5c%Om2r{{wl*+8fj(QMNUb_
z#1{FrP6~@UZc;6>J7F0TmZb^}E8iJ9H6GJm+L51l^d4UV>xK!(s@j%OD!IgRox#?O
zQ-wWIS1tY-;<Io5xU@=@Kdpp**(_V@GfxtkPH7-e)VtKE`s;k<G2L~yu=?1Tr53$`
z-8QK3-gx~IZc%fJ_7krNY?oE2d;|iO&WqI~Gi%Wy&+Ofp2zIXp-2;|fPg%8uJhNKb
z6R4j^OtS+I6ze5y=9oXIXBd|QQDe?0pWu=>{(8EZy~*N7_U-*1wOVea>;=5gF6Iv;
zM%$`4N$~VS!P{a9X20YQiSvoaZYz85e`QI~8~N33v>H80KylqV7$wDq-`+d*9v)mh
zLHF7;y-=#5*{a~BflR}%J57D2OpYn{vToEubJW;H&jqWe<*k-5RNML1j^X2JH;`(>
z=!S%VsDb`pr~UE4&(1EMw&uUFtqVGO4)a`CzDt!XNjX*lg9&?ikqfh)vnsYCdRXmy
z?^9^r(NiH|t;_q}Kaq`}5wvM3-^HK^A2=lR72qbObH6N18het48)W{BI_-80#gZ&i
zCdD>0mc*c?aqRvglpm*`^7C$3uz3Xg3eKv+YgXu$GVR^LXtfjDQ5De$*N_+bWs*%6
zykk-0EineA`DbA-xHR+wb|;{+KdT#u+YRI{oF!v7F%i9X$)sbbHkxel7%4!?M%w8c
zLDfm85Y=T+N;1pl8Z!v<+4t=K`Px^13}3m;s9x98W(MO4BNH>PMiI>!ORrP)C*+L)
z%PLwND>~uua<!o$m(XjoNzwp5gHc{42&nnw*Sw0VFAJU;hMGCK5G6pehkAde?tcfx
zEpCplh?Z=wo~jr>i*|K6<BgiQ)4!{g+O)boRZrPqToRY)bHc^h!t@2NRz2Te$xYII
z<@Q^aZ$(b*$0G`As8a#~!r;)bkeOA6eRhInC^U2?p@BGVD<*EiqU*k&JeK;}<i}?w
z@H0BI>I;!cPYO#iImd&fRhhB27zAbXWC$)rj*d%Ihx_(BPq2y%I;CKtmJ;zYpo|vf
ztJlK?pO|P`#4GXJq4*53Qad53QZ?9H6-lF*$ExVOC*wqoR%eXJ->O{*b<fIlUT1{}
zu9$eie~&XZL+HvHXv!o-=0-s{Vd7mVpG1_kZ7FO2vyEKk5NrOscao^OC=u&;()ekg
z=UXSuHmjAh5A3gsQarf3@%M0Y+j$altw^27#fsqJKZiRNa4YR=-BI6sBrMeEQOI#&
zf>G*>z_g@%F+6HOF6T~j$1zeKd9TIOv4)3+SI%`_kJ6T7Rods8ZJs8@BSlr-!u+wB
zJfCeIl{G&mU^DDv&_|!c4ML|3WGKdrEGP~u<K}1aVjmRT9Ddz}nBkTV5N;3AW<j%(
z)N)GdyvT*IcwGP|CS%$iu-Jd8q!)}ljcLA*pn><XUqt9|R3U#{;qIiMR5NP{E4vR{
zZ#=6`W4?H4i3az4*4MjGFSBIQnnyx!Gy1Sjq;`jv>YY4W0A^gIjF<#uvNYq=$H^T8
z`LP^U;Y&vBt8Wf(Y9paPE@OS4Mlvudl<wwTV6~a$5VWY`thDp1`>aa`cL5Kn@IqoC
zQ;er)5ohdbY}EFX&b!iAq2vbaGR}u;imND+HAwP9AB5W@Oi4P{bd#0B7h2rR&##E|
zRGyJaHlrRhkhkOuk?O7%e#xR-?d^j@8*<kDK4}N@EsVR)>>GUNPS9)O3N^GO0zGOk
z<!B|?it$)s!KjcNB>N3JB9aObQ|eyIxE!<Yz&wWB*KJdo?0d!TO?d88BU#iJ2Zvnm
z1rlCGn7Z~-kGI8-Z>bqsow9_=({ZJ}RmDIRiJ?qzCsRk_@-Jf3V=VdQ#t=&Je31A?
zOr~v1KDyQ;$u&JhgVCG6kx6In<qdb#ns-`fKdWX@A%5I*n10H4dQ}O-7NpOqKN405
z;mMkcEev+~u;xmZH=S|e8=XW>L}R`s)&B|Sjr@#ijlGOW;7c$&7O&yv$WU(gM+KW7
zti5@e+uzWc2%jYU8ahlk(-ky0rwM#kaTj+sy1|@khb(ES8PS(zuxY(~=HHUHW=Fua
zT)+UuJM^-;^~wybwbg|vx;l;3(Qw%Kgl0}l>1Z=@dNg4xg;`P{fH%UFcam@oyMwpI
zRBT|rMfg&y@mmYxd5DgNO9!mlR+_gp7p*6ep~BJ1s^5k<Z=<O|!XYH?>8{2T{*>f5
zZtJDYumh@jOB{h|56(uPmy=T36>#1;`C{Lk%%>NH_$$$NzxUs^y}S)8dMNoy9OK|n
z<)wj1OIH@LI`OVVwAi}Lz06WV`Rn9aqx;UjufaXj1>UQ(i(kKfjlDwCr0^U@V7!!9
zPXC#KH6EAE5C5Sd`sIE35BYOa>)i^^XKCj)rbI|m8a-PdvD#vYNZ9sUcN90m%yEf^
z)0If$rPC?Tg8Q-rr+GwSz$pCF+88nddd?7aoO;dBJ|wgY?eS)vxKbv;I9*@IpEr&6
zRZa~ZhsCjnS`3tqx0562N+g<$qEhvpy0_fB`NC-S_IJzIJ2%bxCgnnIlW$hO{aE6T
z9DJt*U-D|tt-b{Md{!8%)xfX*=;q;}=^ptp_bfat2TH&}Ky(uRuiW#f_1PKQTU(er
zyD&MKS&Sx*+6S_r2OSCon~%+kFvG$+(F`@)WOs3fXu~p}q+=|0#3X8}=9TPZPyMWr
zVqc1>%h)$29Ehwb>Q?74rKK8@v8vyu=WAtZ&Y$O-n{A*cNhdnC3Cz!?YjL-y<26hP
zX5>b({ZgAt<B@(Upxj2@J<ao42Bohq1_6;cTFm-<&4++@Y!%T$OVwrfL!9R&sbJ&+
zU-5?;B;$q`?V$~%@c|;yhzdhNE`fwCO7gwzDW|Hu-8uWK{YLGRfw=-kNAxjYW*5Uy
z3f2vl+p7-r1DAY~t-KCQy<8`IkC!Ntj565{ly_SBJs&oIF@1T!U#+Zjldu&T`)GL+
zw^?^Wq9I-Rc=+lrttMbW>JI!@>V^R2nQbhlG&o}aS_r^*;tuu})|ReL#xB+l_Reg~
zE)EX1j>h)pw#@(F<o|9xa8CYXJx3=8ODA(@XA@(mf3Ep=;w<&wtZ8g&YHn)|K7fN0
zv#G0-(?6MhXdnu}Kh~5GP>+9s<-dO*Jn-tj?}&x1gRzVG?;qyxc7x<^*0Q!UwlsHU
z7PEG-Gj??TAIISD-tzI-{jvXl_m+RRmYuo1>;GQs@6MC6i?NIApN{t5z1!cd=jh<*
z>iGDU|KluSg9D=|sV>SWt0cwzuloy>_2ugF_C2KN3!7Lt^F!mHosCCFeFt#@T1CJu
z&PZegovM*JCP`T%zhruE<95*$PTTHDH@Ek|8oAr5q);T>c;Dj6Y<TRx_bnaQZZ934
z3pDy}?bj)xyvX_R1XXGA7>;y^yze_{5VuzH5N7x72H9y$i_!l1+RW+nOUnXv^}-~T
z)8fY+iXrarRW3y;Rv_Bh8A&i*KIN^w=hPpbBKG#gU~q7ilfzd~=7+$siAmb82vX)4
zOI)p`#f)*!Yci5jQS-$?hIC#)9pwAMKY#+Sspf@K6+JL{O%nagf3!z5JeHVPIM7*P
z!}qEOwM0X?mUof-i9N$LjHtYM87$g#w9fa0(?k9%l5Zr2u-KWD1FL!Ml4%24JN;T!
zzkZXo#J-!wkb+xJ66W!Wg@nR_z=HVw<OJLDMlgYc`}p<Sr49c5W3jWgGk5WHH2?Rt
z264!D-OL~$9={$hpg$IM@U6O)tDT9xv9+x;v&-+_GCA5?{=SvpZ^J*!ZI5yDPmB3q
z9TWe)=AYr;qa63g^2O#a;@rQl_-6p|*WLB>0D=3TSn=Q2`g7=i1Q&lSj$VI;8vnlD
zpJU!%cW}@DuW91<HGe-Xf4l<(#N$2l$3p-1KLg93BjjIC?;q<yKs?6CKNi!!+0I`h
z=0CRd`^kD-^Y^g#7&HG^-v7;({!0Y?U%UC&>*(xnHu^{W{O>#Y7(xG7=mP)qVEsot
z{qGz5>qoNun~nVuU;n>bdH*+C`6J%`_pSW(DwzD6t^7Iu{(rZF9Q2<D=+E)^AKUr;
n8u)V{d5p+^EaG50e;c1w<Y7V01Of3B{BeYVfG7xl{NMip4%@Vj

literal 0
HcmV?d00001

diff --git a/Combined/README b/Combined/README
new file mode 100644
index 0000000..01dde51
--- /dev/null
+++ b/Combined/README
@@ -0,0 +1,11 @@
+Configuration notes:
+* copy the system-gnetlistrc file to ~/.gEDA/gnetlistrc, comment (insert semi;colon) out the line that reads:
+  (hierarchy-netattrib-mangle "enabled")
+and uncomment remove semi-colon the line that reads
+  ;(hierarchy-netattrib-mangle "disabled")
+The resulting lines should look like this:
+  ;(hierarchy-netattrib-mangle "enabled")
+  (hierarchy-netattrib-mangle "disabled")
+This allows power and ground rails to be routed between schematics without mangling the names.
+
+* set the Library path in PCB to point to the local footprints folder.  Use File->Preferences->Library in PCB to do this.
diff --git a/Combined/combined.pcb b/Combined/combined.pcb
new file mode 100644
index 0000000..a837b0e
--- /dev/null
+++ b/Combined/combined.pcb
@@ -0,0 +1,2931 @@
+# release: pcb 20140316
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20091103]
+
+PCB["" 6000.00mil 10000.00mil]
+
+Grid[1000.000000 0.0000 0.0000 0]
+PolyArea[3100.006200]
+Thermal[0.500000]
+DRC[10.00mil 10.00mil 10.00mil 10.00mil 15.00mil 10.00mil]
+Flags("nameonpcb,uniquename,clearnew,snappin")
+Groups("1,c:2:3:4:5:6,s:7:8")
+Styles["Signal,10.00mil,36.00mil,20.00mil,10.00mil:Power,25.00mil,60.00mil,35.00mil,10.00mil:Fat,40.00mil,60.00mil,35.00mil,10.00mil:Skinny,6.00mil,24.02mil,11.81mil,6.00mil"]
+
+Symbol[' ' 18.00mil]
+(
+)
+Symbol['!' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 0.0000 35.00mil 8.00mil]
+)
+Symbol['"' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 20.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 10.00mil 20.00mil 8.00mil]
+)
+Symbol['#' 12.00mil]
+(
+	SymbolLine[0.0000 35.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 20.00mil 25.00mil 8.00mil]
+	SymbolLine[15.00mil 20.00mil 15.00mil 40.00mil 8.00mil]
+	SymbolLine[5.00mil 20.00mil 5.00mil 40.00mil 8.00mil]
+)
+Symbol['$' 12.00mil]
+(
+	SymbolLine[15.00mil 15.00mil 20.00mil 20.00mil 8.00mil]
+	SymbolLine[5.00mil 15.00mil 15.00mil 15.00mil 8.00mil]
+	SymbolLine[0.0000 20.00mil 5.00mil 15.00mil 8.00mil]
+	SymbolLine[0.0000 20.00mil 0.0000 25.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[15.00mil 45.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[5.00mil 45.00mil 15.00mil 45.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 5.00mil 45.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['%' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 0.0000 20.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 10.00mil 10.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 15.00mil 15.00mil 8.00mil]
+	SymbolLine[15.00mil 15.00mil 15.00mil 20.00mil 8.00mil]
+	SymbolLine[10.00mil 25.00mil 15.00mil 20.00mil 8.00mil]
+	SymbolLine[5.00mil 25.00mil 10.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 20.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 40.00mil 10.00mil 8.00mil]
+	SymbolLine[35.00mil 50.00mil 40.00mil 45.00mil 8.00mil]
+	SymbolLine[40.00mil 40.00mil 40.00mil 45.00mil 8.00mil]
+	SymbolLine[35.00mil 35.00mil 40.00mil 40.00mil 8.00mil]
+	SymbolLine[30.00mil 35.00mil 35.00mil 35.00mil 8.00mil]
+	SymbolLine[25.00mil 40.00mil 30.00mil 35.00mil 8.00mil]
+	SymbolLine[25.00mil 40.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[25.00mil 45.00mil 30.00mil 50.00mil 8.00mil]
+	SymbolLine[30.00mil 50.00mil 35.00mil 50.00mil 8.00mil]
+)
+Symbol['&' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 25.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 15.00mil 20.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 10.00mil 10.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 15.00mil 15.00mil 8.00mil]
+	SymbolLine[15.00mil 15.00mil 15.00mil 20.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+)
+Symbol[''' 12.00mil]
+(
+	SymbolLine[0.0000 20.00mil 10.00mil 10.00mil 8.00mil]
+)
+Symbol['(' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+)
+Symbol[')' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 5.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 15.00mil 5.00mil 45.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 5.00mil 45.00mil 8.00mil]
+)
+Symbol['*' 12.00mil]
+(
+	SymbolLine[0.0000 20.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 20.00mil 20.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 20.00mil 10.00mil 40.00mil 8.00mil]
+)
+Symbol['+' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 20.00mil 10.00mil 40.00mil 8.00mil]
+)
+Symbol[',' 12.00mil]
+(
+	SymbolLine[0.0000 60.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['-' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 20.00mil 30.00mil 8.00mil]
+)
+Symbol['.' 12.00mil]
+(
+	SymbolLine[0.0000 50.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['/' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 30.00mil 15.00mil 8.00mil]
+)
+Symbol['0' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 20.00mil 20.00mil 8.00mil]
+)
+Symbol['1' 12.00mil]
+(
+	SymbolLine[0.0000 18.00mil 8.00mil 10.00mil 8.00mil]
+	SymbolLine[8.00mil 10.00mil 8.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 15.00mil 50.00mil 8.00mil]
+)
+Symbol['2' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[25.00mil 15.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 25.00mil 50.00mil 8.00mil]
+)
+Symbol['3' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 28.00mil 15.00mil 28.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 23.00mil 8.00mil]
+	SymbolLine[20.00mil 33.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 33.00mil 15.00mil 28.00mil 8.00mil]
+	SymbolLine[20.00mil 23.00mil 15.00mil 28.00mil 8.00mil]
+)
+Symbol['4' 12.00mil]
+(
+	SymbolLine[0.0000 35.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 25.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['5' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 0.0000 30.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[5.00mil 25.00mil 15.00mil 25.00mil 8.00mil]
+	SymbolLine[15.00mil 25.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['6' 12.00mil]
+(
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 28.00mil 20.00mil 33.00mil 8.00mil]
+	SymbolLine[0.0000 28.00mil 15.00mil 28.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 33.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['7' 12.00mil]
+(
+	SymbolLine[5.00mil 50.00mil 25.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 25.00mil 10.00mil 8.00mil]
+)
+Symbol['8' 12.00mil]
+(
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 37.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 37.00mil 7.00mil 30.00mil 8.00mil]
+	SymbolLine[7.00mil 30.00mil 13.00mil 30.00mil 8.00mil]
+	SymbolLine[13.00mil 30.00mil 20.00mil 37.00mil 8.00mil]
+	SymbolLine[20.00mil 37.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 23.00mil 7.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 23.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 23.00mil 8.00mil]
+	SymbolLine[13.00mil 30.00mil 20.00mil 23.00mil 8.00mil]
+)
+Symbol['9' 12.00mil]
+(
+	SymbolLine[5.00mil 50.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 25.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+)
+Symbol[':' 12.00mil]
+(
+	SymbolLine[0.0000 25.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 35.00mil 8.00mil]
+)
+Symbol[';' 12.00mil]
+(
+	SymbolLine[0.0000 50.00mil 10.00mil 40.00mil 8.00mil]
+	SymbolLine[10.00mil 25.00mil 10.00mil 30.00mil 8.00mil]
+)
+Symbol['<' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 10.00mil 20.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 10.00mil 40.00mil 8.00mil]
+)
+Symbol['=' 12.00mil]
+(
+	SymbolLine[0.0000 25.00mil 20.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 20.00mil 35.00mil 8.00mil]
+)
+Symbol['>' 12.00mil]
+(
+	SymbolLine[0.0000 20.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 10.00mil 30.00mil 8.00mil]
+)
+Symbol['?' 12.00mil]
+(
+	SymbolLine[10.00mil 30.00mil 10.00mil 35.00mil 8.00mil]
+	SymbolLine[10.00mil 45.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 20.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 20.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 20.00mil 20.00mil 8.00mil]
+)
+Symbol['@' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 40.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 40.00mil 50.00mil 8.00mil]
+	SymbolLine[50.00mil 35.00mil 50.00mil 10.00mil 8.00mil]
+	SymbolLine[50.00mil 10.00mil 40.00mil 0.0000 8.00mil]
+	SymbolLine[40.00mil 0.0000 10.00mil 0.0000 8.00mil]
+	SymbolLine[10.00mil 0.0000 0.0000 10.00mil 8.00mil]
+	SymbolLine[15.00mil 20.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 30.00mil 35.00mil 8.00mil]
+	SymbolLine[30.00mil 35.00mil 35.00mil 30.00mil 8.00mil]
+	SymbolLine[35.00mil 30.00mil 40.00mil 35.00mil 8.00mil]
+	SymbolLine[35.00mil 30.00mil 35.00mil 15.00mil 8.00mil]
+	SymbolLine[35.00mil 20.00mil 30.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 30.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 15.00mil 20.00mil 8.00mil]
+	SymbolLine[40.00mil 35.00mil 50.00mil 35.00mil 8.00mil]
+)
+Symbol['A' 12.00mil]
+(
+	SymbolLine[0.0000 20.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 20.00mil 7.00mil 10.00mil 8.00mil]
+	SymbolLine[7.00mil 10.00mil 18.00mil 10.00mil 8.00mil]
+	SymbolLine[18.00mil 10.00mil 25.00mil 20.00mil 8.00mil]
+	SymbolLine[25.00mil 20.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 25.00mil 30.00mil 8.00mil]
+)
+Symbol['B' 12.00mil]
+(
+	SymbolLine[0.0000 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[25.00mil 33.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 28.00mil 25.00mil 33.00mil 8.00mil]
+	SymbolLine[5.00mil 28.00mil 20.00mil 28.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[25.00mil 15.00mil 25.00mil 23.00mil 8.00mil]
+	SymbolLine[20.00mil 28.00mil 25.00mil 23.00mil 8.00mil]
+)
+Symbol['C' 12.00mil]
+(
+	SymbolLine[7.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 43.00mil 7.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 17.00mil 0.0000 43.00mil 8.00mil]
+	SymbolLine[0.0000 17.00mil 7.00mil 10.00mil 8.00mil]
+	SymbolLine[7.00mil 10.00mil 20.00mil 10.00mil 8.00mil]
+)
+Symbol['D' 12.00mil]
+(
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[18.00mil 10.00mil 25.00mil 17.00mil 8.00mil]
+	SymbolLine[25.00mil 17.00mil 25.00mil 43.00mil 8.00mil]
+	SymbolLine[18.00mil 50.00mil 25.00mil 43.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 18.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 18.00mil 10.00mil 8.00mil]
+)
+Symbol['E' 12.00mil]
+(
+	SymbolLine[0.0000 28.00mil 15.00mil 28.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+)
+Symbol['F' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 28.00mil 15.00mil 28.00mil 8.00mil]
+)
+Symbol['G' 12.00mil]
+(
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[25.00mil 35.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 35.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+)
+Symbol['H' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[25.00mil 10.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 25.00mil 30.00mil 8.00mil]
+)
+Symbol['I' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 10.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['J' 12.00mil]
+(
+	SymbolLine[7.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 15.00mil 45.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 15.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 0.0000 40.00mil 8.00mil]
+)
+Symbol['K' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['L' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['M' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 30.00mil 10.00mil 8.00mil]
+	SymbolLine[30.00mil 10.00mil 30.00mil 50.00mil 8.00mil]
+)
+Symbol['N' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[25.00mil 10.00mil 25.00mil 50.00mil 8.00mil]
+)
+Symbol['O' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['P' 12.00mil]
+(
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[25.00mil 15.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+)
+Symbol['Q' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[15.00mil 10.00mil 20.00mil 15.00mil 8.00mil]
+	SymbolLine[20.00mil 15.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[10.00mil 35.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['R' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[25.00mil 15.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 25.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[13.00mil 30.00mil 25.00mil 50.00mil 8.00mil]
+)
+Symbol['S' 12.00mil]
+(
+	SymbolLine[20.00mil 10.00mil 25.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 15.00mil 0.0000 25.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 35.00mil 8.00mil]
+	SymbolLine[25.00mil 35.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['T' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['U' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 10.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['V' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 20.00mil 10.00mil 8.00mil]
+)
+Symbol['W' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 30.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[25.00mil 50.00mil 30.00mil 30.00mil 8.00mil]
+	SymbolLine[30.00mil 30.00mil 30.00mil 10.00mil 8.00mil]
+)
+Symbol['X' 12.00mil]
+(
+	SymbolLine[0.0000 50.00mil 25.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 25.00mil 50.00mil 8.00mil]
+)
+Symbol['Y' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 20.00mil 10.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['Z' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 25.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 25.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 25.00mil 50.00mil 8.00mil]
+)
+Symbol['[' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['\' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 30.00mil 45.00mil 8.00mil]
+)
+Symbol[']' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['^' 12.00mil]
+(
+	SymbolLine[0.0000 15.00mil 5.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 10.00mil 10.00mil 15.00mil 8.00mil]
+)
+Symbol['_' 12.00mil]
+(
+	SymbolLine[0.0000 50.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['a' 12.00mil]
+(
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 45.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['b' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+)
+Symbol['c' 12.00mil]
+(
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['d' 12.00mil]
+(
+	SymbolLine[20.00mil 10.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+)
+Symbol['e' 12.00mil]
+(
+	SymbolLine[5.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[0.0000 40.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[20.00mil 40.00mil 20.00mil 35.00mil 8.00mil]
+)
+Symbol['f' 10.00mil]
+(
+	SymbolLine[5.00mil 15.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 15.00mil 10.00mil 10.00mil 8.00mil]
+	SymbolLine[10.00mil 10.00mil 15.00mil 10.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 10.00mil 30.00mil 8.00mil]
+)
+Symbol['g' 12.00mil]
+(
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[0.0000 60.00mil 5.00mil 65.00mil 8.00mil]
+	SymbolLine[5.00mil 65.00mil 15.00mil 65.00mil 8.00mil]
+	SymbolLine[15.00mil 65.00mil 20.00mil 60.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 20.00mil 60.00mil 8.00mil]
+)
+Symbol['h' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['i' 10.00mil]
+(
+	SymbolLine[0.0000 20.00mil 0.0000 21.00mil 10.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 50.00mil 8.00mil]
+)
+Symbol['j' 10.00mil]
+(
+	SymbolLine[5.00mil 20.00mil 5.00mil 21.00mil 10.00mil]
+	SymbolLine[5.00mil 35.00mil 5.00mil 60.00mil 8.00mil]
+	SymbolLine[0.0000 65.00mil 5.00mil 60.00mil 8.00mil]
+)
+Symbol['k' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 10.00mil 25.00mil 8.00mil]
+)
+Symbol['l' 10.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['m' 12.00mil]
+(
+	SymbolLine[5.00mil 35.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 25.00mil 30.00mil 8.00mil]
+	SymbolLine[25.00mil 30.00mil 30.00mil 30.00mil 8.00mil]
+	SymbolLine[30.00mil 30.00mil 35.00mil 35.00mil 8.00mil]
+	SymbolLine[35.00mil 35.00mil 35.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 35.00mil 8.00mil]
+)
+Symbol['n' 12.00mil]
+(
+	SymbolLine[5.00mil 35.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 35.00mil 8.00mil]
+)
+Symbol['o' 12.00mil]
+(
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['p' 12.00mil]
+(
+	SymbolLine[5.00mil 35.00mil 5.00mil 65.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 35.00mil 8.00mil]
+	SymbolLine[25.00mil 35.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 45.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['q' 12.00mil]
+(
+	SymbolLine[20.00mil 35.00mil 20.00mil 65.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 15.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['r' 12.00mil]
+(
+	SymbolLine[5.00mil 35.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 35.00mil 8.00mil]
+)
+Symbol['s' 12.00mil]
+(
+	SymbolLine[5.00mil 50.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 40.00mil 25.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 40.00mil 20.00mil 40.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 40.00mil 8.00mil]
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 25.00mil 35.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+)
+Symbol['t' 10.00mil]
+(
+	SymbolLine[5.00mil 10.00mil 5.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 45.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 25.00mil 10.00mil 25.00mil 8.00mil]
+)
+Symbol['u' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['v' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['w' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 10.00mil 50.00mil 8.00mil]
+	SymbolLine[10.00mil 50.00mil 15.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 30.00mil 15.00mil 45.00mil 8.00mil]
+	SymbolLine[15.00mil 45.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 50.00mil 25.00mil 50.00mil 8.00mil]
+	SymbolLine[25.00mil 50.00mil 30.00mil 45.00mil 8.00mil]
+	SymbolLine[30.00mil 30.00mil 30.00mil 45.00mil 8.00mil]
+)
+Symbol['x' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 20.00mil 50.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 20.00mil 30.00mil 8.00mil]
+)
+Symbol['y' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 0.0000 45.00mil 8.00mil]
+	SymbolLine[0.0000 45.00mil 5.00mil 50.00mil 8.00mil]
+	SymbolLine[20.00mil 30.00mil 20.00mil 60.00mil 8.00mil]
+	SymbolLine[15.00mil 65.00mil 20.00mil 60.00mil 8.00mil]
+	SymbolLine[5.00mil 65.00mil 15.00mil 65.00mil 8.00mil]
+	SymbolLine[0.0000 60.00mil 5.00mil 65.00mil 8.00mil]
+	SymbolLine[5.00mil 50.00mil 15.00mil 50.00mil 8.00mil]
+	SymbolLine[15.00mil 50.00mil 20.00mil 45.00mil 8.00mil]
+)
+Symbol['z' 12.00mil]
+(
+	SymbolLine[0.0000 30.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 20.00mil 30.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 20.00mil 50.00mil 8.00mil]
+)
+Symbol['{' 12.00mil]
+(
+	SymbolLine[5.00mil 15.00mil 10.00mil 10.00mil 8.00mil]
+	SymbolLine[5.00mil 15.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[0.0000 30.00mil 5.00mil 35.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 5.00mil 45.00mil 8.00mil]
+	SymbolLine[5.00mil 45.00mil 10.00mil 50.00mil 8.00mil]
+)
+Symbol['|' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 0.0000 50.00mil 8.00mil]
+)
+Symbol['}' 12.00mil]
+(
+	SymbolLine[0.0000 10.00mil 5.00mil 15.00mil 8.00mil]
+	SymbolLine[5.00mil 15.00mil 5.00mil 25.00mil 8.00mil]
+	SymbolLine[5.00mil 25.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 35.00mil 5.00mil 45.00mil 8.00mil]
+	SymbolLine[0.0000 50.00mil 5.00mil 45.00mil 8.00mil]
+)
+Symbol['~' 12.00mil]
+(
+	SymbolLine[0.0000 35.00mil 5.00mil 30.00mil 8.00mil]
+	SymbolLine[5.00mil 30.00mil 10.00mil 30.00mil 8.00mil]
+	SymbolLine[10.00mil 30.00mil 15.00mil 35.00mil 8.00mil]
+	SymbolLine[15.00mil 35.00mil 20.00mil 35.00mil 8.00mil]
+	SymbolLine[20.00mil 35.00mil 25.00mil 30.00mil 8.00mil]
+)
+Attribute("import::src0" "/home/doug/Buildbotics/Controller Hardware Design/machine-controller/Combined/combined.sch")
+Attribute("PCB::grid::unit" "mil")
+
+Element["" "IRM-10-5.fp" "PS1/U100" "unknown" 4.8873mm 28.3232mm 700.00mil -500.00mil 0 100 ""]
+(
+	Attribute("device" "IRM-10-5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 100.00mil 100.00mil 140.00mil 50.00mil "AC/L" "1" "square,edge2"]
+	Pin[0.0000 -423.00mil 100.00mil 100.00mil 140.00mil 50.00mil "AC/N" "2" "square,edge2"]
+	Pin[1516.00mil -315.00mil 100.00mil 100.00mil 140.00mil 50.00mil "Vcc" "3" "square,edge2"]
+	Pin[1516.00mil 0.0000 100.00mil 100.00mil 140.00mil 50.00mil "Gnd" "4" "square,edge2"]
+	ElementLine [-100.00mil 150.00mil 1660.00mil 150.00mil 10.00mil]
+	ElementLine [1660.00mil 150.00mil 1660.00mil -1030.00mil 10.00mil]
+	ElementLine [1660.00mil -1030.00mil -150.00mil -1030.00mil 10.00mil]
+	ElementLine [-150.00mil -1030.00mil -150.00mil 100.00mil 10.00mil]
+	ElementLine [-150.00mil 100.00mil -100.00mil 150.00mil 10.00mil]
+
+	)
+
+Element["" "Molex_39-30-3036.fp" "PS1/J1" "unknown" 14.1339mm 47.3656mm -100.00mil 0.0000 3 100 ""]
+(
+	Attribute("device" "CONNECTOR_3")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 165.00mil 100.00mil 60.00mil 120.00mil 80.00mil "1" "1" "square,edge2"]
+	Pin[0.0000 0.0000 100.00mil 60.00mil 120.00mil 80.00mil "2" "2" "square,edge2"]
+	Pin[0.0000 -165.00mil 100.00mil 60.00mil 120.00mil 80.00mil "3" "3" "square,edge2"]
+	Pin[-287.00mil -165.00mil 125.00mil 0.0000 150.00mil 125.00mil "1" "1" "hole,edge2"]
+	Pin[-287.00mil 165.00mil 125.00mil 0.0000 150.00mil 125.00mil "1" "1" "hole,edge2"]
+	ElementLine [50.00mil -220.00mil 50.00mil 220.00mil 10.00mil]
+	ElementLine [-550.00mil 220.00mil 50.00mil 220.00mil 10.00mil]
+	ElementLine [-550.00mil -220.00mil -550.00mil 220.00mil 10.00mil]
+	ElementLine [-550.00mil -220.00mil 50.00mil -220.00mil 10.00mil]
+	ElementLine [-550.00mil 150.00mil -400.00mil 150.00mil 10.00mil]
+	ElementLine [-400.00mil 150.00mil -400.00mil 180.00mil 10.00mil]
+	ElementLine [-550.00mil 180.00mil -400.00mil 180.00mil 10.00mil]
+
+	)
+
+Element["" "IRM-10-5.fp" "PS1/U101" "unknown" 219.55mil 85.3911mm 700.00mil -500.00mil 0 100 ""]
+(
+	Attribute("device" "IRM-10-5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 100.00mil 100.00mil 140.00mil 50.00mil "AC/L" "1" "square,edge2"]
+	Pin[0.0000 -423.00mil 100.00mil 100.00mil 140.00mil 50.00mil "AC/N" "2" "square,edge2"]
+	Pin[1516.00mil -315.00mil 100.00mil 100.00mil 140.00mil 50.00mil "Vcc" "3" "square,edge2"]
+	Pin[1516.00mil 0.0000 100.00mil 100.00mil 140.00mil 50.00mil "Gnd" "4" "square,edge2"]
+	ElementLine [-100.00mil 150.00mil 1660.00mil 150.00mil 10.00mil]
+	ElementLine [1660.00mil 150.00mil 1660.00mil -1030.00mil 10.00mil]
+	ElementLine [1660.00mil -1030.00mil -150.00mil -1030.00mil 10.00mil]
+	ElementLine [-150.00mil -1030.00mil -150.00mil 100.00mil 10.00mil]
+	ElementLine [-150.00mil 100.00mil -100.00mil 150.00mil 10.00mil]
+
+	)
+
+Element["" "NICHICON_WT_CAP_8_10.fp" "PS1/C1" "220uF" 31.7557mm 105.7791mm 0.0000 0.0000 0 100 ""]
+(
+	Attribute("device" "POLARIZED_CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -161.41mil 0.0000 -82.67mil 63.30mil 10.00mil 73.30mil "+" "1" "square"]
+	Pad[0.0000 82.67mil 0.0000 161.41mil 63.30mil 10.00mil 73.30mil "-" "2" "square,edge2"]
+	ElementLine [180.32mil 180.32mil 44.65mil 180.32mil 10.00mil]
+	ElementLine [180.32mil 180.32mil 180.32mil -150.32mil 10.00mil]
+	ElementLine [180.32mil -150.32mil 150.32mil -180.32mil 10.00mil]
+	ElementLine [150.32mil -180.32mil 44.65mil -180.32mil 10.00mil]
+	ElementLine [-180.32mil 180.32mil -44.65mil 180.32mil 10.00mil]
+	ElementLine [-180.32mil 180.32mil -180.32mil -150.32mil 10.00mil]
+	ElementLine [-180.32mil -150.32mil -150.32mil -180.32mil 10.00mil]
+	ElementLine [-150.32mil -180.32mil -44.65mil -180.32mil 10.00mil]
+
+	)
+
+Element["" "Molex_39-29-1027.fp" "PS1/J2" "unknown" 19.6213mm 4196.30mil -382.00mil 0.0000 3 100 ""]
+(
+	Attribute("device" "PWRJACK")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 180.00mil 60.00mil 220.00mil 80.00mil "1" "1" "square,edge2"]
+	Pin[-217.00mil 0.0000 180.00mil 60.00mil 220.00mil 80.00mil "2" "2" "square,edge2"]
+	Pin[-382.00mil -177.00mil 130.00mil 0.0000 150.00mil 130.00mil "1" "1" "hole,edge2"]
+	Pin[-382.00mil 177.00mil 130.00mil 0.0000 150.00mil 130.00mil "1" "1" "hole,edge2"]
+	ElementLine [-260.00mil -303.00mil -260.00mil 303.00mil 10.00mil]
+	ElementLine [-504.00mil 303.00mil -260.00mil 303.00mil 10.00mil]
+	ElementLine [-504.00mil 106.00mil -504.00mil 303.00mil 10.00mil]
+	ElementLine [-764.00mil 106.00mil -504.00mil 106.00mil 10.00mil]
+	ElementLine [-764.00mil -106.00mil -764.00mil 106.00mil 10.00mil]
+	ElementLine [-764.00mil -106.00mil -504.00mil -106.00mil 10.00mil]
+	ElementLine [-504.00mil -303.00mil -504.00mil -106.00mil 10.00mil]
+	ElementLine [-504.00mil -303.00mil -260.00mil -303.00mil 10.00mil]
+	ElementArc [0.0000 -120.00mil 20.00mil 20.00mil 270 360 20.00mil]
+
+	)
+
+Element["" "NICHICON_WT_CAP_4_5p4.fp" "PS1/C5" "10uF" 56.4451mm 81.4063mm 0.0000 0.0000 0 100 ""]
+(
+	Attribute("device" "POLARIZED_CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -82.68mil 0.0000 -35.43mil 51.49mil 10.00mil 61.49mil "+" "1" "square"]
+	Pad[0.0000 35.43mil 0.0000 82.68mil 51.49mil 10.00mil 61.49mil "-" "2" "square,edge2"]
+	ElementLine [101.58mil 101.58mil 38.74mil 101.58mil 10.00mil]
+	ElementLine [101.58mil 101.58mil 101.58mil -71.58mil 10.00mil]
+	ElementLine [101.58mil -71.58mil 71.58mil -101.58mil 10.00mil]
+	ElementLine [71.58mil -101.58mil 38.74mil -101.58mil 10.00mil]
+	ElementLine [-101.58mil 101.58mil -38.74mil 101.58mil 10.00mil]
+	ElementLine [-101.58mil 101.58mil -101.58mil -71.58mil 10.00mil]
+	ElementLine [-101.58mil -71.58mil -71.58mil -101.58mil 10.00mil]
+	ElementLine [-71.58mil -101.58mil -38.74mil -101.58mil 10.00mil]
+
+	)
+
+Element["" "NICHICON_WT_CAP_4_5p4.fp" "PS1/C4" "10uF" 54.2726mm 29.7439mm 0.0000 0.0000 0 100 ""]
+(
+	Attribute("device" "POLARIZED_CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -82.68mil 0.0000 -35.43mil 51.49mil 10.00mil 61.49mil "+" "1" "square"]
+	Pad[0.0000 35.43mil 0.0000 82.68mil 51.49mil 10.00mil 61.49mil "-" "2" "square,edge2"]
+	ElementLine [101.58mil 101.58mil 38.74mil 101.58mil 10.00mil]
+	ElementLine [101.58mil 101.58mil 101.58mil -71.58mil 10.00mil]
+	ElementLine [101.58mil -71.58mil 71.58mil -101.58mil 10.00mil]
+	ElementLine [71.58mil -101.58mil 38.74mil -101.58mil 10.00mil]
+	ElementLine [-101.58mil 101.58mil -38.74mil 101.58mil 10.00mil]
+	ElementLine [-101.58mil 101.58mil -101.58mil -71.58mil 10.00mil]
+	ElementLine [-101.58mil -71.58mil -71.58mil -101.58mil 10.00mil]
+	ElementLine [-71.58mil -101.58mil -38.74mil -101.58mil 10.00mil]
+
+	)
+
+Element["" "RESC3225M.fp" "PS1/R2" "0?" 41.3261mm 1520.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-62.99mil -25.59mil -62.99mil 25.59mil 59.05mil 20.00mil 65.05mil "1" "1" "square"]
+	Pad[62.99mil -25.59mil 62.99mil 25.59mil 59.05mil 20.00mil 65.05mil "2" "2" "square"]
+	ElementLine [-19.68mil -55.11mil 19.68mil -55.11mil 8.00mil]
+	ElementLine [-19.68mil 55.11mil 19.68mil 55.11mil 8.00mil]
+
+	)
+
+Element["" "RESC3225M.fp" "PS1/R1" "0?" 41.5801mm 1360.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-62.99mil -25.59mil -62.99mil 25.59mil 59.05mil 20.00mil 65.05mil "1" "1" "square"]
+	Pad[62.99mil -25.59mil 62.99mil 25.59mil 59.05mil 20.00mil 65.05mil "2" "2" "square"]
+	ElementLine [-19.68mil -55.11mil 19.68mil -55.11mil 8.00mil]
+	ElementLine [-19.68mil 55.11mil 19.68mil 55.11mil 8.00mil]
+
+	)
+
+Element["" "HEADER6_1" "MP1/ISP" "unknown" 4500.00mil 1400.00mil 210.00mil -50.00mil 3 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 60.00mil 30.00mil 66.00mil 38.00mil "1" "1" "square"]
+	Pin[0.0000 100.00mil 60.00mil 30.00mil 66.00mil 38.00mil "2" "2" ""]
+	Pin[0.0000 200.00mil 60.00mil 30.00mil 66.00mil 38.00mil "3" "3" ""]
+	Pin[100.00mil 200.00mil 60.00mil 30.00mil 66.00mil 38.00mil "4" "4" ""]
+	Pin[100.00mil 100.00mil 60.00mil 30.00mil 66.00mil 38.00mil "5" "5" ""]
+	Pin[100.00mil 0.0000 60.00mil 30.00mil 66.00mil 38.00mil "6" "6" ""]
+	ElementLine [-50.00mil -50.00mil -50.00mil 250.00mil 10.00mil]
+	ElementLine [-50.00mil 250.00mil 150.00mil 250.00mil 10.00mil]
+	ElementLine [150.00mil 250.00mil 150.00mil -50.00mil 10.00mil]
+	ElementLine [150.00mil -50.00mil -50.00mil -50.00mil 10.00mil]
+	ElementLine [-50.00mil 50.00mil 50.00mil 50.00mil 10.00mil]
+	ElementLine [50.00mil 50.00mil 50.00mil -50.00mil 10.00mil]
+
+	)
+
+Element["" "TQFP64_14" "MP1/U1" "ATXmegaA3" 98.3582mm 27.8618mm -20.00mil -60.00mil 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-347.72mil -236.22mil -303.46mil -236.22mil 15.74mil 30.00mil 18.74mil "PA3" "1" "square"]
+	Pad[-347.72mil -204.73mil -303.46mil -204.73mil 15.74mil 30.00mil 18.74mil "PA4" "2" "square"]
+	Pad[-347.72mil -173.23mil -303.46mil -173.23mil 15.74mil 30.00mil 18.74mil "PA5" "3" "square"]
+	Pad[-347.72mil -3.6002mm -303.46mil -3.6002mm 15.74mil 30.00mil 18.74mil "PA6" "4" "square"]
+	Pad[-347.72mil -2.8001mm -303.46mil -2.8001mm 15.74mil 30.00mil 18.74mil "PA7" "5" "square"]
+	Pad[-347.72mil -2.0000mm -303.46mil -2.0000mm 15.74mil 30.00mil 18.74mil "PB0" "6" "square"]
+	Pad[-347.72mil -47.25mil -303.46mil -47.25mil 15.74mil 30.00mil 18.74mil "PB1" "7" "square"]
+	Pad[-347.72mil -15.75mil -303.46mil -15.75mil 15.74mil 30.00mil 18.74mil "PB2" "8" "square"]
+	Pad[-347.72mil 15.74mil -303.46mil 15.74mil 15.74mil 30.00mil 18.74mil "PB3" "9" "square"]
+	Pad[-347.72mil 47.24mil -303.46mil 47.24mil 15.74mil 30.00mil 18.74mil "PB4" "10" "square"]
+	Pad[-347.72mil 2.0000mm -303.46mil 2.0000mm 15.74mil 30.00mil 18.74mil "PB5" "11" "square"]
+	Pad[-347.72mil 110.23mil -303.46mil 110.23mil 15.74mil 30.00mil 18.74mil "PB6" "12" "square"]
+	Pad[-347.72mil 141.73mil -303.46mil 141.73mil 15.74mil 30.00mil 18.74mil "PB7" "13" "square"]
+	Pad[-347.72mil 173.22mil -303.46mil 173.22mil 15.74mil 30.00mil 18.74mil "GND" "14" "square"]
+	Pad[-347.72mil 204.72mil -303.46mil 204.72mil 15.74mil 30.00mil 18.74mil "VCC" "15" "square"]
+	Pad[-347.72mil 236.22mil -303.46mil 236.22mil 15.74mil 30.00mil 18.74mil "PC0" "16" "square"]
+	Pad[-236.22mil 303.46mil -236.22mil 347.72mil 15.74mil 30.00mil 18.74mil "PC1" "17" "square,octagon,edge2"]
+	Pad[-204.73mil 303.46mil -204.73mil 347.72mil 15.74mil 30.00mil 18.74mil "PC2" "18" "square,octagon,edge2"]
+	Pad[-173.23mil 303.46mil -173.23mil 347.72mil 15.74mil 30.00mil 18.74mil "PC3" "19" "square,octagon,edge2"]
+	Pad[-3.6002mm 303.46mil -3.6002mm 347.72mil 15.74mil 30.00mil 18.74mil "PC4" "20" "square,octagon,edge2"]
+	Pad[-2.8001mm 303.46mil -2.8001mm 347.72mil 15.74mil 30.00mil 18.74mil "PC5" "21" "square,octagon,edge2"]
+	Pad[-2.0000mm 303.46mil -2.0000mm 347.72mil 15.74mil 30.00mil 18.74mil "PC6" "22" "square,octagon,edge2"]
+	Pad[-47.25mil 303.46mil -47.25mil 347.72mil 15.74mil 30.00mil 18.74mil "PC7" "23" "square,octagon,edge2"]
+	Pad[-15.75mil 303.46mil -15.75mil 347.72mil 15.74mil 30.00mil 18.74mil "GND" "24" "square,octagon,edge2"]
+	Pad[15.74mil 303.46mil 15.74mil 347.72mil 15.74mil 30.00mil 18.74mil "VCC" "25" "square,octagon,edge2"]
+	Pad[47.24mil 303.46mil 47.24mil 347.72mil 15.74mil 30.00mil 18.74mil "PD0" "26" "square,octagon,edge2"]
+	Pad[2.0000mm 303.46mil 2.0000mm 347.72mil 15.74mil 30.00mil 18.74mil "PD1" "27" "square,octagon,edge2"]
+	Pad[110.23mil 303.46mil 110.23mil 347.72mil 15.74mil 30.00mil 18.74mil "PD2" "28" "square,octagon,edge2"]
+	Pad[141.73mil 303.46mil 141.73mil 347.72mil 15.74mil 30.00mil 18.74mil "PD3" "29" "square,octagon,edge2"]
+	Pad[173.22mil 303.46mil 173.22mil 347.72mil 15.74mil 30.00mil 18.74mil "PD4" "30" "square,octagon,edge2"]
+	Pad[204.72mil 303.46mil 204.72mil 347.72mil 15.74mil 30.00mil 18.74mil "PD5" "31" "square,octagon,edge2"]
+	Pad[236.22mil 303.46mil 236.22mil 347.72mil 15.74mil 30.00mil 18.74mil "PD6" "32" "square,octagon,edge2"]
+	Pad[303.46mil 236.22mil 347.72mil 236.22mil 15.74mil 30.00mil 18.74mil "PD7" "33" "square,edge2"]
+	Pad[303.46mil 204.73mil 347.72mil 204.73mil 15.74mil 30.00mil 18.74mil "GND" "34" "square,edge2"]
+	Pad[303.46mil 173.23mil 347.72mil 173.23mil 15.74mil 30.00mil 18.74mil "VCC" "35" "square,edge2"]
+	Pad[303.46mil 3.6002mm 347.72mil 3.6002mm 15.74mil 30.00mil 18.74mil "PE0" "36" "square,edge2"]
+	Pad[303.46mil 2.8001mm 347.72mil 2.8001mm 15.74mil 30.00mil 18.74mil "PE1" "37" "square,edge2"]
+	Pad[303.46mil 2.0000mm 347.72mil 2.0000mm 15.74mil 30.00mil 18.74mil "PE2" "38" "square,edge2"]
+	Pad[303.46mil 47.25mil 347.72mil 47.25mil 15.74mil 30.00mil 18.74mil "PE3" "39" "square,edge2"]
+	Pad[303.46mil 15.75mil 347.72mil 15.75mil 15.74mil 30.00mil 18.74mil "PE4" "40" "square,edge2"]
+	Pad[303.46mil -15.74mil 347.72mil -15.74mil 15.74mil 30.00mil 18.74mil "PE5" "41" "square,edge2"]
+	Pad[303.46mil -47.24mil 347.72mil -47.24mil 15.74mil 30.00mil 18.74mil "PE6" "42" "square,edge2"]
+	Pad[303.46mil -2.0000mm 347.72mil -2.0000mm 15.74mil 30.00mil 18.74mil "PE7" "43" "square,edge2"]
+	Pad[303.46mil -110.23mil 347.72mil -110.23mil 15.74mil 30.00mil 18.74mil "GND" "44" "square,edge2"]
+	Pad[303.46mil -141.73mil 347.72mil -141.73mil 15.74mil 30.00mil 18.74mil "VCC" "45" "square,edge2"]
+	Pad[303.46mil -173.22mil 347.72mil -173.22mil 15.74mil 30.00mil 18.74mil "PF0" "46" "square,edge2"]
+	Pad[303.46mil -204.72mil 347.72mil -204.72mil 15.74mil 30.00mil 18.74mil "PF1" "47" "square,edge2"]
+	Pad[303.46mil -236.22mil 347.72mil -236.22mil 15.74mil 30.00mil 18.74mil "PF2" "48" "square,edge2"]
+	Pad[236.22mil -347.72mil 236.22mil -303.46mil 15.74mil 30.00mil 18.74mil "PF3" "49" "square,octagon"]
+	Pad[204.73mil -347.72mil 204.73mil -303.46mil 15.74mil 30.00mil 18.74mil "PF4" "50" "square,octagon"]
+	Pad[173.23mil -347.72mil 173.23mil -303.46mil 15.74mil 30.00mil 18.74mil "PF5" "51" "square,octagon"]
+	Pad[3.6002mm -347.72mil 3.6002mm -303.46mil 15.74mil 30.00mil 18.74mil "GND" "52" "square,octagon"]
+	Pad[2.8001mm -347.72mil 2.8001mm -303.46mil 15.74mil 30.00mil 18.74mil "VCC" "53" "square,octagon"]
+	Pad[2.0000mm -347.72mil 2.0000mm -303.46mil 15.74mil 30.00mil 18.74mil "PF6" "54" "square,octagon"]
+	Pad[47.25mil -347.72mil 47.25mil -303.46mil 15.74mil 30.00mil 18.74mil "PF7" "55" "square,octagon"]
+	Pad[15.75mil -347.72mil 15.75mil -303.46mil 15.74mil 30.00mil 18.74mil "PDI" "56" "square,octagon"]
+	Pad[-15.74mil -347.72mil -15.74mil -303.46mil 15.74mil 30.00mil 18.74mil "_RESET_" "57" "square,octagon"]
+	Pad[-47.24mil -347.72mil -47.24mil -303.46mil 15.74mil 30.00mil 18.74mil "PR0" "58" "square,octagon"]
+	Pad[-2.0000mm -347.72mil -2.0000mm -303.46mil 15.74mil 30.00mil 18.74mil "PR1" "59" "square,octagon"]
+	Pad[-110.23mil -347.72mil -110.23mil -303.46mil 15.74mil 30.00mil 18.74mil "GND" "60" "square,octagon"]
+	Pad[-141.73mil -347.72mil -141.73mil -303.46mil 15.74mil 30.00mil 18.74mil "AVCC" "61" "square,octagon"]
+	Pad[-173.22mil -347.72mil -173.22mil -303.46mil 15.74mil 30.00mil 18.74mil "PA0" "62" "square,octagon"]
+	Pad[-204.72mil -347.72mil -204.72mil -303.46mil 15.74mil 30.00mil 18.74mil "PA1" "63" "square,octagon"]
+	Pad[-236.22mil -347.72mil -236.22mil -303.46mil 15.74mil 30.00mil 18.74mil "PA2" "64" "square,octagon"]
+	ElementLine [-242.59mil -271.59mil 271.59mil -271.59mil 8.00mil]
+	ElementLine [271.59mil -271.59mil 271.59mil 271.59mil 8.00mil]
+	ElementLine [271.59mil 271.59mil -271.59mil 271.59mil 8.00mil]
+	ElementLine [-271.59mil 271.59mil -271.59mil -242.59mil 8.00mil]
+	ElementLine [-271.59mil -242.59mil -242.59mil -271.59mil 8.00mil]
+	ElementArc [-242.59mil -242.59mil 10.00mil 10.00mil 0 360 8.00mil]
+
+	)
+
+Element["" "0603" "MP1/C3" "22pF" 117.9305mm 25.9836mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "IO1/R1" "unknown" 122.0620mm 2110.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "IO1/R4" "unknown" 131.2964mm 56.8573mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "IO1/R2" "unknown" 132.6880mm 52.3648mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603" "MP1/C2" "22pF" 101.4580mm 1570.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "IO1/R3" "unknown" 121.7780mm 2260.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603" "MP1/C1" "0.1uF" 114.1580mm 2380.00mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "NICHICON_WT_CAP_8_10.fp" "PS1/C2" "220uF" 43.1626mm 105.4624mm 0.0000 0.0000 0 100 ""]
+(
+	Attribute("device" "POLARIZED_CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -161.41mil 0.0000 -82.67mil 63.30mil 10.00mil 73.30mil "+" "1" "square"]
+	Pad[0.0000 82.67mil 0.0000 161.41mil 63.30mil 10.00mil 73.30mil "-" "2" "square,edge2"]
+	ElementLine [180.32mil 180.32mil 44.65mil 180.32mil 10.00mil]
+	ElementLine [180.32mil 180.32mil 180.32mil -150.32mil 10.00mil]
+	ElementLine [180.32mil -150.32mil 150.32mil -180.32mil 10.00mil]
+	ElementLine [150.32mil -180.32mil 44.65mil -180.32mil 10.00mil]
+	ElementLine [-180.32mil 180.32mil -44.65mil 180.32mil 10.00mil]
+	ElementLine [-180.32mil 180.32mil -180.32mil -150.32mil 10.00mil]
+	ElementLine [-180.32mil -150.32mil -150.32mil -180.32mil 10.00mil]
+	ElementLine [-150.32mil -180.32mil -44.65mil -180.32mil 10.00mil]
+
+	)
+
+Element["" "Molex 39-03-0040.fp" "MD1/J1" "unknown" 137.3573mm 72.5790mm -350.00mil 100.00mil 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_4")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "1" "1" "square,edge2"]
+	Pin[0.0000 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "2" "2" "square,edge2"]
+	Pin[-217.00mil 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "3" "3" "square,edge2"]
+	Pin[-217.00mil 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "4" "4" "square,edge2"]
+	Pin[287.00mil 83.00mil 118.00mil 0.0000 150.00mil 118.00mil "1" "1" "hole,edge2"]
+	ElementLine [-300.00mil -107.00mil 510.00mil -107.00mil 10.00mil]
+	ElementLine [510.00mil -107.00mil 510.00mil 272.00mil 10.00mil]
+	ElementLine [510.00mil 272.00mil -300.00mil 272.00mil 10.00mil]
+	ElementLine [-300.00mil 272.00mil -300.00mil -107.00mil 10.00mil]
+
+	)
+
+Element["" "Molex 39-03-0040.fp" "MD2/J1" "unknown" 137.7337mm 93.3263mm -350.00mil 100.00mil 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_4")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "1" "1" "square,edge2"]
+	Pin[0.0000 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "2" "2" "square,edge2"]
+	Pin[-217.00mil 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "3" "3" "square,edge2"]
+	Pin[-217.00mil 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "4" "4" "square,edge2"]
+	Pin[287.00mil 83.00mil 118.00mil 0.0000 150.00mil 118.00mil "1" "1" "hole,edge2"]
+	ElementLine [-300.00mil -107.00mil 510.00mil -107.00mil 10.00mil]
+	ElementLine [510.00mil -107.00mil 510.00mil 272.00mil 10.00mil]
+	ElementLine [510.00mil 272.00mil -300.00mil 272.00mil 10.00mil]
+	ElementLine [-300.00mil 272.00mil -300.00mil -107.00mil 10.00mil]
+
+	)
+
+Element["" "LQFP44_10" "MD1/U3" "unknown" 117.6464mm 75.3223mm -20.00mil -60.00mil 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-238.98mil -157.48mil -209.72mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "1" "square"]
+	Pad[-238.98mil -125.99mil -209.72mil -125.99mil 15.74mil 30.00mil 18.74mil "OA1" "2" "square"]
+	Pad[-238.98mil -94.49mil -209.72mil -94.49mil 15.74mil 30.00mil 18.74mil "OA1" "3" "square"]
+	Pad[-238.98mil -63.00mil -209.72mil -63.00mil 15.74mil 30.00mil 18.74mil "VSA" "4" "square"]
+	Pad[-238.98mil -31.50mil -209.72mil -31.50mil 15.74mil 30.00mil 18.74mil "OA2" "5" "square"]
+	Pad[-238.98mil 0.0000 -209.72mil 0.0000 15.74mil 30.00mil 18.74mil "OA2" "6" "square"]
+	Pad[-238.98mil 31.49mil -209.72mil 31.49mil 15.74mil 30.00mil 18.74mil "OA1" "7" "square"]
+	Pad[-238.98mil 62.99mil -209.72mil 62.99mil 15.74mil 30.00mil 18.74mil "OA1" "8" "square"]
+	Pad[-238.98mil 94.48mil -209.72mil 94.48mil 15.74mil 30.00mil 18.74mil "BRA" "9" "square"]
+	Pad[-238.98mil 125.98mil -209.72mil 125.98mil 15.74mil 30.00mil 18.74mil "OA2" "10" "square"]
+	Pad[-238.98mil 157.48mil -209.72mil 157.48mil 15.74mil 30.00mil 18.74mil "OA2" "11" "square"]
+	Pad[-157.48mil 209.72mil -157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRA" "12" "square,octagon,edge2"]
+	Pad[-125.99mil 209.72mil -125.99mil 238.98mil 15.74mil 30.00mil 18.74mil "5VOUT" "13" "square,octagon,edge2"]
+	Pad[-94.49mil 209.72mil -94.49mil 238.98mil 15.74mil 30.00mil 18.74mil "SDO" "14" "square,octagon,edge2"]
+	Pad[-63.00mil 209.72mil -63.00mil 238.98mil 15.74mil 30.00mil 18.74mil "SDI" "15" "square,octagon,edge2"]
+	Pad[-31.50mil 209.72mil -31.50mil 238.98mil 15.74mil 30.00mil 18.74mil "SCK" "16" "square,octagon,edge2"]
+	Pad[0.0000 209.72mil 0.0000 238.98mil 15.74mil 30.00mil 18.74mil "GND" "17" "square,octagon,edge2"]
+	Pad[31.49mil 209.72mil 31.49mil 238.98mil 15.74mil 30.00mil 18.74mil "CSN" "18" "square,octagon,edge2"]
+	Pad[62.99mil 209.72mil 62.99mil 238.98mil 15.74mil 30.00mil 18.74mil "ENN" "19" "square,octagon,edge2"]
+	Pad[94.48mil 209.72mil 94.48mil 238.98mil 15.74mil 30.00mil 18.74mil "NC" "20" "square,octagon,edge2"]
+	Pad[125.98mil 209.72mil 125.98mil 238.98mil 15.74mil 30.00mil 18.74mil "CLK" "21" "square,octagon,edge2"]
+	Pad[157.48mil 209.72mil 157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRB" "22" "square,octagon,edge2"]
+	Pad[209.72mil 157.48mil 238.98mil 157.48mil 15.74mil 30.00mil 18.74mil "OB2" "23" "square,edge2"]
+	Pad[209.72mil 125.99mil 238.98mil 125.99mil 15.74mil 30.00mil 18.74mil "OB2" "24" "square,edge2"]
+	Pad[209.72mil 94.49mil 238.98mil 94.49mil 15.74mil 30.00mil 18.74mil "BRB" "25" "square,edge2"]
+	Pad[209.72mil 63.00mil 238.98mil 63.00mil 15.74mil 30.00mil 18.74mil "OB1" "26" "square,edge2"]
+	Pad[209.72mil 31.50mil 238.98mil 31.50mil 15.74mil 30.00mil 18.74mil "OB1" "27" "square,edge2"]
+	Pad[209.72mil 0.0000 238.98mil 0.0000 15.74mil 30.00mil 18.74mil "OB2" "28" "square,edge2"]
+	Pad[209.72mil -31.49mil 238.98mil -31.49mil 15.74mil 30.00mil 18.74mil "OB2" "29" "square,edge2"]
+	Pad[209.72mil -62.99mil 238.98mil -62.99mil 15.74mil 30.00mil 18.74mil "VSB" "30" "square,edge2"]
+	Pad[209.72mil -94.48mil 238.98mil -94.48mil 15.74mil 30.00mil 18.74mil "OB1" "31" "square,edge2"]
+	Pad[209.72mil -125.98mil 238.98mil -125.98mil 15.74mil 30.00mil 18.74mil "OB1" "32" "square,edge2"]
+	Pad[209.72mil -157.48mil 238.98mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "33" "square,edge2"]
+	Pad[157.48mil -238.98mil 157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "NC" "34" "square,octagon"]
+	Pad[125.99mil -238.98mil 125.99mil -209.72mil 15.74mil 30.00mil 18.74mil "VHS" "35" "square,octagon"]
+	Pad[94.49mil -238.98mil 94.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VS" "36" "square,octagon"]
+	Pad[63.00mil -238.98mil 63.00mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_ANA" "37" "square,octagon"]
+	Pad[31.50mil -238.98mil 31.50mil -209.72mil 15.74mil 30.00mil 18.74mil "SG_TST" "38" "square,octagon"]
+	Pad[0.0000 -238.98mil 0.0000 -209.72mil 15.74mil 30.00mil 18.74mil "GND" "39" "square,octagon"]
+	Pad[-31.49mil -238.98mil -31.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VCC_IO" "40" "square,octagon"]
+	Pad[-62.99mil -238.98mil -62.99mil -209.72mil 15.74mil 30.00mil 18.74mil "DIR" "41" "square,octagon"]
+	Pad[-94.48mil -238.98mil -94.48mil -209.72mil 15.74mil 30.00mil 18.74mil "STEP" "42" "square,octagon"]
+	Pad[-125.98mil -238.98mil -125.98mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_MODE" "43" "square,octagon"]
+	Pad[-157.48mil -238.98mil -157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "GND" "44" "square,octagon"]
+	ElementLine [-163.85mil -192.85mil 192.85mil -192.85mil 8.00mil]
+	ElementLine [192.85mil -192.85mil 192.85mil 192.85mil 8.00mil]
+	ElementLine [192.85mil 192.85mil -192.85mil 192.85mil 8.00mil]
+	ElementLine [-192.85mil 192.85mil -192.85mil -163.85mil 8.00mil]
+	ElementLine [-192.85mil -163.85mil -163.85mil -192.85mil 8.00mil]
+	ElementArc [-163.85mil -163.85mil 10.00mil 10.00mil 0 360 8.00mil]
+
+	)
+
+Element["" "LQFP44_10" "MD2/U3" "unknown" 117.5261mm 95.3935mm -20.00mil -60.00mil 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-238.98mil -157.48mil -209.72mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "1" "square"]
+	Pad[-238.98mil -125.99mil -209.72mil -125.99mil 15.74mil 30.00mil 18.74mil "OA1" "2" "square"]
+	Pad[-238.98mil -94.49mil -209.72mil -94.49mil 15.74mil 30.00mil 18.74mil "OA1" "3" "square"]
+	Pad[-238.98mil -63.00mil -209.72mil -63.00mil 15.74mil 30.00mil 18.74mil "VSA" "4" "square"]
+	Pad[-238.98mil -31.50mil -209.72mil -31.50mil 15.74mil 30.00mil 18.74mil "OA2" "5" "square"]
+	Pad[-238.98mil 0.0000 -209.72mil 0.0000 15.74mil 30.00mil 18.74mil "OA2" "6" "square"]
+	Pad[-238.98mil 31.49mil -209.72mil 31.49mil 15.74mil 30.00mil 18.74mil "OA1" "7" "square"]
+	Pad[-238.98mil 62.99mil -209.72mil 62.99mil 15.74mil 30.00mil 18.74mil "OA1" "8" "square"]
+	Pad[-238.98mil 94.48mil -209.72mil 94.48mil 15.74mil 30.00mil 18.74mil "BRA" "9" "square"]
+	Pad[-238.98mil 125.98mil -209.72mil 125.98mil 15.74mil 30.00mil 18.74mil "OA2" "10" "square"]
+	Pad[-238.98mil 157.48mil -209.72mil 157.48mil 15.74mil 30.00mil 18.74mil "OA2" "11" "square"]
+	Pad[-157.48mil 209.72mil -157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRA" "12" "square,octagon,edge2"]
+	Pad[-125.99mil 209.72mil -125.99mil 238.98mil 15.74mil 30.00mil 18.74mil "5VOUT" "13" "square,octagon,edge2"]
+	Pad[-94.49mil 209.72mil -94.49mil 238.98mil 15.74mil 30.00mil 18.74mil "SDO" "14" "square,octagon,edge2"]
+	Pad[-63.00mil 209.72mil -63.00mil 238.98mil 15.74mil 30.00mil 18.74mil "SDI" "15" "square,octagon,edge2"]
+	Pad[-31.50mil 209.72mil -31.50mil 238.98mil 15.74mil 30.00mil 18.74mil "SCK" "16" "square,octagon,edge2"]
+	Pad[0.0000 209.72mil 0.0000 238.98mil 15.74mil 30.00mil 18.74mil "GND" "17" "square,octagon,edge2"]
+	Pad[31.49mil 209.72mil 31.49mil 238.98mil 15.74mil 30.00mil 18.74mil "CSN" "18" "square,octagon,edge2"]
+	Pad[62.99mil 209.72mil 62.99mil 238.98mil 15.74mil 30.00mil 18.74mil "ENN" "19" "square,octagon,edge2"]
+	Pad[94.48mil 209.72mil 94.48mil 238.98mil 15.74mil 30.00mil 18.74mil "NC" "20" "square,octagon,edge2"]
+	Pad[125.98mil 209.72mil 125.98mil 238.98mil 15.74mil 30.00mil 18.74mil "CLK" "21" "square,octagon,edge2"]
+	Pad[157.48mil 209.72mil 157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRB" "22" "square,octagon,edge2"]
+	Pad[209.72mil 157.48mil 238.98mil 157.48mil 15.74mil 30.00mil 18.74mil "OB2" "23" "square,edge2"]
+	Pad[209.72mil 125.99mil 238.98mil 125.99mil 15.74mil 30.00mil 18.74mil "OB2" "24" "square,edge2"]
+	Pad[209.72mil 94.49mil 238.98mil 94.49mil 15.74mil 30.00mil 18.74mil "BRB" "25" "square,edge2"]
+	Pad[209.72mil 63.00mil 238.98mil 63.00mil 15.74mil 30.00mil 18.74mil "OB1" "26" "square,edge2"]
+	Pad[209.72mil 31.50mil 238.98mil 31.50mil 15.74mil 30.00mil 18.74mil "OB1" "27" "square,edge2"]
+	Pad[209.72mil 0.0000 238.98mil 0.0000 15.74mil 30.00mil 18.74mil "OB2" "28" "square,edge2"]
+	Pad[209.72mil -31.49mil 238.98mil -31.49mil 15.74mil 30.00mil 18.74mil "OB2" "29" "square,edge2"]
+	Pad[209.72mil -62.99mil 238.98mil -62.99mil 15.74mil 30.00mil 18.74mil "VSB" "30" "square,edge2"]
+	Pad[209.72mil -94.48mil 238.98mil -94.48mil 15.74mil 30.00mil 18.74mil "OB1" "31" "square,edge2"]
+	Pad[209.72mil -125.98mil 238.98mil -125.98mil 15.74mil 30.00mil 18.74mil "OB1" "32" "square,edge2"]
+	Pad[209.72mil -157.48mil 238.98mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "33" "square,edge2"]
+	Pad[157.48mil -238.98mil 157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "NC" "34" "square,octagon"]
+	Pad[125.99mil -238.98mil 125.99mil -209.72mil 15.74mil 30.00mil 18.74mil "VHS" "35" "square,octagon"]
+	Pad[94.49mil -238.98mil 94.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VS" "36" "square,octagon"]
+	Pad[63.00mil -238.98mil 63.00mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_ANA" "37" "square,octagon"]
+	Pad[31.50mil -238.98mil 31.50mil -209.72mil 15.74mil 30.00mil 18.74mil "SG_TST" "38" "square,octagon"]
+	Pad[0.0000 -238.98mil 0.0000 -209.72mil 15.74mil 30.00mil 18.74mil "GND" "39" "square,octagon"]
+	Pad[-31.49mil -238.98mil -31.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VCC_IO" "40" "square,octagon"]
+	Pad[-62.99mil -238.98mil -62.99mil -209.72mil 15.74mil 30.00mil 18.74mil "DIR" "41" "square,octagon"]
+	Pad[-94.48mil -238.98mil -94.48mil -209.72mil 15.74mil 30.00mil 18.74mil "STEP" "42" "square,octagon"]
+	Pad[-125.98mil -238.98mil -125.98mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_MODE" "43" "square,octagon"]
+	Pad[-157.48mil -238.98mil -157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "GND" "44" "square,octagon"]
+	ElementLine [-163.85mil -192.85mil 192.85mil -192.85mil 8.00mil]
+	ElementLine [192.85mil -192.85mil 192.85mil 192.85mil 8.00mil]
+	ElementLine [192.85mil 192.85mil -192.85mil 192.85mil 8.00mil]
+	ElementLine [-192.85mil 192.85mil -192.85mil -163.85mil 8.00mil]
+	ElementLine [-192.85mil -163.85mil -163.85mil -192.85mil 8.00mil]
+	ElementArc [-163.85mil -163.85mil 10.00mil 10.00mil 0 360 8.00mil]
+
+	)
+
+Element["" "CSR2010.fp" "MD2/R5" ".075" 101.8957mm 93.5816mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "0402.fp" "MD2/C15" "10nF" 93.3524mm 94.5210mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD2/R2" "22" 3815.70mil 89.1399mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD2/C7" "470nF" 97.3545mm 3399.90mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD1/R2" "22" 104.1328mm 72.5083mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "CSR2010.fp" "MD1/R4" ".075" 105.2745mm 76.7987mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "CSR2010.fp" "MD1/R5" ".075" 105.5140mm 69.4291mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "CSR2010.fp" "MD2/R4" ".075" 101.5293mm 98.7701mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "0402.fp" "MD1/C15" "10nF" 95.2028mm 69.9908mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD1/C16" "10nF" 95.5476mm 72.7183mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD1/R3" "22" 3516.80mil 70.0669mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD1/C7" "470nF" 88.7975mm 72.7052mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD2/R3" "22" 87.2003mm 92.5314mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD2/C16" "10nF" 87.0529mm 3823.50mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD2/C12" "100nF" 78.0001mm 92.2538mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD2/C11" "100nF" 81.0123mm 96.8493mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD1/C12" "100nF" 89.4174mm 75.6149mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD1/C11" "100nF" 90.3082mm 79.5350mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD1/C9" "100nF" 3365.70mil 76.5995mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD2/C9" "100nF" 84.5156mm 88.9367mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "Molex 39-03-0040.fp" "MD3/J1" "unknown" 139.3474mm 113.3002mm -350.00mil 100.00mil 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_4")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0.0000 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "1" "1" "square,edge2"]
+	Pin[0.0000 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "2" "2" "square,edge2"]
+	Pin[-217.00mil 0.0000 100.00mil 60.00mil 140.00mil 70.00mil "3" "3" "square,edge2"]
+	Pin[-217.00mil 165.00mil 100.00mil 60.00mil 140.00mil 70.00mil "4" "4" "square,edge2"]
+	Pin[287.00mil 83.00mil 118.00mil 0.0000 150.00mil 118.00mil "1" "1" "hole,edge2"]
+	ElementLine [-300.00mil -107.00mil 510.00mil -107.00mil 10.00mil]
+	ElementLine [510.00mil -107.00mil 510.00mil 272.00mil 10.00mil]
+	ElementLine [510.00mil 272.00mil -300.00mil 272.00mil 10.00mil]
+	ElementLine [-300.00mil 272.00mil -300.00mil -107.00mil 10.00mil]
+
+	)
+
+Element["" "LQFP44_10" "MD3/U3" "unknown" 118.5900mm 4581.80mil -20.00mil -60.00mil 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-238.98mil -157.48mil -209.72mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "1" "square"]
+	Pad[-238.98mil -125.99mil -209.72mil -125.99mil 15.74mil 30.00mil 18.74mil "OA1" "2" "square"]
+	Pad[-238.98mil -94.49mil -209.72mil -94.49mil 15.74mil 30.00mil 18.74mil "OA1" "3" "square"]
+	Pad[-238.98mil -63.00mil -209.72mil -63.00mil 15.74mil 30.00mil 18.74mil "VSA" "4" "square"]
+	Pad[-238.98mil -31.50mil -209.72mil -31.50mil 15.74mil 30.00mil 18.74mil "OA2" "5" "square"]
+	Pad[-238.98mil 0.0000 -209.72mil 0.0000 15.74mil 30.00mil 18.74mil "OA2" "6" "square"]
+	Pad[-238.98mil 31.49mil -209.72mil 31.49mil 15.74mil 30.00mil 18.74mil "OA1" "7" "square"]
+	Pad[-238.98mil 62.99mil -209.72mil 62.99mil 15.74mil 30.00mil 18.74mil "OA1" "8" "square"]
+	Pad[-238.98mil 94.48mil -209.72mil 94.48mil 15.74mil 30.00mil 18.74mil "BRA" "9" "square"]
+	Pad[-238.98mil 125.98mil -209.72mil 125.98mil 15.74mil 30.00mil 18.74mil "OA2" "10" "square"]
+	Pad[-238.98mil 157.48mil -209.72mil 157.48mil 15.74mil 30.00mil 18.74mil "OA2" "11" "square"]
+	Pad[-157.48mil 209.72mil -157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRA" "12" "square,octagon,edge2"]
+	Pad[-125.99mil 209.72mil -125.99mil 238.98mil 15.74mil 30.00mil 18.74mil "5VOUT" "13" "square,octagon,edge2"]
+	Pad[-94.49mil 209.72mil -94.49mil 238.98mil 15.74mil 30.00mil 18.74mil "SDO" "14" "square,octagon,edge2"]
+	Pad[-63.00mil 209.72mil -63.00mil 238.98mil 15.74mil 30.00mil 18.74mil "SDI" "15" "square,octagon,edge2"]
+	Pad[-31.50mil 209.72mil -31.50mil 238.98mil 15.74mil 30.00mil 18.74mil "SCK" "16" "square,octagon,edge2"]
+	Pad[0.0000 209.72mil 0.0000 238.98mil 15.74mil 30.00mil 18.74mil "GND" "17" "square,octagon,edge2"]
+	Pad[31.49mil 209.72mil 31.49mil 238.98mil 15.74mil 30.00mil 18.74mil "CSN" "18" "square,octagon,edge2"]
+	Pad[62.99mil 209.72mil 62.99mil 238.98mil 15.74mil 30.00mil 18.74mil "ENN" "19" "square,octagon,edge2"]
+	Pad[94.48mil 209.72mil 94.48mil 238.98mil 15.74mil 30.00mil 18.74mil "NC" "20" "square,octagon,edge2"]
+	Pad[125.98mil 209.72mil 125.98mil 238.98mil 15.74mil 30.00mil 18.74mil "CLK" "21" "square,octagon,edge2"]
+	Pad[157.48mil 209.72mil 157.48mil 238.98mil 15.74mil 30.00mil 18.74mil "SRB" "22" "square,octagon,edge2"]
+	Pad[209.72mil 157.48mil 238.98mil 157.48mil 15.74mil 30.00mil 18.74mil "OB2" "23" "square,edge2"]
+	Pad[209.72mil 125.99mil 238.98mil 125.99mil 15.74mil 30.00mil 18.74mil "OB2" "24" "square,edge2"]
+	Pad[209.72mil 94.49mil 238.98mil 94.49mil 15.74mil 30.00mil 18.74mil "BRB" "25" "square,edge2"]
+	Pad[209.72mil 63.00mil 238.98mil 63.00mil 15.74mil 30.00mil 18.74mil "OB1" "26" "square,edge2"]
+	Pad[209.72mil 31.50mil 238.98mil 31.50mil 15.74mil 30.00mil 18.74mil "OB1" "27" "square,edge2"]
+	Pad[209.72mil 0.0000 238.98mil 0.0000 15.74mil 30.00mil 18.74mil "OB2" "28" "square,edge2"]
+	Pad[209.72mil -31.49mil 238.98mil -31.49mil 15.74mil 30.00mil 18.74mil "OB2" "29" "square,edge2"]
+	Pad[209.72mil -62.99mil 238.98mil -62.99mil 15.74mil 30.00mil 18.74mil "VSB" "30" "square,edge2"]
+	Pad[209.72mil -94.48mil 238.98mil -94.48mil 15.74mil 30.00mil 18.74mil "OB1" "31" "square,edge2"]
+	Pad[209.72mil -125.98mil 238.98mil -125.98mil 15.74mil 30.00mil 18.74mil "OB1" "32" "square,edge2"]
+	Pad[209.72mil -157.48mil 238.98mil -157.48mil 15.74mil 30.00mil 18.74mil "NC" "33" "square,edge2"]
+	Pad[157.48mil -238.98mil 157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "NC" "34" "square,octagon"]
+	Pad[125.99mil -238.98mil 125.99mil -209.72mil 15.74mil 30.00mil 18.74mil "VHS" "35" "square,octagon"]
+	Pad[94.49mil -238.98mil 94.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VS" "36" "square,octagon"]
+	Pad[63.00mil -238.98mil 63.00mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_ANA" "37" "square,octagon"]
+	Pad[31.50mil -238.98mil 31.50mil -209.72mil 15.74mil 30.00mil 18.74mil "SG_TST" "38" "square,octagon"]
+	Pad[0.0000 -238.98mil 0.0000 -209.72mil 15.74mil 30.00mil 18.74mil "GND" "39" "square,octagon"]
+	Pad[-31.49mil -238.98mil -31.49mil -209.72mil 15.74mil 30.00mil 18.74mil "VCC_IO" "40" "square,octagon"]
+	Pad[-62.99mil -238.98mil -62.99mil -209.72mil 15.74mil 30.00mil 18.74mil "DIR" "41" "square,octagon"]
+	Pad[-94.48mil -238.98mil -94.48mil -209.72mil 15.74mil 30.00mil 18.74mil "STEP" "42" "square,octagon"]
+	Pad[-125.98mil -238.98mil -125.98mil -209.72mil 15.74mil 30.00mil 18.74mil "TST_MODE" "43" "square,octagon"]
+	Pad[-157.48mil -238.98mil -157.48mil -209.72mil 15.74mil 30.00mil 18.74mil "GND" "44" "square,octagon"]
+	ElementLine [-163.85mil -192.85mil 192.85mil -192.85mil 8.00mil]
+	ElementLine [192.85mil -192.85mil 192.85mil 192.85mil 8.00mil]
+	ElementLine [192.85mil 192.85mil -192.85mil 192.85mil 8.00mil]
+	ElementLine [-192.85mil 192.85mil -192.85mil -163.85mil 8.00mil]
+	ElementLine [-192.85mil -163.85mil -163.85mil -192.85mil 8.00mil]
+	ElementArc [-163.85mil -163.85mil 10.00mil 10.00mil 0 360 8.00mil]
+
+	)
+
+Element["" "0402.fp" "MD3/C7" "470nF" 106.7806mm 109.1956mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD3/R2" "22" 106.9787mm 110.5846mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD3/C11" "100nF" 119.6088mm 107.9763mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "MD3/R3" "22" 107.6193mm 113.7079mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD3/C12" "100nF" 106.6200mm 117.5253mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "CSR2010.fp" "MD3/R5" ".075" 100.5703mm 113.5198mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "0402.fp" "MD3/C16" "10nF" 106.4086mm 120.9859mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "CSR2010.fp" "MD3/R4" ".075" 100.3705mm 119.2362mm 0.0000 -40.00mil 0 100 ""]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-98.00mil -21.00mil -98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "1" "1" "square"]
+	Pad[98.00mil -21.00mil 98.00mil 21.00mil 55.00mil 40.00mil 65.00mil "2" "2" "square"]
+	ElementLine [160.00mil 69.00mil -160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil 69.00mil -160.00mil -69.00mil 10.00mil]
+	ElementLine [-160.00mil -69.00mil 160.00mil -69.00mil 10.00mil]
+	ElementLine [160.00mil -69.00mil 160.00mil 69.00mil 10.00mil]
+	ElementLine [-160.00mil -10.00mil -150.00mil 0.0000 10.00mil]
+	ElementLine [-150.00mil 0.0000 -160.00mil 10.00mil 10.00mil]
+
+	)
+
+Element["" "0402.fp" "MD3/C15" "10nF" 107.3098mm 122.9299mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "MD3/C9" "100nF" 109.0959mm 125.7372mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "SOT223" "PS1/U103" "unknown" 2570.00mil 2904.00mil 253.00mil -329.00mil 3 100 ""]
+(
+	Attribute("device" "UA78M33CDCYR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -33.00mil 0.0000 33.00mil 56.00mil 30.00mil 62.00mil "input" "1" "square,edge2"]
+	Pad[90.00mil -33.00mil 90.00mil 33.00mil 56.00mil 30.00mil 62.00mil "G" "2" "square,edge2"]
+	Pad[181.00mil -33.00mil 181.00mil 33.00mil 56.00mil 30.00mil 62.00mil "output" "3" "square,edge2"]
+	Pad[45.00mil -244.00mil 135.00mil -244.00mil 122.00mil 30.00mil 128.00mil "G" "4" "square"]
+	ElementLine [-52.00mil -329.00mil -52.00mil 85.00mil 10.00mil]
+	ElementLine [-52.00mil 85.00mil 233.00mil 85.00mil 10.00mil]
+	ElementLine [233.00mil 85.00mil 233.00mil -329.00mil 10.00mil]
+	ElementLine [233.00mil -329.00mil -52.00mil -329.00mil 10.00mil]
+
+	)
+
+Element["" "SOT223" "PS1/U102" "unknown" 69.3807mm 25.9914mm 253.00mil -329.00mil 3 100 ""]
+(
+	Attribute("device" "UA78M33CDCYR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[0.0000 -33.00mil 0.0000 33.00mil 56.00mil 30.00mil 62.00mil "input" "1" "square,edge2"]
+	Pad[90.00mil -33.00mil 90.00mil 33.00mil 56.00mil 30.00mil 62.00mil "G" "2" "square,edge2"]
+	Pad[181.00mil -33.00mil 181.00mil 33.00mil 56.00mil 30.00mil 62.00mil "output" "3" "square,edge2"]
+	Pad[45.00mil -244.00mil 135.00mil -244.00mil 122.00mil 30.00mil 128.00mil "G" "4" "square"]
+	ElementLine [-52.00mil -329.00mil -52.00mil 85.00mil 10.00mil]
+	ElementLine [-52.00mil 85.00mil 233.00mil 85.00mil 10.00mil]
+	ElementLine [233.00mil 85.00mil 233.00mil -329.00mil 10.00mil]
+	ElementLine [233.00mil -329.00mil -52.00mil -329.00mil 10.00mil]
+
+	)
+
+Element["" "0603.fp" "PS1/C103" "0.1uF" 76.6690mm 70.2116mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0603.fp" "PS1/C101" "0.1uF" 79.3782mm 34.2249mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-25.59mil -4.92mil -25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "1" "1" "square"]
+	Pad[25.59mil -4.92mil 25.59mil 4.92mil 29.52mil 20.00mil 35.52mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "PS1/C100" "0.33uF" 3083.50mil 1009.50mil -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "0402.fp" "PS1/C102" "0.33uF" 75.7299mm 67.1863mm -31.50mil -31.50mil 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
+	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
+
+	)
+
+Element["" "CB3_OSC.fp" "IO1/OSC1" "16MHz" 3740.00mil 2032.00mil 0.0000 0.0000 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-100.00mil 82.00mil -100.00mil 82.00mil 79.00mil 40.00mil 100.00mil "EOH" "1" "square"]
+	Pad[100.00mil 82.00mil 100.00mil 82.00mil 79.00mil 40.00mil 100.00mil "GND" "2" "square,edge2"]
+	Pad[100.00mil -82.00mil 100.00mil -82.00mil 79.00mil 40.00mil 100.00mil "OUTPUT" "3" "square,edge2"]
+	Pad[-100.00mil -82.00mil -100.00mil -82.00mil 79.00mil 40.00mil 100.00mil "Vin" "4" "square"]
+	ElementLine [-140.00mil 130.00mil 160.00mil 130.00mil 10.00mil]
+	ElementLine [160.00mil 130.00mil 160.00mil -130.00mil 10.00mil]
+	ElementLine [160.00mil -130.00mil -160.00mil -130.00mil 10.00mil]
+	ElementLine [-160.00mil -130.00mil -160.00mil 110.00mil 10.00mil]
+	ElementLine [-160.00mil 110.00mil -140.00mil 130.00mil 10.00mil]
+
+	)
+
+Element["" "QSOP16.fp" "IO1/U1" "unknown" 97.8801mm 56.1360mm 122.00mil 38.00mil 3 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15.00mil 0.0000 7.00mil 0.0000 16.00mil 30.00mil 22.00mil "VCCA" "1" ""]
+	Pad[-15.00mil 25.00mil 7.00mil 25.00mil 16.00mil 30.00mil 22.00mil "INA1" "2" "square"]
+	Pad[-15.00mil 50.00mil 7.00mil 50.00mil 16.00mil 30.00mil 22.00mil "INA2" "3" "square"]
+	Pad[-15.00mil 75.00mil 7.00mil 75.00mil 16.00mil 30.00mil 22.00mil "OUTA1" "4" "square"]
+	Pad[-15.00mil 100.00mil 7.00mil 100.00mil 16.00mil 30.00mil 22.00mil "OUTA2" "5" "square"]
+	Pad[-15.00mil 125.00mil 7.00mil 125.00mil 16.00mil 30.00mil 22.00mil "IOA1" "6" "square"]
+	Pad[-15.00mil 150.00mil 7.00mil 150.00mil 16.00mil 30.00mil 22.00mil "IOA2" "7" "square"]
+	Pad[-15.00mil 175.00mil 7.00mil 175.00mil 16.00mil 30.00mil 22.00mil "GNDA" "8" "square"]
+	Pad[197.00mil 176.00mil 219.00mil 176.00mil 16.00mil 30.00mil 22.00mil "GNDB" "9" "square,edge2"]
+	Pad[197.00mil 151.00mil 219.00mil 151.00mil 16.00mil 30.00mil 22.00mil "IOB2" "10" "square,edge2"]
+	Pad[197.00mil 126.00mil 219.00mil 126.00mil 16.00mil 30.00mil 22.00mil "IOB1" "11" "square,edge2"]
+	Pad[197.00mil 101.00mil 219.00mil 101.00mil 16.00mil 30.00mil 22.00mil "INB2" "12" "square,edge2"]
+	Pad[197.00mil 76.00mil 219.00mil 76.00mil 16.00mil 30.00mil 22.00mil "INB1" "13" "square,edge2"]
+	Pad[197.00mil 51.00mil 219.00mil 51.00mil 16.00mil 30.00mil 22.00mil "OUTB2" "14" "square,edge2"]
+	Pad[197.00mil 26.00mil 219.00mil 26.00mil 16.00mil 30.00mil 22.00mil "OUTB1" "15" "square,edge2"]
+	Pad[197.00mil 1.00mil 219.00mil 1.00mil 16.00mil 30.00mil 22.00mil "VCCB" "16" "square,edge2"]
+	ElementLine [-33.00mil -22.00mil 77.00mil -22.00mil 10.00mil]
+	ElementLine [127.00mil -22.00mil 237.00mil -22.00mil 10.00mil]
+	ElementLine [237.00mil -22.00mil 237.00mil 198.00mil 10.00mil]
+	ElementLine [237.00mil 198.00mil -33.00mil 198.00mil 10.00mil]
+	ElementLine [-33.00mil 198.00mil -33.00mil -22.00mil 10.00mil]
+	ElementArc [102.00mil -22.00mil 25.00mil 25.00mil 0 180 10.00mil]
+
+	)
+
+Element["" "ICS551.fp" "IO1/CD1" "unknown" 82.2361mm 48.2436mm 130.00mil 38.00mil 3 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[70.00mil -75.00mil 135.00mil -75.00mil 20.00mil 10.00mil 30.00mil "OE" "8" "square,edge2"]
+	Pad[70.00mil -25.00mil 135.00mil -25.00mil 20.00mil 10.00mil 30.00mil "VDD" "7" "square,edge2"]
+	Pad[70.00mil 25.00mil 135.00mil 25.00mil 20.00mil 10.00mil 30.00mil "GND" "6" "square,edge2"]
+	Pad[70.00mil 75.00mil 135.00mil 75.00mil 20.00mil 10.00mil 30.00mil "Q4" "5" "square,edge2"]
+	Pad[-135.00mil 75.00mil -70.00mil 75.00mil 20.00mil 10.00mil 30.00mil "Q3" "4" "square"]
+	Pad[-135.00mil 25.00mil -70.00mil 25.00mil 20.00mil 10.00mil 30.00mil "Q2" "3" "square"]
+	Pad[-135.00mil -25.00mil -70.00mil -25.00mil 20.00mil 10.00mil 30.00mil "Q1" "2" "square"]
+	Pad[-135.00mil -75.00mil -70.00mil -75.00mil 20.00mil 10.00mil 30.00mil "ICLK" "1" "square"]
+	ElementLine [-50.00mil -95.00mil -50.00mil 95.00mil 5.00mil]
+	ElementLine [-75.00mil -95.00mil 75.00mil -95.00mil 10.00mil]
+	ElementLine [75.00mil 95.00mil 75.00mil -95.00mil 10.00mil]
+	ElementLine [-75.00mil 95.00mil 75.00mil 95.00mil 10.00mil]
+	ElementLine [-75.00mil -95.00mil -75.00mil 95.00mil 10.00mil]
+
+	)
+Rat[4520.00mil 60.3270mm 0 4500.00mil 1500.00mil 5  ""]
+Rat[4500.00mil 1500.00mil 5 107.1903mm 32.2618mm 0  ""]
+Rat[107.1903mm 32.2618mm 0 107.1903mm 24.2619mm 0  ""]
+Rat[107.1903mm 24.2619mm 0 101.1583mm 19.0297mm 0  ""]
+Rat[101.1583mm 19.0297mm 0 94.7583mm 19.0297mm 0  ""]
+Rat[107.1903mm 32.2618mm 0 98.7580mm 36.6939mm 0  ""]
+Rat[98.7580mm 36.6939mm 0 89.5261mm 33.0617mm 0  ""]
+Rat[89.5261mm 33.0617mm 0 80.0282mm 34.0999mm 0  ""]
+Rat[80.0282mm 34.0999mm 0 73.9781mm 26.8296mm 0  ""]
+Rat[3640.00mil 1950.00mil 0 77.3190mm 70.0866mm 0  ""]
+Rat[77.3190mm 70.0866mm 0 2751.00mil 2937.00mil 0  ""]
+Rat[54.2726mm 27.6438mm 0 43.3937mm 20.3222mm 5  ""]
+Rat[54.2726mm 27.6438mm 0 69.3807mm 26.8296mm 0  ""]
+Rat[69.3807mm 26.8296mm 0 78.7207mm 25.5415mm 0  ""]
+Rat[3511.70mil 72.6054mm 0 84.8388mm 76.4745mm 0  ""]
+Rat[84.8388mm 76.4745mm 0 3301.80mil 88.8117mm 0  ""]
+Rat[84.8388mm 76.4745mm 0 76.1297mm 2641.20mil 0  ""]
+Rat[76.1297mm 2641.20mil 0 2570.00mil 2937.00mil 0  ""]
+Rat[2570.00mil 2937.00mil 0 56.4451mm 79.3062mm 0  ""]
+Rat[56.4451mm 79.3062mm 0 44.0830mm 77.3901mm 5  ""]
+Rat[3301.80mil 88.8117mm 0 97.7543mm 86.2576mm 0  ""]
+Rat[97.7543mm 86.2576mm 0 114.4463mm 81.3924mm 0  ""]
+Rat[114.4463mm 81.3924mm 0 116.7263mm 89.3234mm 0  ""]
+Rat[114.4463mm 81.3924mm 0 116.8466mm 69.2522mm 0  ""]
+Rat[116.7263mm 89.3234mm 0 114.3260mm 101.4636mm 0  ""]
+Rat[114.3260mm 101.4636mm 0 117.7902mm 110.3076mm 0  ""]
+Rat[114.3260mm 101.4636mm 0 107.1804mm 109.0958mm 0  ""]
+Rat[117.7902mm 110.3076mm 0 115.3899mm 122.4478mm 0  ""]
+Rat[115.3899mm 122.4478mm 0 108.4459mm 125.6122mm 0  ""]
+Rat[14.1339mm 43.1746mm 5 39.7262mm 37.9580mm 0  ""]
+Rat[39.7262mm 37.9580mm 0 39.9802mm 33.8940mm 0  ""]
+Rat[122.7120mm 53.4690mm 0 4820.00mil 57.2790mm 0  ""]
+Rat[4820.00mil 57.2790mm 0 113.5080mm 60.3270mm 0  ""]
+Rat[4820.00mil 57.2790mm 0 131.9464mm 56.7323mm 0  ""]
+Rat[131.9464mm 56.7323mm 0 133.3380mm 52.2398mm 0  ""]
+Rat[122.7120mm 53.4690mm 0 4600.00mil 1400.00mil 5  ""]
+Rat[4600.00mil 1400.00mil 5 117.2805mm 25.8586mm 0  ""]
+Rat[4600.00mil 1400.00mil 5 107.1903mm 33.0619mm 0  ""]
+Rat[107.1903mm 33.0619mm 0 107.1903mm 25.0620mm 0  ""]
+Rat[107.1903mm 25.0620mm 0 101.9584mm 19.0297mm 0  ""]
+Rat[101.9584mm 19.0297mm 0 95.5584mm 19.0297mm 0  ""]
+Rat[107.1903mm 33.0619mm 0 100.8080mm 39.7530mm 0  ""]
+Rat[100.8080mm 39.7530mm 0 97.9582mm 36.6939mm 0  ""]
+Rat[97.9582mm 36.6939mm 0 89.5261mm 32.2616mm 0  ""]
+Rat[89.5261mm 32.2616mm 0 78.7282mm 34.0999mm 0  ""]
+Rat[78.7282mm 34.0999mm 0 77.9211mm 25.5415mm 0  ""]
+Rat[77.9211mm 25.5415mm 0 71.6667mm 26.8296mm 0  ""]
+Rat[71.6667mm 26.8296mm 0 70.5237mm 19.7938mm 0  ""]
+Rat[71.6667mm 26.8296mm 0 54.2726mm 31.8440mm 0  ""]
+Rat[54.2726mm 31.8440mm 0 43.3937mm 28.3232mm 5  ""]
+Rat[43.3937mm 28.3232mm 5 1690.00mil 37.9580mm 0  ""]
+Rat[89.5261mm 25.8618mm 0 89.5261mm 26.6617mm 0  ""]
+Rat[89.5261mm 26.6617mm 0 89.5261mm 27.4617mm 0  ""]
+Rat[89.5261mm 27.4617mm 0 89.5261mm 28.2616mm 0  ""]
+Rat[89.5261mm 28.2616mm 0 89.5261mm 29.0617mm 0  ""]
+Rat[89.5261mm 29.0617mm 0 89.5261mm 29.8618mm 0  ""]
+Rat[89.5261mm 29.8618mm 0 89.5261mm 30.6616mm 0  ""]
+Rat[89.5261mm 30.6616mm 0 89.5261mm 31.4617mm 0  ""]
+Rat[78.8071mm 46.3386mm 0 132.0380mm 52.2398mm 0  ""]
+Rat[89.6582mm 79.4100mm 0 120.8465mm 69.2522mm 0  ""]
+Rat[104.5326mm 72.4085mm 0 107.7637mm 76.2653mm 0  ""]
+Rat[107.7637mm 76.2653mm 0 123.7165mm 77.7223mm 0  ""]
+Rat[95.6026mm 69.8910mm 0 103.7330mm 72.4085mm 0  ""]
+Rat[103.7330mm 72.4085mm 0 121.6464mm 81.3924mm 0  ""]
+Rat[131.8455mm 76.7700mm 5 123.7165mm 76.9225mm 0  ""]
+Rat[123.7165mm 76.9225mm 0 123.7165mm 76.1224mm 0  ""]
+Rat[123.7165mm 76.1224mm 0 123.7165mm 72.9225mm 0  ""]
+Rat[123.7165mm 72.9225mm 0 123.7165mm 72.1224mm 0  ""]
+Rat[123.7165mm 72.1224mm 0 123.7165mm 71.3223mm 0  ""]
+Rat[131.8455mm 72.5790mm 5 123.7165mm 74.5225mm 0  ""]
+Rat[123.7165mm 74.5225mm 0 123.7165mm 75.3223mm 0  ""]
+Rat[123.7165mm 75.3223mm 0 123.7165mm 78.5224mm 0  ""]
+Rat[123.7165mm 78.5224mm 0 123.7165mm 79.3223mm 0  ""]
+Rat[137.3573mm 72.5790mm 5 111.5763mm 72.9223mm 0  ""]
+Rat[111.5763mm 72.9223mm 0 111.5763mm 72.1222mm 0  ""]
+Rat[111.5763mm 72.1222mm 0 111.5763mm 71.3223mm 0  ""]
+Rat[111.5763mm 72.9223mm 0 111.5763mm 76.1221mm 0  ""]
+Rat[111.5763mm 76.1221mm 0 111.5763mm 76.9222mm 0  ""]
+Rat[137.3573mm 76.7700mm 5 111.5763mm 75.3223mm 0  ""]
+Rat[111.5763mm 75.3223mm 0 111.5763mm 74.5222mm 0  ""]
+Rat[111.5763mm 75.3223mm 0 111.5763mm 78.5222mm 0  ""]
+Rat[111.5763mm 78.5222mm 0 111.5763mm 79.3223mm 0  ""]
+Rat[89.7265mm 69.9671mm 0 108.0032mm 68.8957mm 0  ""]
+Rat[108.0032mm 68.8957mm 0 111.5763mm 77.7221mm 0  ""]
+Rat[95.1478mm 2859.00mil 0 88.9269mm 69.9671mm 0  ""]
+Rat[95.1478mm 2859.00mil 0 113.6464mm 81.3924mm 0  ""]
+Rat[80.3623mm 96.7243mm 0 4753.00mil 89.3234mm 0  ""]
+Rat[97.3186mm 89.0401mm 0 104.0185mm 98.2367mm 0  ""]
+Rat[104.0185mm 98.2367mm 0 123.5962mm 97.7935mm 0  ""]
+Rat[93.7522mm 94.4212mm 0 96.5190mm 89.0401mm 0  ""]
+Rat[96.5190mm 89.0401mm 0 121.5261mm 101.4636mm 0  ""]
+Rat[132.2219mm 97.5173mm 5 123.5962mm 96.9937mm 0  ""]
+Rat[123.5962mm 96.9937mm 0 123.5962mm 96.1936mm 0  ""]
+Rat[123.5962mm 96.1936mm 0 123.5962mm 92.9937mm 0  ""]
+Rat[123.5962mm 92.9937mm 0 123.5962mm 92.1936mm 0  ""]
+Rat[123.5962mm 92.1936mm 0 123.5962mm 91.3935mm 0  ""]
+Rat[132.2219mm 93.3263mm 5 123.5962mm 94.5937mm 0  ""]
+Rat[123.5962mm 94.5937mm 0 123.5962mm 95.3935mm 0  ""]
+Rat[123.5962mm 95.3935mm 0 123.5962mm 98.5936mm 0  ""]
+Rat[123.5962mm 98.5936mm 0 123.5962mm 99.3935mm 0  ""]
+Rat[137.7337mm 93.3263mm 5 111.4560mm 92.9935mm 0  ""]
+Rat[111.4560mm 92.9935mm 0 111.4560mm 92.1934mm 0  ""]
+Rat[111.4560mm 92.1934mm 0 111.4560mm 91.3935mm 0  ""]
+Rat[111.4560mm 92.9935mm 0 111.4560mm 96.1933mm 0  ""]
+Rat[111.4560mm 96.1933mm 0 111.4560mm 96.9934mm 0  ""]
+Rat[137.7337mm 97.5173mm 5 111.4560mm 98.5934mm 0  ""]
+Rat[111.4560mm 98.5934mm 0 111.4560mm 99.3935mm 0  ""]
+Rat[111.4560mm 98.5934mm 0 111.4560mm 95.3935mm 0  ""]
+Rat[111.4560mm 95.3935mm 0 111.4560mm 94.5934mm 0  ""]
+Rat[87.6001mm 92.4316mm 0 104.3849mm 93.0482mm 0  ""]
+Rat[104.3849mm 93.0482mm 0 111.4560mm 97.7933mm 0  ""]
+Rat[86.6531mm 97.0171mm 0 86.8005mm 92.4316mm 0  ""]
+Rat[86.6531mm 97.0171mm 0 113.5261mm 101.4636mm 0  ""]
+Rat[118.9588mm 107.8513mm 0 121.7901mm 110.3076mm 0  ""]
+Rat[4227.50mil 110.4848mm 0 102.8597mm 118.7028mm 0  ""]
+Rat[4227.50mil 110.4848mm 0 124.6601mm 118.7778mm 0  ""]
+Rat[107.7096mm 122.8301mm 0 106.5789mm 110.4848mm 0  ""]
+Rat[107.7096mm 122.8301mm 0 122.5900mm 122.4478mm 0  ""]
+Rat[133.8356mm 117.4912mm 5 124.6601mm 4613.30mil 0  ""]
+Rat[124.6601mm 4613.30mil 0 124.6601mm 4644.80mil 0  ""]
+Rat[124.6601mm 4613.30mil 0 124.6601mm 113.9779mm 0  ""]
+Rat[124.6601mm 113.9779mm 0 124.6601mm 113.1778mm 0  ""]
+Rat[124.6601mm 113.1778mm 0 124.6601mm 112.3777mm 0  ""]
+Rat[133.8356mm 113.3002mm 5 124.6601mm 115.5779mm 0  ""]
+Rat[124.6601mm 115.5779mm 0 124.6601mm 4581.80mil 0  ""]
+Rat[124.6601mm 4581.80mil 0 124.6601mm 119.5779mm 0  ""]
+Rat[124.6601mm 119.5779mm 0 124.6601mm 120.3777mm 0  ""]
+Rat[139.3474mm 113.3002mm 5 112.5199mm 113.1776mm 0  ""]
+Rat[112.5199mm 113.1776mm 0 112.5199mm 112.3777mm 0  ""]
+Rat[112.5199mm 113.1776mm 0 112.5199mm 113.9777mm 0  ""]
+Rat[112.5199mm 113.9777mm 0 112.5199mm 117.1776mm 0  ""]
+Rat[112.5199mm 117.1776mm 0 112.5199mm 117.9777mm 0  ""]
+Rat[139.3474mm 117.4912mm 5 112.5199mm 4581.80mil 0  ""]
+Rat[112.5199mm 4581.80mil 0 112.5199mm 4550.30mil 0  ""]
+Rat[112.5199mm 4581.80mil 0 112.5199mm 119.5776mm 0  ""]
+Rat[112.5199mm 119.5776mm 0 112.5199mm 120.3777mm 0  ""]
+Rat[108.0191mm 113.6081mm 0 103.0595mm 112.9864mm 0  ""]
+Rat[108.0191mm 113.6081mm 0 112.5199mm 118.7775mm 0  ""]
+Rat[106.0088mm 120.8861mm 0 107.2195mm 113.6081mm 0  ""]
+Rat[106.0088mm 120.8861mm 0 114.5900mm 122.4478mm 0  ""]
+Rat[4020.00mil 39.7530mm 0 97.1583mm 19.0297mm 0  ""]
+Rat[118.5805mm 25.8586mm 0 96.3582mm 19.0297mm 0  ""]
+Rat[4500.00mil 1400.00mil 5 98.7583mm 19.0297mm 0  ""]
+Rat[4600.00mil 1500.00mil 5 97.9584mm 19.0297mm 0  ""]
+Rat[3840.00mil 2114.00mil 0 103.0248mm 68.8957mm 0  ""]
+Rat[103.0248mm 68.8957mm 0 102.7853mm 76.2653mm 0  ""]
+Rat[102.7853mm 76.2653mm 0 95.9474mm 2859.00mil 0  ""]
+Rat[95.9474mm 2859.00mil 0 94.8030mm 69.8910mm 0  ""]
+Rat[94.8030mm 69.8910mm 0 88.3977mm 72.6054mm 0  ""]
+Rat[88.3977mm 72.6054mm 0 88.7674mm 75.4899mm 0  ""]
+Rat[88.7674mm 75.4899mm 0 86.1388mm 76.4745mm 0  ""]
+Rat[103.0248mm 68.8957mm 0 113.6464mm 69.2522mm 0  ""]
+Rat[113.6464mm 69.2522mm 0 114.4465mm 69.2522mm 0  ""]
+Rat[114.4465mm 69.2522mm 0 117.6464mm 69.2522mm 0  ""]
+Rat[102.7853mm 76.2653mm 0 96.9547mm 86.2576mm 0  ""]
+Rat[96.9547mm 86.2576mm 0 99.4065mm 93.0482mm 0  ""]
+Rat[99.4065mm 93.0482mm 0 99.0401mm 98.2367mm 0  ""]
+Rat[99.4065mm 93.0482mm 0 92.9526mm 94.4212mm 0  ""]
+Rat[92.9526mm 94.4212mm 0 87.4527mm 97.0171mm 0  ""]
+Rat[87.4527mm 97.0171mm 0 85.1656mm 88.8117mm 0  ""]
+Rat[85.1656mm 88.8117mm 0 77.3501mm 92.1288mm 0  ""]
+Rat[86.1388mm 76.4745mm 0 76.0190mm 70.0866mm 0  ""]
+Rat[76.0190mm 70.0866mm 0 75.3301mm 2641.20mil 0  ""]
+Rat[75.3301mm 2641.20mil 0 2615.00mil 2660.00mil 0  ""]
+Rat[2615.00mil 2660.00mil 0 2660.00mil 2937.00mil 0  ""]
+Rat[117.6464mm 69.2522mm 0 117.6464mm 81.3924mm 0  ""]
+Rat[117.6464mm 81.3924mm 0 117.5261mm 89.3234mm 0  ""]
+Rat[117.5261mm 89.3234mm 0 114.3262mm 89.3234mm 0  ""]
+Rat[114.3262mm 89.3234mm 0 113.5261mm 89.3234mm 0  ""]
+Rat[117.5261mm 89.3234mm 0 117.5261mm 101.4636mm 0  ""]
+Rat[117.5261mm 101.4636mm 0 118.5900mm 110.3076mm 0  ""]
+Rat[118.5900mm 110.3076mm 0 115.3901mm 110.3076mm 0  ""]
+Rat[115.3901mm 110.3076mm 0 114.5900mm 110.3076mm 0  ""]
+Rat[114.5900mm 110.3076mm 0 106.3808mm 109.0958mm 0  ""]
+Rat[106.3808mm 109.0958mm 0 105.9700mm 117.4003mm 0  ""]
+Rat[105.9700mm 117.4003mm 0 106.8084mm 120.8861mm 0  ""]
+Rat[106.8084mm 120.8861mm 0 106.9100mm 122.8301mm 0  ""]
+Rat[106.9100mm 122.8301mm 0 4320.70mil 125.6122mm 0  ""]
+Rat[105.9700mm 117.4003mm 0 97.8813mm 118.7028mm 0  ""]
+Rat[97.8813mm 118.7028mm 0 98.0811mm 112.9864mm 0  ""]
+Rat[4320.70mil 125.6122mm 0 118.5900mm 122.4478mm 0  ""]
+Rat[2660.00mil 2937.00mil 0 56.4451mm 83.5064mm 0  ""]
+Rat[56.4451mm 83.5064mm 0 44.0830mm 85.3911mm 5  ""]
+Rat[44.0830mm 85.3911mm 5 43.1626mm 109.5622mm 0  ""]
+Rat[43.1626mm 109.5622mm 0 31.7557mm 109.8789mm 0  ""]
+Rat[31.7557mm 109.8789mm 0 19.6213mm 4196.30mil 5  ""]
+Rat[2615.00mil 2660.00mil 0 1700.00mil 33.8940mm 0  ""]
+Rat[14.1339mm 51.5566mm 5 4.8873mm 28.3232mm 5  ""]
+Rat[14.1339mm 51.5566mm 5 219.55mil 85.3911mm 5  ""]
+Rat[14.1339mm 47.3656mm 5 219.55mil 74.6469mm 5  ""]
+Rat[14.1339mm 47.3656mm 5 4.8873mm 17.5790mm 5  ""]
+Rat[90.9582mm 79.4100mm 0 90.0674mm 75.4899mm 0  ""]
+Rat[90.9582mm 79.4100mm 0 78.6501mm 92.1288mm 0  ""]
+Rat[78.6501mm 92.1288mm 0 81.6623mm 96.7243mm 0  ""]
+Rat[90.9582mm 79.4100mm 0 111.5763mm 73.7221mm 0  ""]
+Rat[111.5763mm 73.7221mm 0 120.0464mm 69.2522mm 0  ""]
+Rat[120.0464mm 69.2522mm 0 123.7165mm 73.7224mm 0  ""]
+Rat[123.7165mm 73.7224mm 0 4721.50mil 89.3234mm 0  ""]
+Rat[4721.50mil 89.3234mm 0 123.5962mm 93.7936mm 0  ""]
+Rat[4721.50mil 89.3234mm 0 111.4560mm 93.7933mm 0  ""]
+Rat[123.5962mm 93.7936mm 0 4734.60mil 107.8513mm 0  ""]
+Rat[4734.60mil 107.8513mm 0 120.9900mm 110.3076mm 0  ""]
+Rat[120.9900mm 110.3076mm 0 124.6601mm 114.7778mm 0  ""]
+Rat[120.9900mm 110.3076mm 0 112.5199mm 4518.80mil 0  ""]
+Rat[112.5199mm 4518.80mil 0 107.2700mm 117.4003mm 0  ""]
+Rat[78.6501mm 92.1288mm 0 43.1626mm 101.3626mm 0  ""]
+Rat[43.1626mm 101.3626mm 0 31.7557mm 101.6793mm 0  ""]
+Rat[31.7557mm 101.6793mm 0 14.1095mm 4196.30mil 5  ""]
+Layer(1 "top")
+(
+)
+Layer(2 "ground")
+(
+)
+Layer(3 "signal2")
+(
+)
+Layer(4 "signal3")
+(
+)
+Layer(5 "power")
+(
+)
+Layer(6 "bottom")
+(
+)
+Layer(7 "outline")
+(
+)
+Layer(8 "spare")
+(
+)
+Layer(9 "silk")
+(
+)
+Layer(10 "silk")
+(
+)
+NetList()
+(
+	Net("+3.3V" "(unknown)")
+	(
+		Connect("MP1/C1-2")
+		Connect("MP1/ISP-2")
+		Connect("MP1/U1-15")
+		Connect("MP1/U1-25")
+		Connect("MP1/U1-35")
+		Connect("MP1/U1-45")
+		Connect("MP1/U1-53")
+		Connect("MP1/U1-61")
+		Connect("PS1/C101-2")
+		Connect("PS1/U102-3")
+	)
+	Net("+3.3Vm" "(unknown)")
+	(
+		Connect("IO1/C1-2")
+		Connect("IO1/OSC1-4")
+		Connect("IO1/R2-2")
+		Connect("PS1/C103-2")
+		Connect("PS1/U103-3")
+	)
+	Net("+5V" "(unknown)")
+	(
+		Connect("PS1/C4-1")
+		Connect("PS1/C100-2")
+		Connect("PS1/U100-3")
+		Connect("PS1/U102-1")
+	)
+	Net("+5Vm" "(unknown)")
+	(
+		Connect("MD1/C7-2")
+		Connect("MD1/C9-1")
+		Connect("MD1/U3-13")
+		Connect("MD1/U3-40")
+		Connect("MD2/C7-2")
+		Connect("MD2/C9-1")
+		Connect("MD2/U3-13")
+		Connect("MD2/U3-40")
+		Connect("MD3/C7-2")
+		Connect("MD3/C9-1")
+		Connect("MD3/U3-13")
+		Connect("MD3/U3-40")
+		Connect("PS1/C5-1")
+		Connect("PS1/C102-2")
+		Connect("PS1/U101-3")
+		Connect("PS1/U103-1")
+	)
+	Net("CGND" "(unknown)")
+	(
+		Connect("PS1/J1-3")
+		Connect("PS1/R1-1")
+		Connect("PS1/R2-1")
+	)
+	Net("dir_x" "(unknown)")
+	(
+		Connect("IO1/R2-1")
+		Connect("U?-?")
+	)
+	Net("enable_x" "(unknown)")
+	(
+		Connect("IO1/R3-1")
+		Connect("U?-?")
+	)
+	Net("GND" "(unknown)")
+	(
+		Connect("IO1/R1-2")
+		Connect("IO1/R2-2")
+		Connect("IO1/R3-2")
+		Connect("IO1/R4-2")
+		Connect("MP1/C1-1")
+		Connect("MP1/C2-1")
+		Connect("MP1/C3-1")
+		Connect("MP1/ISP-6")
+		Connect("MP1/U1-14")
+		Connect("MP1/U1-24")
+		Connect("MP1/U1-34")
+		Connect("MP1/U1-44")
+		Connect("MP1/U1-52")
+		Connect("MP1/U1-60")
+		Connect("PS1/C4-2")
+		Connect("PS1/C100-1")
+		Connect("PS1/C101-1")
+		Connect("PS1/R2-2")
+		Connect("PS1/U100-4")
+		Connect("PS1/U102-2")
+		Connect("PS1/U102-4")
+	)
+	Net("IO" "(unknown)")
+	(
+		Connect("MP1/b_max/PB7-1")
+		Connect("MP1/PB5-1")
+		Connect("MP1/spi_cs/PB3-1")
+		Connect("MP1/U1-6")
+		Connect("MP1/U1-7")
+		Connect("MP1/U1-8")
+		Connect("MP1/U1-9")
+		Connect("MP1/U1-10")
+		Connect("MP1/U1-11")
+		Connect("MP1/U1-12")
+		Connect("MP1/U1-13")
+	)
+	Net("IO1/unnamed_net1" "(unknown)")
+	(
+		Connect("IO1/OSC1-1")
+		Connect("IO1/R2-1")
+	)
+	Net("IO1/unnamed_net2" "(unknown)")
+	(
+		Connect("IO1/OSC1-3")
+	)
+	Net("IO1/unnamed_net3" "(unknown)")
+	(
+		Connect("IO1/CD1-1")
+		Connect("IO1/R2-1")
+	)
+	Net("MD1/unnamed_net54" "(unknown)")
+	(
+		Connect("MD1/C11-1")
+		Connect("MD1/U3-35")
+	)
+	Net("MD1/unnamed_net55" "(unknown)")
+	(
+		Connect("MD1/R2-2")
+		Connect("MD1/R4-2")
+		Connect("MD1/U3-25")
+	)
+	Net("MD1/unnamed_net56" "(unknown)")
+	(
+		Connect("MD1/C15-2")
+		Connect("MD1/R2-1")
+		Connect("MD1/U3-22")
+	)
+	Net("MD1/unnamed_net57" "(unknown)")
+	(
+		Connect("MD1/J1-4")
+		Connect("MD1/U3-26")
+		Connect("MD1/U3-27")
+		Connect("MD1/U3-31")
+		Connect("MD1/U3-32")
+		Connect("MD1/U3-33")
+	)
+	Net("MD1/unnamed_net58" "(unknown)")
+	(
+		Connect("MD1/J1-3")
+		Connect("MD1/U3-23")
+		Connect("MD1/U3-24")
+		Connect("MD1/U3-28")
+		Connect("MD1/U3-29")
+	)
+	Net("MD1/unnamed_net59" "(unknown)")
+	(
+		Connect("MD1/J1-1")
+		Connect("MD1/U3-1")
+		Connect("MD1/U3-2")
+		Connect("MD1/U3-3")
+		Connect("MD1/U3-7")
+		Connect("MD1/U3-8")
+	)
+	Net("MD1/unnamed_net60" "(unknown)")
+	(
+		Connect("MD1/J1-2")
+		Connect("MD1/U3-5")
+		Connect("MD1/U3-6")
+		Connect("MD1/U3-10")
+		Connect("MD1/U3-11")
+	)
+	Net("MD1/unnamed_net61" "(unknown)")
+	(
+		Connect("MD1/R3-2")
+		Connect("MD1/R5-2")
+		Connect("MD1/U3-9")
+	)
+	Net("MD1/unnamed_net62" "(unknown)")
+	(
+		Connect("MD1/U3-14")
+	)
+	Net("MD1/unnamed_net63" "(unknown)")
+	(
+		Connect("MD1/U3-15")
+	)
+	Net("MD1/unnamed_net64" "(unknown)")
+	(
+		Connect("MD1/U3-16")
+	)
+	Net("MD1/unnamed_net65" "(unknown)")
+	(
+		Connect("MD1/U3-18")
+	)
+	Net("MD1/unnamed_net66" "(unknown)")
+	(
+		Connect("MD1/U3-19")
+	)
+	Net("MD1/unnamed_net67" "(unknown)")
+	(
+		Connect("MD1/U3-38")
+	)
+	Net("MD1/unnamed_net68" "(unknown)")
+	(
+		Connect("MD1/U3-41")
+	)
+	Net("MD1/unnamed_net69" "(unknown)")
+	(
+		Connect("MD1/U3-42")
+	)
+	Net("MD1/unnamed_net70" "(unknown)")
+	(
+		Connect("MD1/C16-1")
+		Connect("MD1/R3-1")
+		Connect("MD1/U3-12")
+	)
+	Net("MD1/unnamed_net71" "(unknown)")
+	(
+		Connect("MD1/U3-20")
+	)
+	Net("MD1/unnamed_net72" "(unknown)")
+	(
+		Connect("MD1/U3-34")
+	)
+	Net("MD1/unnamed_net73" "(unknown)")
+	(
+		Connect("MD1/U3-37")
+	)
+	Net("MD1/unnamed_net74" "(unknown)")
+	(
+		Connect("MD1/U3-21")
+	)
+	Net("MD2/unnamed_net75" "(unknown)")
+	(
+		Connect("MD2/C11-1")
+		Connect("MD2/U3-35")
+	)
+	Net("MD2/unnamed_net76" "(unknown)")
+	(
+		Connect("MD2/R2-2")
+		Connect("MD2/R4-2")
+		Connect("MD2/U3-25")
+	)
+	Net("MD2/unnamed_net77" "(unknown)")
+	(
+		Connect("MD2/C15-2")
+		Connect("MD2/R2-1")
+		Connect("MD2/U3-22")
+	)
+	Net("MD2/unnamed_net78" "(unknown)")
+	(
+		Connect("MD2/J1-4")
+		Connect("MD2/U3-26")
+		Connect("MD2/U3-27")
+		Connect("MD2/U3-31")
+		Connect("MD2/U3-32")
+		Connect("MD2/U3-33")
+	)
+	Net("MD2/unnamed_net79" "(unknown)")
+	(
+		Connect("MD2/J1-3")
+		Connect("MD2/U3-23")
+		Connect("MD2/U3-24")
+		Connect("MD2/U3-28")
+		Connect("MD2/U3-29")
+	)
+	Net("MD2/unnamed_net80" "(unknown)")
+	(
+		Connect("MD2/J1-1")
+		Connect("MD2/U3-1")
+		Connect("MD2/U3-2")
+		Connect("MD2/U3-3")
+		Connect("MD2/U3-7")
+		Connect("MD2/U3-8")
+	)
+	Net("MD2/unnamed_net81" "(unknown)")
+	(
+		Connect("MD2/J1-2")
+		Connect("MD2/U3-5")
+		Connect("MD2/U3-6")
+		Connect("MD2/U3-10")
+		Connect("MD2/U3-11")
+	)
+	Net("MD2/unnamed_net82" "(unknown)")
+	(
+		Connect("MD2/R3-2")
+		Connect("MD2/R5-2")
+		Connect("MD2/U3-9")
+	)
+	Net("MD2/unnamed_net83" "(unknown)")
+	(
+		Connect("MD2/U3-14")
+	)
+	Net("MD2/unnamed_net84" "(unknown)")
+	(
+		Connect("MD2/U3-15")
+	)
+	Net("MD2/unnamed_net85" "(unknown)")
+	(
+		Connect("MD2/U3-16")
+	)
+	Net("MD2/unnamed_net86" "(unknown)")
+	(
+		Connect("MD2/U3-18")
+	)
+	Net("MD2/unnamed_net87" "(unknown)")
+	(
+		Connect("MD2/U3-19")
+	)
+	Net("MD2/unnamed_net88" "(unknown)")
+	(
+		Connect("MD2/U3-38")
+	)
+	Net("MD2/unnamed_net89" "(unknown)")
+	(
+		Connect("MD2/U3-41")
+	)
+	Net("MD2/unnamed_net90" "(unknown)")
+	(
+		Connect("MD2/U3-42")
+	)
+	Net("MD2/unnamed_net91" "(unknown)")
+	(
+		Connect("MD2/C16-1")
+		Connect("MD2/R3-1")
+		Connect("MD2/U3-12")
+	)
+	Net("MD2/unnamed_net92" "(unknown)")
+	(
+		Connect("MD2/U3-20")
+	)
+	Net("MD2/unnamed_net93" "(unknown)")
+	(
+		Connect("MD2/U3-34")
+	)
+	Net("MD2/unnamed_net94" "(unknown)")
+	(
+		Connect("MD2/U3-37")
+	)
+	Net("MD2/unnamed_net95" "(unknown)")
+	(
+		Connect("MD2/U3-21")
+	)
+	Net("MD3/unnamed_net96" "(unknown)")
+	(
+		Connect("MD3/C11-1")
+		Connect("MD3/U3-35")
+	)
+	Net("MD3/unnamed_net97" "(unknown)")
+	(
+		Connect("MD3/R2-2")
+		Connect("MD3/R4-2")
+		Connect("MD3/U3-25")
+	)
+	Net("MD3/unnamed_net98" "(unknown)")
+	(
+		Connect("MD3/C15-2")
+		Connect("MD3/R2-1")
+		Connect("MD3/U3-22")
+	)
+	Net("MD3/unnamed_net99" "(unknown)")
+	(
+		Connect("MD3/J1-4")
+		Connect("MD3/U3-26")
+		Connect("MD3/U3-27")
+		Connect("MD3/U3-31")
+		Connect("MD3/U3-32")
+		Connect("MD3/U3-33")
+	)
+	Net("MD3/unnamed_net100" "(unknown)")
+	(
+		Connect("MD3/J1-3")
+		Connect("MD3/U3-23")
+		Connect("MD3/U3-24")
+		Connect("MD3/U3-28")
+		Connect("MD3/U3-29")
+	)
+	Net("MD3/unnamed_net101" "(unknown)")
+	(
+		Connect("MD3/J1-1")
+		Connect("MD3/U3-1")
+		Connect("MD3/U3-2")
+		Connect("MD3/U3-3")
+		Connect("MD3/U3-7")
+		Connect("MD3/U3-8")
+	)
+	Net("MD3/unnamed_net102" "(unknown)")
+	(
+		Connect("MD3/J1-2")
+		Connect("MD3/U3-5")
+		Connect("MD3/U3-6")
+		Connect("MD3/U3-10")
+		Connect("MD3/U3-11")
+	)
+	Net("MD3/unnamed_net103" "(unknown)")
+	(
+		Connect("MD3/R3-2")
+		Connect("MD3/R5-2")
+		Connect("MD3/U3-9")
+	)
+	Net("MD3/unnamed_net104" "(unknown)")
+	(
+		Connect("MD3/U3-14")
+	)
+	Net("MD3/unnamed_net105" "(unknown)")
+	(
+		Connect("MD3/U3-15")
+	)
+	Net("MD3/unnamed_net106" "(unknown)")
+	(
+		Connect("MD3/U3-16")
+	)
+	Net("MD3/unnamed_net107" "(unknown)")
+	(
+		Connect("MD3/U3-18")
+	)
+	Net("MD3/unnamed_net108" "(unknown)")
+	(
+		Connect("MD3/U3-19")
+	)
+	Net("MD3/unnamed_net109" "(unknown)")
+	(
+		Connect("MD3/U3-38")
+	)
+	Net("MD3/unnamed_net110" "(unknown)")
+	(
+		Connect("MD3/U3-41")
+	)
+	Net("MD3/unnamed_net111" "(unknown)")
+	(
+		Connect("MD3/U3-42")
+	)
+	Net("MD3/unnamed_net112" "(unknown)")
+	(
+		Connect("MD3/C16-1")
+		Connect("MD3/R3-1")
+		Connect("MD3/U3-12")
+	)
+	Net("MD3/unnamed_net113" "(unknown)")
+	(
+		Connect("MD3/U3-20")
+	)
+	Net("MD3/unnamed_net114" "(unknown)")
+	(
+		Connect("MD3/U3-34")
+	)
+	Net("MD3/unnamed_net115" "(unknown)")
+	(
+		Connect("MD3/U3-37")
+	)
+	Net("MD3/unnamed_net116" "(unknown)")
+	(
+		Connect("MD3/U3-21")
+	)
+	Net("MP1/unnamed_net8" "(unknown)")
+	(
+		Connect("MP1/C2-2")
+		Connect("MP1/U1-58")
+		Connect("MP1/X1-1")
+	)
+	Net("MP1/unnamed_net9" "(unknown)")
+	(
+		Connect("MP1/C3-2")
+		Connect("MP1/U1-59")
+		Connect("MP1/X1-2")
+	)
+	Net("MP1/unnamed_net10" "(unknown)")
+	(
+		Connect("MP1/ISP-4")
+	)
+	Net("MP1/unnamed_net11" "(unknown)")
+	(
+		Connect("MP1/ISP-1")
+		Connect("MP1/U1-56")
+	)
+	Net("MP1/unnamed_net12" "(unknown)")
+	(
+		Connect("MP1/ISP-5")
+		Connect("MP1/U1-57")
+	)
+	Net("MP1/unnamed_net13" "(unknown)")
+	(
+		Connect("MP1/ISP-3")
+	)
+	Net("MP1/unnamed_net14" "(unknown)")
+	(
+		Connect("MP1/U1-19")
+	)
+	Net("MP1/unnamed_net15" "(unknown)")
+	(
+		Connect("MP1/U1-18")
+	)
+	Net("MP1/unnamed_net16" "(unknown)")
+	(
+		Connect("MP1/U1-21")
+	)
+	Net("MP1/unnamed_net17" "(unknown)")
+	(
+		Connect("MP1/U1-23")
+	)
+	Net("MP1/unnamed_net18" "(unknown)")
+	(
+		Connect("MP1/U1-22")
+	)
+	Net("MP1/unnamed_net19" "(unknown)")
+	(
+		Connect("MP1/U1-55")
+	)
+	Net("MP1/unnamed_net20" "(unknown)")
+	(
+		Connect("MP1/U1-54")
+	)
+	Net("MP1/unnamed_net21" "(unknown)")
+	(
+		Connect("MP1/U1-43")
+	)
+	Net("MP1/unnamed_net22" "(unknown)")
+	(
+		Connect("MP1/U1-42")
+	)
+	Net("MP1/unnamed_net23" "(unknown)")
+	(
+		Connect("MP1/U1-33")
+	)
+	Net("MP1/unnamed_net24" "(unknown)")
+	(
+		Connect("MP1/U1-32")
+	)
+	Net("MP1/unnamed_net25" "(unknown)")
+	(
+		Connect("MP1/U1-4")
+	)
+	Net("MP1/unnamed_net26" "(unknown)")
+	(
+		Connect("MP1/U1-5")
+	)
+	Net("MP1/unnamed_net27" "(unknown)")
+	(
+		Connect("MP1/U1-41")
+	)
+	Net("MP1/unnamed_net28" "(unknown)")
+	(
+		Connect("MP1/U1-31")
+	)
+	Net("MP1/unnamed_net29" "(unknown)")
+	(
+		Connect("MP1/U1-51")
+	)
+	Net("MP1/unnamed_net30" "(unknown)")
+	(
+		Connect("MP1/U1-3")
+	)
+	Net("MP1/unnamed_net31" "(unknown)")
+	(
+		Connect("MP1/U1-46")
+	)
+	Net("MP1/unnamed_net32" "(unknown)")
+	(
+		Connect("MP1/U1-48")
+	)
+	Net("MP1/unnamed_net33" "(unknown)")
+	(
+		Connect("MP1/U1-47")
+	)
+	Net("MP1/unnamed_net34" "(unknown)")
+	(
+		Connect("MP1/U1-36")
+	)
+	Net("MP1/unnamed_net35" "(unknown)")
+	(
+		Connect("MP1/U1-38")
+	)
+	Net("MP1/unnamed_net36" "(unknown)")
+	(
+		Connect("MP1/U1-37")
+	)
+	Net("MP1/unnamed_net37" "(unknown)")
+	(
+		Connect("MP1/U1-26")
+	)
+	Net("MP1/unnamed_net38" "(unknown)")
+	(
+		Connect("MP1/U1-28")
+	)
+	Net("MP1/unnamed_net39" "(unknown)")
+	(
+		Connect("MP1/U1-27")
+	)
+	Net("MP1/unnamed_net40" "(unknown)")
+	(
+		Connect("MP1/U1-17")
+	)
+	Net("MP1/unnamed_net41" "(unknown)")
+	(
+		Connect("MP1/U1-16")
+	)
+	Net("MP1/unnamed_net43" "(unknown)")
+	(
+		Connect("MP1/U1-2")
+	)
+	Net("MP1/unnamed_net44" "(unknown)")
+	(
+		Connect("MP1/U1-20")
+	)
+	Net("MP1/unnamed_net45" "(unknown)")
+	(
+		Connect("MP1/U1-29")
+	)
+	Net("MP1/unnamed_net46" "(unknown)")
+	(
+		Connect("MP1/U1-30")
+	)
+	Net("MP1/unnamed_net47" "(unknown)")
+	(
+		Connect("MP1/U1-39")
+	)
+	Net("MP1/unnamed_net48" "(unknown)")
+	(
+		Connect("MP1/U1-40")
+	)
+	Net("MP1/unnamed_net49" "(unknown)")
+	(
+		Connect("MP1/U1-49")
+	)
+	Net("MP1/unnamed_net50" "(unknown)")
+	(
+		Connect("MP1/U1-50")
+	)
+	Net("PGND" "(unknown)")
+	(
+		Connect("IO1/C1-1")
+		Connect("IO1/OSC1-2")
+		Connect("MD1/C7-1")
+		Connect("MD1/C9-2")
+		Connect("MD1/C12-1")
+		Connect("MD1/C15-1")
+		Connect("MD1/C16-2")
+		Connect("MD1/R4-1")
+		Connect("MD1/R5-1")
+		Connect("MD1/U3-17")
+		Connect("MD1/U3-39")
+		Connect("MD1/U3-43")
+		Connect("MD1/U3-44")
+		Connect("MD2/C7-1")
+		Connect("MD2/C9-2")
+		Connect("MD2/C12-1")
+		Connect("MD2/C15-1")
+		Connect("MD2/C16-2")
+		Connect("MD2/R4-1")
+		Connect("MD2/R5-1")
+		Connect("MD2/U3-17")
+		Connect("MD2/U3-39")
+		Connect("MD2/U3-43")
+		Connect("MD2/U3-44")
+		Connect("MD3/C7-1")
+		Connect("MD3/C9-2")
+		Connect("MD3/C12-1")
+		Connect("MD3/C15-1")
+		Connect("MD3/C16-2")
+		Connect("MD3/R4-1")
+		Connect("MD3/R5-1")
+		Connect("MD3/U3-17")
+		Connect("MD3/U3-39")
+		Connect("MD3/U3-43")
+		Connect("MD3/U3-44")
+		Connect("PS1/C1-2")
+		Connect("PS1/C2-2")
+		Connect("PS1/C5-2")
+		Connect("PS1/C102-1")
+		Connect("PS1/C103-1")
+		Connect("PS1/J2-1")
+		Connect("PS1/R1-2")
+		Connect("PS1/U101-4")
+		Connect("PS1/U103-2")
+		Connect("PS1/U103-4")
+	)
+	Net("PS1/Line" "(unknown)")
+	(
+		Connect("PS1/J1-1")
+		Connect("PS1/U100-1")
+		Connect("PS1/U101-1")
+	)
+	Net("PS1/Neutral" "(unknown)")
+	(
+		Connect("PS1/J1-2")
+		Connect("PS1/U100-2")
+		Connect("PS1/U101-2")
+	)
+	Net("spi_cs_x" "(unknown)")
+	(
+		Connect("IO1/R4-1")
+		Connect("U?-?")
+	)
+	Net("step_x" "(unknown)")
+	(
+		Connect("IO1/R1-1")
+		Connect("U?-?")
+	)
+	Net("unnamed_net4" "(unknown)")
+	(
+		Connect("MP1/U1-62")
+		Connect("U?-?")
+	)
+	Net("unnamed_net5" "(unknown)")
+	(
+		Connect("MP1/U1-63")
+		Connect("U?-?")
+	)
+	Net("unnamed_net6" "(unknown)")
+	(
+		Connect("MP1/U1-64")
+		Connect("U?-?")
+	)
+	Net("unnamed_net7" "(unknown)")
+	(
+		Connect("MP1/U1-1")
+		Connect("U?-?")
+	)
+	Net("Vs" "(unknown)")
+	(
+		Connect("MD1/C11-2")
+		Connect("MD1/C12-2")
+		Connect("MD1/U3-4")
+		Connect("MD1/U3-30")
+		Connect("MD1/U3-36")
+		Connect("MD2/C11-2")
+		Connect("MD2/C12-2")
+		Connect("MD2/U3-4")
+		Connect("MD2/U3-30")
+		Connect("MD2/U3-36")
+		Connect("MD3/C11-2")
+		Connect("MD3/C12-2")
+		Connect("MD3/U3-4")
+		Connect("MD3/U3-30")
+		Connect("MD3/U3-36")
+		Connect("PS1/C1-1")
+		Connect("PS1/C2-1")
+		Connect("PS1/J2-2")
+	)
+)
diff --git a/Combined/combined.sch b/Combined/combined.sch
new file mode 100644
index 0000000..7cea2e6
--- /dev/null
+++ b/Combined/combined.sch
@@ -0,0 +1,126 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+C 41100 45050 1 0 0 isolation.sym
+{
+T 41295 45248 5 10 1 1 0 0 1
+source=isolation.sch
+T 41500 46150 5 10 1 1 0 0 1
+refdes=IO1
+}
+C 42300 40550 1 0 0 microprocessor.sym
+{
+T 45195 41450 5 10 1 1 0 0 1
+value=Microprocessor
+T 45695 41050 5 10 1 1 0 0 1
+refdes=MP1
+T 42295 40550 5 10 0 1 0 0 1
+footprint=TQFP64_14.fp
+}
+C 50250 41750 1 0 0 power_supply.sym
+{
+T 51150 42450 5 10 1 1 0 0 1
+refdes=PS1
+T 50550 42250 5 10 1 0 0 0 1
+source=power.sch
+}
+C 53300 47600 1 0 0 motor_driver.sym
+{
+T 54195 49600 5 10 1 1 0 0 1
+refdes=MD1
+T 53795 47700 5 10 1 1 0 0 1
+source=motor_driver.sch
+}
+C 52800 43900 1 0 0 motor_driver.sym
+{
+T 53695 45900 5 10 1 1 0 0 1
+refdes=MD2
+T 53295 44000 5 10 1 1 0 0 1
+source=motor_driver.sch
+}
+C 54800 41600 1 0 0 motor_driver.sym
+{
+T 55795 43900 5 10 1 1 0 0 1
+refdes=MD3
+T 55295 41700 5 10 1 1 0 0 1
+source=motor_driver.sch
+}
+N 42000 44300 42000 45050 4
+N 43500 42750 43500 44350 4
+N 43500 44350 42200 44350 4
+N 42200 44350 42200 45050 4
+N 43600 42750 43600 44400 4
+N 43600 44400 42400 44400 4
+N 42400 44400 42400 45050 4
+N 43800 42750 43800 44450 4
+N 43800 44450 42700 44450 4
+N 42700 44450 42700 45050 4
+N 42900 45050 42900 44500 4
+N 42900 44500 43900 44500 4
+N 43900 44500 43900 42750 4
+N 43100 44550 43100 45050 4
+N 43100 44550 44000 44550 4
+N 44000 42750 44000 44550 4
+N 44100 42750 44100 44600 4
+N 44100 44600 43300 44600 4
+N 43300 44600 43300 45050 4
+N 44200 42750 44200 44650 4
+N 43500 44650 44200 44650 4
+N 43500 44650 43500 45050 4
+N 44400 42750 44400 44700 4
+N 44400 44700 43800 44700 4
+N 43800 44700 43800 45050 4
+N 44500 42750 44500 44750 4
+N 44000 44750 44500 44750 4
+N 44000 44750 44000 45050 4
+N 44600 42750 44600 44800 4
+N 44600 44800 44200 44800 4
+N 44200 44800 44200 45050 4
+N 44700 42750 44700 44850 4
+N 44700 44850 44400 44850 4
+N 44400 44850 44400 45050 4
+N 44800 42750 44800 45050 4
+N 44800 45050 44600 45050 4
+N 44900 45050 44900 44300 4
+N 45100 45050 45100 42750 4
+N 45200 42750 45200 45050 4
+N 45200 45050 45300 45050 4
+N 45500 45050 45500 45000 4
+N 45500 45000 45300 45000 4
+N 45300 45000 45300 42750 4
+N 45700 45050 45700 44950 4
+N 45400 44950 45700 44950 4
+N 45400 44950 45400 42750 4
+N 45600 42750 45600 44900 4
+N 45600 44900 46000 44900 4
+N 46000 44900 46000 45050 4
+N 45700 42750 45700 44850 4
+N 45700 44850 46200 44850 4
+N 46200 44850 46200 45050 4
+N 45800 42750 45800 44800 4
+N 45800 44800 46400 44800 4
+N 46400 44800 46400 45050 4
+N 45900 42750 45900 44750 4
+N 45900 44750 46600 44750 4
+N 46600 44750 46600 45050 4
+N 46000 42750 46000 44700 4
+N 46000 44700 46800 44700 4
+N 46800 44700 46800 45050 4
+N 45000 42750 45000 44300 4
+N 45000 44300 44900 44300 4
+N 43400 42750 43400 44300 4
+N 43400 44300 42000 44300 4
+N 46200 42750 46200 44650 4
+N 46200 44650 47100 44650 4
+N 47100 44650 47100 45050 4
+N 46300 42750 46300 44600 4
+N 46300 44600 47300 44600 4
+N 47300 44600 47300 45050 4
+N 46400 42750 46400 44550 4
+N 46400 44550 47500 44550 4
+N 47500 44550 47500 45050 4
+N 46500 42750 46500 44500 4
+N 46500 44500 47700 44500 4
+N 47700 44500 47700 45050 4
+N 46600 42750 46600 44450 4
+N 46600 44450 47900 44450 4
+N 47900 44450 47900 45050 4
diff --git a/Combined/footprints/CB3_OSC.fp b/Combined/footprints/CB3_OSC.fp
new file mode 100644
index 0000000..786e2f9
--- /dev/null
+++ b/Combined/footprints/CB3_OSC.fp
@@ -0,0 +1,12 @@
+Element[0x00000000 "CTS Crystal Oscillator" "" "" 0 0 0 0 0 100 0x00000000]
+(
+  Pad(-100 82.5 -100 82.5 79 40 100 "EOH" "1" 0x0100)
+  Pad(100 82.5 100 82.5 79 40 100 "GND" "2" 0x0100)
+  Pad(100 -82.5 100 -82.5 79 40 100 "Output" "3" 0x0100)
+  Pad(-100 -82.5 -100 -82.5 79 40 100 "Vcc" "4" 0x0100)
+  ElementLine(-140 130 160 130 10)
+  ElementLine(160 130 160 -130 10)
+  ElementLine(160 -130 -160 -130 10)
+  ElementLine(-160 -130 -160 110 10)
+  ElementLine(-160 110 -140 130 10)
+)
diff --git a/Combined/footprints/CSR2010.fp b/Combined/footprints/CSR2010.fp
new file mode 100644
index 0000000..638a8f0
--- /dev/null
+++ b/Combined/footprints/CSR2010.fp
@@ -0,0 +1,11 @@
+Element[0x00000000 "" "" "" 1000 1000 0 -4000 0 100 0x00000000]
+(
+  Pad(-98.5 -21.5 -98.5 21.5 55 40 65 "1" "1" 0x0100)
+  Pad(98.5 -21.5 98.5 21.5 55 40 65 "2" "2" 0x0100)
+	ElementLine(160 69 -160 69 10)
+	ElementLine(-160 69 -160 -69 10)
+	ElementLine(-160 -69 160 -69 10)
+	ElementLine(160 -69 160 69 10)
+	ElementLine(-160 -10 -150 0 10)
+	ElementLine(-150 0 -160 10 10)
+)
diff --git a/Combined/footprints/ICS551.fp b/Combined/footprints/ICS551.fp
new file mode 100644
index 0000000..7db1923
--- /dev/null
+++ b/Combined/footprints/ICS551.fp
@@ -0,0 +1,22 @@
+# author: Amand Tihon - modified by Doug Coffland to match pin names for IDT ICS551 series
+# email: amand.tihon@alrj.org
+# dist-license: GPL3, http://www.gnu.org/licenses/gpl-3.0.txt
+# use-license: unlimited
+
+Element["" "ICS551 4-channel clock driver, SOIC8 package" "U000" "" 15000 10000 0 0 0 100 ""]
+(
+	Pad[7000 -7500 13500 -7500 2000 1000 3000 "OE" "8" "square,edge2"]
+	Pad[7000 -2500 13500 -2500 2000 1000 3000 "VDD" "7" "square,edge2"]
+	Pad[7000 2500 13500 2500 2000 1000 3000 "GND" "6" "square,edge2"]
+	Pad[7000 7500 13500 7500 2000 1000 3000 "Q4" "5" "square,edge2"]
+	Pad[-13500 7500 -7000 7500 2000 1000 3000 "Q3" "4" "square"]
+	Pad[-13500 2500 -7000 2500 2000 1000 3000 "Q2" "3" "square"]
+	Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "Q1" "2" "square"]
+	Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "ICLK" "1" "square"]
+	ElementLine [-5000 -9500 -5000 9500 500]
+	ElementLine [-7500 -9500 7500 -9500 1000]
+	ElementLine [7500 9500 7500 -9500 1000]
+	ElementLine [-7500 9500 7500 9500 1000]
+	ElementLine [-7500 -9500 -7500 9500 1000]
+
+	)
diff --git a/Combined/footprints/IRM-10-5.fp b/Combined/footprints/IRM-10-5.fp
new file mode 100644
index 0000000..612f6ab
--- /dev/null
+++ b/Combined/footprints/IRM-10-5.fp
@@ -0,0 +1,12 @@
+Element (0x00 "Mean Well IRM-10-5 DC/DC converter" "" "" 0 0 700 -500 0 100 0x00)
+(
+  Pin(0 0 100 100 140 50 "AC/L" "1" 0x0101)
+  Pin(0 -423 100 100 140 50 "AC/N" "2" 0x0101)
+  Pin(1516 -315 100 100 140 50 "+V" "3" 0x0101)
+  Pin(1516 0 100 100 140 50 "-V" "4" 0x0101)
+  ElementLine(-100 150 1660 150 10)
+  ElementLine(1660 150 1660 -1030 10)
+  ElementLine(1660 -1030 -150 -1030 10)
+  ElementLine(-150 -1030 -150 100 10)
+  ElementLine(-150 100 -100 150 10)
+)
diff --git a/Combined/footprints/Molex 39-03-0040.fp b/Combined/footprints/Molex 39-03-0040.fp
new file mode 100644
index 0000000..2ce12ab
--- /dev/null
+++ b/Combined/footprints/Molex 39-03-0040.fp	
@@ -0,0 +1,12 @@
+Element (0x00 "Molex Element 39-30-0040" "" "" 0 0 -350 100 0 100 0x00)
+(
+  Pin(0 0 100 60 140 70 "Pin 1" "1" 0x0101)
+  Pin(0 165 100 60 140 70 "Pin 2" "2" 0x0101)
+  Pin(-217 0 100 60 140 70 "Pin 3" "3" 0x0101)
+  Pin(-217 165 100 60 140 70 "Pin 4" "4" 0x101)
+  Pin(287 83 118 0 150 118 "Mounting Hole" "1" 0x8)
+  ElementLine(-300 -107.5 510 -107.5 10)
+  ElementLine(510 -107.5 510 272.5 10)
+  ElementLine(510 272.5 -300 272.5 10)
+  ElementLine(-300 272.5 -300 -107.5 10)
+)
diff --git a/Combined/footprints/Molex_39-29-1027.fp b/Combined/footprints/Molex_39-29-1027.fp
new file mode 100644
index 0000000..4d5a6a0
--- /dev/null
+++ b/Combined/footprints/Molex_39-29-1027.fp
@@ -0,0 +1,16 @@
+Element (0x00 "Molex Element 39-29-1027" "" "" 0 0 0 382 0 100 0x00)
+(
+  Pin(0 0 180 60 220 80 "1" "1" 0x0101)
+  Pin(0 217 180 60 220 80 "2" "2" 0x0101)
+  Pin(-177 382 130 0 150 130 "Mounting Hole" "1" 0x8)
+  Pin(177 382 130 0 150 130 "Mounting Hole" "1" 0x8)
+  ElementLine(-303 260 303 260 10)
+  ElementLine(303 260 303 504 10)
+  ElementLine(303 504 106 504 10)
+  ElementLine(106 504 106 764 10)    
+  ElementLine(106 764 -106 764 10)
+  ElementLine(-106 764 -106 504 10)
+  ElementLine(-106 504 -303 504 10)    
+  ElementLine(-303 504 -303 260 10)
+  ElementArc(-120 0 20 20 0 360 20) 
+)
diff --git a/Combined/footprints/Molex_39-30-3036.fp b/Combined/footprints/Molex_39-30-3036.fp
new file mode 100644
index 0000000..41a4cbd
--- /dev/null
+++ b/Combined/footprints/Molex_39-30-3036.fp
@@ -0,0 +1,15 @@
+Element (0x00 "Molex Element 39-30-3036" "" "" 0 0 0 100 0 100 0x00)
+(
+  Pin(165 0 100 60 120 80 "1" "1" 0x0101)
+  Pin(0 0 100 60 120 80 "2" "2" 0x0101)
+  Pin(-165 0 100 60 120 80 "3" "3" 0x0101)
+  Pin(-165 287 125 0 150 125 "Mounting Hole" "1" 0x8)
+  Pin(165 287 125 0 150 125 "Mounting Hole" "1" 0x8)
+  ElementLine(-220 -50 220 -50 10)
+  ElementLine(220 -50 220 550 10)
+  ElementLine(220 550 -220 550 10)
+  ElementLine(-220 550 -220 -50 10)
+  ElementLine(150 550 150 400 10)
+  ElementLine(150 400 180 400 10)
+  ElementLine(180 400 180 550 10)
+)
diff --git a/Combined/footprints/NICHICON_WT_CAP_4_5p4.fp b/Combined/footprints/NICHICON_WT_CAP_4_5p4.fp
new file mode 100644
index 0000000..fa69cbc
--- /dev/null
+++ b/Combined/footprints/NICHICON_WT_CAP_4_5p4.fp
@@ -0,0 +1,78 @@
+
+	
+	# max pin width (perpendicular to axis of package) (1/100 mil)
+	
+
+	# max pin length (parallel to axis of package) (1/100 mil)
+	
+
+	# gap between the pads (1/100 mil)
+	
+
+	# package width (1/100 mil)
+	
+
+	# package height (1/100 mil)
+	
+
+	# component veritcal height off board (1/100 mil)
+	
+
+	# pad width and length
+	
+	
+
+	# y values for drawing the pad.  The Y center of the pad is 0.5*(PINL + PINS)
+	# we need a line segment of length PADL - PADW so we have end points:
+	# 0.5*(PINL + PINS) +/- 0.5*(PADL - PADW)
+	
+	
+
+	# width of soldermask relief (5 mil on each side)
+	
+
+	# silkscreen width (1/100 mils)
+	
+
+	# how much space to leave around the part before the
+	# silk screen (1/100 mils)
+	
+
+	# lower left corner for silk screen (1/100 mil)
+	
+	
+
+	# upper right corner for silk screen (1/100 mil)
+	
+	
+
+	# how much to notch the corners by in silk to indicate polarity
+	
+	
+	
+
+# Element [SFlags "Desc" "Name" "Value" MX MY TX TY TDir TScale TSFlags]
+Element[ "" "Description_nichicon_NICHICON_WT_CAP_4_5p4" "" "`NICHICON_WT_CAP_4_5p4'" 0 0 0 0 0 100 ""]
+(
+
+# Pad [rX1 rY1 rX2 rY2 Thickness Clearance Mask "Name" "Number" SFlags]                                                                                              
+Pad[ 0 -8268 0 -3543 5149 1000 6149 "Plus"  "1" "square"]
+Pad[ 0  8268 0  3543 5149 1000 6149 "Minus" "2" "square"]
+
+# Silk screen around package
+# ElementLine[ x1 y1 x2 y2 width]
+
+ElementLine[ 10158    10158     3874    10158    1000]
+ElementLine[ 10158    10158     10158    -7158 1000]
+ElementLine[ 10158    -7158  7158 -10158    1000]
+ElementLine[ 7158 -10158     3874    -10158    1000]
+
+ElementLine[ -10158    10158    -3874    10158    1000]
+ElementLine[ -10158    10158    -10158    -7158 1000]
+ElementLine[ -10158    -7158 -7158 -10158    1000]
+ElementLine[ -7158 -10158    -3874    -10158    1000]
+
+
+
+)
+
diff --git a/Combined/footprints/NICHICON_WT_CAP_8_10.fp b/Combined/footprints/NICHICON_WT_CAP_8_10.fp
new file mode 100644
index 0000000..b27b4e1
--- /dev/null
+++ b/Combined/footprints/NICHICON_WT_CAP_8_10.fp
@@ -0,0 +1,78 @@
+
+	
+	# max pin width (perpendicular to axis of package) (1/100 mil)
+	
+
+	# max pin length (parallel to axis of package) (1/100 mil)
+	
+
+	# gap between the pads (1/100 mil)
+	
+
+	# package width (1/100 mil)
+	
+
+	# package height (1/100 mil)
+	
+
+	# component veritcal height off board (1/100 mil)
+	
+
+	# pad width and length
+	
+	
+
+	# y values for drawing the pad.  The Y center of the pad is 0.5*(PINL + PINS)
+	# we need a line segment of length PADL - PADW so we have end points:
+	# 0.5*(PINL + PINS) +/- 0.5*(PADL - PADW)
+	
+	
+
+	# width of soldermask relief (5 mil on each side)
+	
+
+	# silkscreen width (1/100 mils)
+	
+
+	# how much space to leave around the part before the
+	# silk screen (1/100 mils)
+	
+
+	# lower left corner for silk screen (1/100 mil)
+	
+	
+
+	# upper right corner for silk screen (1/100 mil)
+	
+	
+
+	# how much to notch the corners by in silk to indicate polarity
+	
+	
+	
+
+# Element [SFlags "Desc" "Name" "Value" MX MY TX TY TDir TScale TSFlags]
+Element[ "" "Description_nichicon_NICHICON_WT_CAP_8_10" "" "`NICHICON_WT_CAP_8_10'" 0 0 0 0 0 100 ""]
+(
+
+# Pad [rX1 rY1 rX2 rY2 Thickness Clearance Mask "Name" "Number" SFlags]                                                                                              
+Pad[ 0 -16141 0 -8267 6330 1000 7330 "Plus"  "1" "square"]
+Pad[ 0  16141 0  8267 6330 1000 7330 "Minus" "2" "square"]
+
+# Silk screen around package
+# ElementLine[ x1 y1 x2 y2 width]
+
+ElementLine[ 18032    18032     4465    18032    1000]
+ElementLine[ 18032    18032     18032    -15032 1000]
+ElementLine[ 18032    -15032  15032 -18032    1000]
+ElementLine[ 15032 -18032     4465    -18032    1000]
+
+ElementLine[ -18032    18032    -4465    18032    1000]
+ElementLine[ -18032    18032    -18032    -15032 1000]
+ElementLine[ -18032    -15032 -15032 -18032    1000]
+ElementLine[ -15032 -18032    -4465    -18032    1000]
+
+
+
+)
+
diff --git a/Combined/gafrc b/Combined/gafrc
new file mode 100644
index 0000000..1619aae
--- /dev/null
+++ b/Combined/gafrc
@@ -0,0 +1,5 @@
+ (component-library "./symbols") 
+ (source-library ".")
+
+ 
+ 
diff --git a/Combined/isolation.sch b/Combined/isolation.sch
new file mode 100644
index 0000000..567ddf0
--- /dev/null
+++ b/Combined/isolation.sch
@@ -0,0 +1,235 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+C 42100 47700 1 0 0 MAX18450.sym
+{
+T 43100 47900 5 10 1 1 0 0 1
+refdes=U1
+T 43400 48595 5 10 0 1 90 0 1
+footprint=QSOP16.fp
+}
+C 41700 41400 1 0 0 crystal_oscillator.sym
+{
+T 41995 42495 5 10 1 1 0 0 1
+refdes=OSC1
+T 42695 41995 5 10 1 1 0 0 1
+value=16MHz
+T 41700 41400 5 10 0 0 0 0 1
+description=Crystal Technologies CB3LV-3I-16M0000 16MHz, HCMOS TTL ,surface mount crystal clock oscillator
+T 41700 41400 5 10 0 0 0 0 1
+footprint=CB3_OSC.fp
+}
+C 45900 41000 1 0 0 clock_driver.sym
+{
+T 46200 41300 5 8 1 1 0 0 1
+refdes=CD1
+T 45895 40995 5 8 0 1 0 0 1
+model-name=551MLFT
+T 45900 41000 5 10 0 0 0 0 1
+footprint=ICS551.fp
+T 45900 41000 5 10 0 0 0 0 1
+description=Integrated Device Tech 551MLFT IC CLK BUFFER 1:4 160MHZ 8SOIC
+}
+C 40100 43700 1 270 0 gnd-2.sym
+C 40300 43400 1 0 0 capacitor-1.sym
+{
+T 40500 44100 5 10 0 0 0 0 1
+device=CAPACITOR
+T 40400 43700 5 10 1 1 0 0 1
+refdes=C1
+T 40500 44300 5 10 0 0 0 0 1
+symversion=0.1
+T 40800 43400 5 10 1 1 0 0 1
+value=10nF
+T 40300 43400 5 10 0 0 0 0 1
+model=GRM155R71H103KA88D
+T 40300 43400 5 10 0 0 0 0 1
+description=Murata 10nF 0402 ceramic capacitor
+T 40300 43400 5 10 0 0 0 0 1
+footprint=0402.fp
+}
+N 40300 43600 40400 43600 4
+N 42200 43400 42200 43600 4
+C 41600 42300 1 90 0 resistor.sym
+{
+T 41200 42600 5 10 0 0 90 0 1
+device=RESISTOR
+T 41425 42400 5 10 1 1 90 0 1
+refdes=R2
+T 41425 42800 5 10 1 1 90 0 1
+value=10KΩ
+}
+N 41700 41800 41500 41800 4
+N 41500 41800 41500 42500 4
+N 41500 42900 41500 43600 4
+N 44300 43000 44900 43000 4
+N 44900 42000 45900 42000 4
+N 47000 43300 47000 43600 4
+C 41000 43600 1 0 0 5V_motor.sym
+{
+T 41100 44300 5 10 0 0 0 0 1
+device=none
+}
+T 44400 40800 9 10 1 0 0 0 2
+Note 1 - 551MLFT OE input
+               is pulled up internally.
+C 43800 41100 1 0 0 gnd-2.sym
+C 46900 40700 1 0 0 gnd-2.sym
+N 42200 43600 41200 43600 4
+C 45700 43700 1 270 0 gnd-2.sym
+N 46100 43600 46000 43600 4
+C 46800 43600 1 0 0 5V_motor.sym
+{
+T 46900 44300 5 10 0 0 0 0 1
+device=none
+}
+C 50300 42100 1 0 0 clock_driver.sym
+{
+T 50295 42095 5 8 0 1 0 0 1
+model-name=551MLFT
+T 50300 42100 5 10 0 0 0 0 1
+footprint=ICS551.fp
+T 50300 42100 5 10 0 0 0 0 1
+description=Integrated Device Tech 551MLFT IC CLK BUFFER 1:4 160MHZ 8SOIC
+T 50600 42400 5 8 1 1 0 0 1
+refdes=CD2
+}
+N 51400 44400 51400 44700 4
+C 51300 41800 1 0 0 gnd-2.sym
+C 50100 44800 1 270 0 gnd-2.sym
+N 50500 44700 50400 44700 4
+C 51200 44700 1 0 0 5V_motor.sym
+{
+T 51300 45400 5 10 0 0 0 0 1
+device=none
+}
+T 52100 41600 9 10 1 0 0 0 2
+Note 2 - CD2 and C3 are only provided if
+               all five motor drivers are equipped.
+C 53000 43500 1 0 0 output-1.sym
+{
+T 53100 43800 5 10 0 0 0 0 1
+device=OUTPUT
+T 53200 43500 5 10 1 1 0 0 1
+refdes=clk_5
+}
+C 48500 42400 1 0 0 output-1.sym
+{
+T 48600 42700 5 10 0 0 0 0 1
+device=OUTPUT
+T 48700 42400 5 10 1 1 0 0 1
+refdes=clk_1
+}
+C 48500 42200 1 0 0 output-1.sym
+{
+T 48600 42500 5 10 0 0 0 0 1
+device=OUTPUT
+T 48700 42200 5 10 1 1 0 0 1
+refdes=clk_2
+}
+C 48500 42000 1 0 0 output-1.sym
+{
+T 48600 42300 5 10 0 0 0 0 1
+device=OUTPUT
+T 48700 42000 5 10 1 1 0 0 1
+refdes=clk_3
+}
+C 48500 41800 1 0 0 output-1.sym
+{
+T 48600 42100 5 10 0 0 0 0 1
+device=OUTPUT
+T 48700 41800 5 10 1 1 0 0 1
+refdes=clk_4
+}
+N 52500 43600 53000 43600 4
+N 48100 42500 48500 42500 4
+N 48100 42300 48500 42300 4
+N 48100 42100 48500 42100 4
+N 48100 41900 48500 41900 4
+N 50300 42900 49500 42900 4
+N 49500 42900 49500 44500 4
+N 49500 44500 44900 44500 4
+N 44900 44500 44900 42000 4
+C 40300 49200 1 0 0 input-1.sym
+{
+T 40300 49500 5 10 0 0 0 0 1
+device=INPUT
+T 40300 49200 5 10 1 1 0 0 1
+refdes=step_x
+}
+C 40300 48800 1 0 0 input-1.sym
+{
+T 40300 49100 5 10 0 0 0 0 1
+device=INPUT
+T 40300 48800 5 10 1 1 0 0 1
+refdes=dir_x
+}
+C 40300 48000 1 0 0 input-1.sym
+{
+T 40300 48300 5 10 0 0 0 0 1
+device=INPUT
+T 40300 48000 5 10 1 1 0 0 1
+refdes=enable_x
+}
+C 40300 47600 1 0 0 input-1.sym
+{
+T 40300 47900 5 10 0 0 0 0 1
+device=INPUT
+T 40300 47600 5 10 1 1 0 0 1
+refdes=spi_cs_x
+}
+C 41100 48400 1 0 1 output-1.sym
+{
+T 41000 48700 5 10 0 0 0 6 1
+device=OUTPUT
+T 40300 48400 5 10 1 1 0 0 1
+refdes=fault_a
+}
+N 41100 49300 41700 49300 4
+N 41700 49300 41700 49000 4
+N 41700 49000 42100 49000 4
+N 41100 48900 41500 48900 4
+N 41500 48900 41500 48800 4
+N 41500 48800 42100 48800 4
+N 41100 48500 41700 48500 4
+N 41700 48500 41700 48600 4
+N 41700 48600 42100 48600 4
+N 41100 48100 41700 48100 4
+N 41700 48100 41700 48200 4
+N 41700 48200 42100 48200 4
+N 41100 47700 41700 47700 4
+N 42100 48000 41700 48000 4
+N 41700 48000 41700 47700 4
+C 46100 43400 1 0 0 capacitor-1.sym
+{
+T 46300 44100 5 10 0 0 0 0 1
+device=CAPACITOR
+T 46200 43700 5 10 1 1 0 0 1
+refdes=C2
+T 46300 44300 5 10 0 0 0 0 1
+symversion=0.1
+T 46600 43400 5 10 1 1 0 0 1
+value=10nF
+T 46100 43400 5 10 0 0 0 0 1
+model=GRM155R71H103KA88D
+T 46100 43400 5 10 0 0 0 0 1
+description=Murata 10nF 0402 ceramic capacitor
+T 46100 43400 5 10 0 0 0 0 1
+footprint=0402.fp
+}
+C 50500 44500 1 0 0 capacitor-1.sym
+{
+T 50700 45200 5 10 0 0 0 0 1
+device=CAPACITOR
+T 50600 44800 5 10 1 1 0 0 1
+refdes=C3
+T 50700 45400 5 10 0 0 0 0 1
+symversion=0.1
+T 51000 44500 5 10 1 1 0 0 1
+value=10nF
+T 50500 44500 5 10 0 0 0 0 1
+model=GRM155R71H103KA88D
+T 50500 44500 5 10 0 0 0 0 1
+description=Murata 10nF 0402 ceramic capacitor
+T 50500 44500 5 10 0 0 0 0 1
+footprint=0402.fp
+}
diff --git a/Combined/microprocessor.sch b/Combined/microprocessor.sch
new file mode 100644
index 0000000..1bd69a0
--- /dev/null
+++ b/Combined/microprocessor.sch
@@ -0,0 +1,459 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+C 45600 41200 1 0 0 gnd.sym
+N 45400 41800 45400 41500 4
+N 45400 41500 46900 41500 4
+N 45700 41800 45700 41500 4
+N 46000 41800 46000 41500 4
+N 46900 41800 46900 41500 4
+N 46600 41800 46600 41500 4
+N 46300 41800 46300 41500 4
+N 45500 50200 45500 50400 4
+N 45000 50400 46700 50400 4
+N 46700 50200 46700 50400 4
+N 46400 50200 46400 50400 4
+N 46100 50200 46100 50400 4
+N 45800 50200 45800 50400 4
+C 47450 41100 1 0 0 crystal.sym
+{
+T 47650 41600 5 10 0 0 0 0 1
+device=CRYSTAL
+T 47500 41350 5 10 1 1 0 0 1
+refdes=X1
+T 47650 41800 5 10 0 0 0 0 1
+symversion=0.1
+T 47350 40950 5 10 1 1 0 0 1
+value=16MHz
+}
+C 47400 40500 1 90 0 cap.sym
+{
+T 46700 40700 5 10 0 0 90 0 1
+device=CAPACITOR
+T 46900 40800 5 10 1 1 0 0 1
+refdes=C2
+T 46500 40700 5 10 0 0 90 0 1
+symversion=0.1
+T 47150 40700 5 10 1 1 180 0 1
+value=22pF
+T 47400 40500 5 10 0 0 90 0 1
+footprint=0603
+}
+C 48100 40500 1 90 0 cap.sym
+{
+T 47400 40700 5 10 0 0 90 0 1
+device=CAPACITOR
+T 48150 40800 5 10 1 1 0 0 1
+refdes=C3
+T 47200 40700 5 10 0 0 90 0 1
+symversion=0.1
+T 48600 40700 5 10 1 1 180 0 1
+value=22pF
+T 48100 40500 5 10 0 0 270 0 1
+footprint=0603
+}
+N 48000 41000 48000 41800 4
+N 48000 41800 47800 41800 4
+N 47300 41000 47300 41800 4
+N 47300 41800 47500 41800 4
+C 45900 50400 1 0 0 3.3V-plus.sym
+C 41000 40400 1 0 0 pdi.sym
+{
+T 41300 42300 5 10 1 1 0 0 1
+refdes=ISP
+T 41000 40400 5 10 0 0 0 0 1
+footprint=HEADER6_1
+}
+N 44600 41800 44600 41500 4
+N 44600 41500 42800 41500 4
+N 42800 41500 42800 42000 4
+N 42800 42000 42200 42000 4
+N 42200 40800 44900 40800 4
+N 44900 40800 44900 41800 4
+C 42500 40400 1 90 0 gnd.sym
+C 42500 41500 1 180 0 nc.sym
+{
+T 42400 41000 5 10 0 0 180 0 1
+value=NoConnection
+T 42400 40800 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 42500 41200 1 180 0 nc.sym
+{
+T 42400 40700 5 10 0 0 180 0 1
+value=NoConnection
+T 42400 40500 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 42400 41900 1 270 0 3.3V-plus.sym
+N 42400 41700 42200 41700 4
+N 45000 50200 45000 50400 4
+C 44000 43800 1 180 0 output.sym
+{
+T 43900 43500 5 10 0 0 180 0 1
+device=OUTPUT
+T 42600 43700 5 10 1 1 0 0 1
+refdes=serial_tx
+}
+C 43200 43900 1 0 0 input.sym
+{
+T 43200 44200 5 10 0 0 0 0 1
+device=INPUT
+T 42600 44000 5 10 1 1 0 0 1
+refdes=serial_rx
+}
+C 44000 43200 1 180 0 output.sym
+{
+T 43900 42900 5 10 0 0 180 0 1
+device=OUTPUT
+T 42800 43100 5 10 1 1 0 0 1
+refdes=spi_clk
+}
+C 44000 42600 1 180 0 output.sym
+{
+T 43900 42300 5 10 0 0 180 0 1
+device=OUTPUT
+T 42700 42500 5 10 1 1 0 0 1
+refdes=spi_mosi
+}
+C 43200 42700 1 0 0 input.sym
+{
+T 43200 43000 5 10 0 0 0 0 1
+device=INPUT
+T 42700 42800 5 10 1 1 0 0 1
+refdes=spi_miso
+}
+C 49100 42600 1 180 0 input.sym
+{
+T 49100 42300 5 10 0 0 180 0 1
+device=INPUT
+T 48900 42500 5 10 1 1 0 0 1
+refdes=a_max
+}
+C 49100 42900 1 180 0 input.sym
+{
+T 49100 42600 5 10 0 0 180 0 1
+device=INPUT
+T 48900 42800 5 10 1 1 0 0 1
+refdes=a_min
+}
+C 49100 45200 1 180 0 input.sym
+{
+T 49100 44900 5 10 0 0 180 0 1
+device=INPUT
+T 48900 45100 5 10 1 1 0 0 1
+refdes=z_max
+}
+C 49100 45500 1 180 0 input.sym
+{
+T 49100 45200 5 10 0 0 180 0 1
+device=INPUT
+T 48900 45400 5 10 1 1 0 0 1
+refdes=z_min
+}
+C 49100 47800 1 180 0 input.sym
+{
+T 49100 47500 5 10 0 0 180 0 1
+device=INPUT
+T 48900 47700 5 10 1 1 0 0 1
+refdes=y_max
+}
+C 49100 48100 1 180 0 input.sym
+{
+T 49100 47800 5 10 0 0 180 0 1
+device=INPUT
+T 48900 48000 5 10 1 1 0 0 1
+refdes=y_min
+}
+C 43200 47900 1 0 0 input.sym
+{
+T 43200 48200 5 10 0 0 0 0 1
+device=INPUT
+T 42900 48000 5 10 1 1 0 0 1
+refdes=x_min
+}
+C 43200 47600 1 0 0 input.sym
+{
+T 43200 47900 5 10 0 0 0 0 1
+device=INPUT
+T 42900 47700 5 10 1 1 0 0 1
+refdes=x_max
+}
+C 48300 45600 1 0 0 output.sym
+{
+T 48400 45900 5 10 0 0 0 0 1
+device=OUTPUT
+T 48900 45700 5 10 1 1 0 0 1
+refdes=coolant
+}
+C 48300 48200 1 0 0 output.sym
+{
+T 48400 48500 5 10 0 0 0 0 1
+device=OUTPUT
+T 48800 48300 5 10 1 1 0 0 1
+refdes=spin_pwm
+}
+C 48300 43000 1 0 0 output.sym
+{
+T 48400 43300 5 10 0 0 0 0 1
+device=OUTPUT
+T 48900 43100 5 10 1 1 0 0 1
+refdes=spin_dir
+}
+C 44000 48400 1 180 0 output.sym
+{
+T 43900 48100 5 10 0 0 180 0 1
+device=OUTPUT
+T 42500 48300 5 10 1 1 0 0 1
+refdes=spin_enable
+}
+T 50000 40700 9 10 1 0 0 0 1
+Microprocessor
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+1
+T 51500 40100 9 10 1 0 0 0 1
+5
+C 48300 44700 1 180 1 output.sym
+{
+T 48400 44400 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 44600 5 10 1 1 0 0 1
+refdes=step_y
+}
+C 48300 44100 1 180 1 output.sym
+{
+T 48400 43800 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 44000 5 10 1 1 0 0 1
+refdes=enable_y
+}
+C 48300 44400 1 180 1 output.sym
+{
+T 48400 44100 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 44300 5 10 1 1 0 0 1
+refdes=dir_y
+}
+C 48300 47300 1 180 1 output.sym
+{
+T 48400 47000 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 47200 5 10 1 1 0 0 1
+refdes=step_z
+}
+C 48300 46700 1 180 1 output.sym
+{
+T 48400 46400 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 46600 5 10 1 1 0 0 1
+refdes=enable_z
+}
+C 48300 47000 1 180 1 output.sym
+{
+T 48400 46700 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 46900 5 10 1 1 0 0 1
+refdes=dir_z
+}
+C 48300 49900 1 180 1 output.sym
+{
+T 48400 49600 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 49800 5 10 1 1 0 0 1
+refdes=step_a
+}
+C 48300 49300 1 180 1 output.sym
+{
+T 48400 49000 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 49200 5 10 1 1 0 0 1
+refdes=enable_a
+}
+C 48300 49600 1 180 1 output.sym
+{
+T 48400 49300 5 10 0 0 180 6 1
+device=OUTPUT
+T 48900 49500 5 10 1 1 0 0 1
+refdes=dir_a
+}
+C 43200 44200 1 0 0 input.sym
+{
+T 43200 44500 5 10 0 0 0 0 1
+device=INPUT
+T 42600 44300 5 10 1 1 0 0 1
+refdes=serial_rts
+}
+C 44000 44700 1 180 0 output.sym
+{
+T 43900 44400 5 10 0 0 180 0 1
+device=OUTPUT
+T 42600 44600 5 10 1 1 0 0 1
+refdes=serial_cts
+}
+C 43800 41700 1 0 0 ATXmegaA3.sym
+{
+T 44200 51400 5 8 0 0 0 0 1
+symversion=1.0
+T 46000 47900 5 26 1 1 270 0 1
+description=ATXMEGA64A3U-AUR
+T 47200 50200 5 8 0 0 0 0 1
+footprint=TQFP64_14
+T 47800 50200 5 10 1 1 0 0 1
+refdes=U1
+}
+C 48300 48800 1 0 0 output.sym
+{
+T 48400 49100 5 10 0 0 0 0 1
+device=OUTPUT
+T 48900 48900 5 10 1 1 0 0 1
+refdes=spi_cs_a
+}
+C 48300 46200 1 0 0 output.sym
+{
+T 48400 46500 5 10 0 0 0 0 1
+device=OUTPUT
+T 48900 46300 5 10 1 1 0 0 1
+refdes=spi_cs_z
+}
+C 48300 43600 1 0 0 output.sym
+{
+T 48400 43900 5 10 0 0 0 0 1
+device=OUTPUT
+T 48900 43700 5 10 1 1 0 0 1
+refdes=spi_cs_y
+}
+C 44000 47300 1 180 0 io.sym
+{
+T 43800 46700 5 10 0 0 180 0 1
+device=none
+T 42500 47200 5 10 1 1 0 0 1
+refdes=step_b/PB0
+}
+C 44000 47000 1 180 0 io.sym
+{
+T 43800 46400 5 10 0 0 180 0 1
+device=none
+T 42600 46900 5 10 1 1 0 0 1
+refdes=dir_b/PB1
+}
+C 44000 46700 1 180 0 io.sym
+{
+T 43800 46100 5 10 0 0 180 0 1
+device=none
+T 42300 46600 5 10 1 1 0 0 1
+refdes=enable_b/PB2
+}
+C 44000 46400 1 180 0 io.sym
+{
+T 43800 45800 5 10 0 0 180 0 1
+device=none
+T 42500 46300 5 10 1 1 0 0 1
+refdes=spi_cs_b/PB3
+}
+C 44000 46100 1 180 0 io.sym
+{
+T 43800 45500 5 10 0 0 180 0 1
+device=none
+T 42500 46000 5 10 1 1 0 0 1
+refdes=fault_b/PB4
+}
+C 44000 45500 1 180 0 io.sym
+{
+T 43800 44900 5 10 0 0 180 0 1
+device=none
+T 42500 45400 5 10 1 1 0 0 1
+refdes=b_min/PB6
+}
+C 44000 45200 1 180 0 io.sym
+{
+T 43800 44600 5 10 0 0 180 0 1
+device=none
+T 42500 45100 5 10 1 1 0 0 1
+refdes=b_max/PB7
+}
+C 47550 40200 1 0 0 gnd.sym
+C 44500 50300 1 0 0 cap.sym
+{
+T 44700 51000 5 10 0 0 0 0 1
+device=CAPACITOR
+T 44900 50650 5 10 1 1 180 0 1
+refdes=C1
+T 44700 51200 5 10 0 0 0 0 1
+symversion=0.1
+T 44500 50150 5 10 1 1 0 0 1
+value=0.1uF
+T 44500 50300 5 10 0 0 0 0 1
+footprint=0603
+}
+C 44300 50500 1 270 0 gnd.sym
+C 43200 43300 1 0 0 input.sym
+{
+T 43200 43600 5 10 0 0 0 0 1
+device=INPUT
+T 42500 43400 5 10 1 1 0 0 1
+refdes=spi_cs_avr
+}
+N 48000 41200 47850 41200 4
+N 47300 41200 47450 41200 4
+N 48000 40500 47300 40500 4
+N 47300 40500 47300 40600 4
+N 48000 40500 48000 40600 4
+C 44000 49900 1 180 0 output.sym
+{
+T 43900 49600 5 10 0 0 180 0 1
+device=OUTPUT
+T 42900 49800 5 10 1 1 0 0 1
+refdes=step_x
+}
+C 44000 49600 1 180 0 output.sym
+{
+T 43900 49300 5 10 0 0 180 0 1
+device=OUTPUT
+T 43000 49500 5 10 1 1 0 0 1
+refdes=dir_x
+}
+C 44000 49300 1 180 0 output.sym
+{
+T 43900 49000 5 10 0 0 180 0 1
+device=OUTPUT
+T 42700 49200 5 10 1 1 0 0 1
+refdes=enable_x
+}
+C 44000 49000 1 180 0 output.sym
+{
+T 43900 48700 5 10 0 0 180 0 1
+device=OUTPUT
+T 42700 48900 5 10 1 1 0 0 1
+refdes=spi_cs_x
+}
+C 49100 48700 1 180 0 input.sym
+{
+T 49100 48400 5 10 0 0 180 0 1
+device=INPUT
+T 48900 48600 5 10 1 1 0 0 1
+refdes=fault_a
+}
+C 43200 48500 1 0 0 input.sym
+{
+T 43200 48800 5 10 0 0 0 0 1
+device=INPUT
+T 42900 48600 5 10 1 1 0 0 1
+refdes=fault_x
+}
+C 49100 46100 1 180 0 input.sym
+{
+T 49100 45800 5 10 0 0 180 0 1
+device=INPUT
+T 48900 46000 5 10 1 1 0 0 1
+refdes=fault_z
+}
+C 49100 43500 1 180 0 input.sym
+{
+T 49100 43200 5 10 0 0 180 0 1
+device=INPUT
+T 48900 43400 5 10 1 1 0 0 1
+refdes=fault_y
+}
diff --git a/Combined/motor_driver.sch b/Combined/motor_driver.sch
new file mode 100644
index 0000000..6ad1775
--- /dev/null
+++ b/Combined/motor_driver.sch
@@ -0,0 +1,352 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+T 50000 40700 9 10 1 0 0 0 1
+Motor Driver
+C 46700 48700 1 270 0 nc.sym
+{
+T 47200 48300 5 10 0 0 270 0 1
+value=NoConnection
+T 47400 48300 5 10 0 0 270 0 1
+device=DRC_Directive
+}
+C 47000 48700 1 270 0 nc.sym
+{
+T 47500 48300 5 10 0 0 270 0 1
+value=NoConnection
+T 47700 48300 5 10 0 0 270 0 1
+device=DRC_Directive
+}
+C 45500 45100 1 0 0 nc.sym
+{
+T 45500 45500 5 10 0 0 0 0 1
+value=NoConnection
+T 45500 45900 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+N 51400 47800 51400 46600 4
+N 51400 46300 51400 45400 4
+N 48600 44000 49500 44000 4
+N 47100 44000 48300 44000 4
+N 51400 46700 55000 46700 4
+N 51200 46300 55000 46300 4
+N 53800 45900 53800 42600 4
+N 53800 42600 48600 42600 4
+N 54300 45500 54300 42500 4
+N 48300 42500 54300 42500 4
+N 47500 48600 48100 48600 4
+C 49600 48700 1 90 0 cap.sym
+{
+T 48900 48900 5 10 0 0 90 0 1
+device=CAPACITOR
+T 49450 48600 5 10 1 1 90 0 1
+refdes=C11
+T 48700 48900 5 10 0 0 90 0 1
+symversion=0.1
+T 49450 49050 5 10 1 1 90 0 1
+value=100nF
+T 49600 48700 5 10 0 0 0 0 1
+footprint=0603.fp
+T 49600 48700 5 10 0 0 0 0 1
+description=Kemet C0603C104M5RACTU 0603 ceramic 50 volt cap
+}
+C 50900 49800 1 180 0 cap.sym
+{
+T 50700 49100 5 10 0 0 180 0 1
+device=CAPACITOR
+T 50200 49750 5 10 1 1 0 0 1
+refdes=C12
+T 50700 48900 5 10 0 0 180 0 1
+symversion=0.1
+T 50700 49750 5 10 1 1 0 0 1
+value=100nF
+T 50750 49500 5 10 1 1 0 0 1
+value=50v
+T 50900 49800 5 10 0 0 0 0 1
+footprint=0603.fp
+T 50900 49800 5 10 0 0 0 0 1
+description=Kemet C0603C104M5RACTU 0603 ceramic 50 volt cap
+}
+C 48500 49200 1 180 0 cap.sym
+{
+T 48300 48500 5 10 0 0 180 0 1
+device=CAPACITOR
+T 47900 49150 5 10 1 1 0 0 1
+refdes=C9
+T 48300 48300 5 10 0 0 180 0 1
+symversion=0.1
+T 48750 49300 5 10 1 1 180 0 1
+value=100nF
+T 48500 49200 5 10 0 0 0 0 1
+footprint=0603.fp
+T 48500 49200 5 10 0 0 0 0 1
+description=Kemet C0603C104M5RACTU 0603 ceramic 50 volt cap
+}
+N 48600 49100 48600 48400 4
+C 50550 43900 1 180 0 resistor.sym
+{
+T 50250 43500 5 10 0 0 180 0 1
+device=RESISTOR
+T 50050 43900 5 10 1 1 0 0 1
+refdes=R2
+T 50250 43725 5 10 1 1 180 0 1
+value=22
+T 50550 43900 5 10 0 0 0 0 1
+footprint=0402.fp
+T 50550 43900 5 10 0 0 0 0 1
+description=Yageo RC0402JR-0722RL 22 Ohm 0402 SMD resistor
+}
+N 48600 42600 48600 44200 4
+C 50500 43100 1 90 0 cap.sym
+{
+T 49800 43300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 50800 43600 5 10 1 1 180 0 1
+refdes=C15
+T 49600 43300 5 10 0 0 90 0 1
+symversion=0.1
+T 50450 43650 5 10 1 1 0 0 1
+value=10nF
+T 50500 43100 5 10 0 0 0 0 1
+description=Murata 10nF 0402 ceramic capacitor
+T 50500 43100 5 10 0 0 0 0 1
+footprint=0402.fp
+}
+C 50000 43000 1 90 0 resistor.sym
+{
+T 49600 43300 5 10 0 0 90 0 1
+device=RESISTOR
+T 49800 43300 5 10 1 1 180 0 1
+refdes=R4
+T 49825 43500 5 10 1 1 180 0 1
+value=.075
+T 50000 43000 5 10 0 1 90 0 1
+description=Stackpole Electronics CSRN2010FK75L0 75mOhm current sense resistor.
+T 50000 43000 5 10 0 0 0 0 1
+footprint=CSR2010.fp
+}
+N 48300 42500 48300 44200 4
+N 47100 44200 47100 44000 4
+N 47400 44200 47400 44000 4
+N 47700 44200 47700 44000 4
+N 48000 44200 48000 44000 4
+N 48900 44200 48900 44000 4
+N 49200 44200 49200 44000 4
+N 51200 47800 51400 47800 4
+N 51200 47500 51400 47500 4
+N 51200 47200 51400 47200 4
+N 51400 46900 51200 46900 4
+N 51200 46600 51400 46600 4
+N 51200 46000 51400 46000 4
+N 51200 45700 51400 45700 4
+N 51200 45400 51400 45400 4
+N 49500 48800 49500 48400 4
+N 49800 48400 49800 49700 4
+N 49500 49700 50400 49700 4
+N 50800 49700 51200 49700 4
+N 50400 48700 50400 48400 4
+N 50100 48400 50100 49700 4
+N 51200 49700 51200 49400 4
+N 49000 48400 49000 49500 4
+N 49000 49500 48400 49500 4
+N 47800 48600 47800 49500 4
+N 47800 49100 48000 49100 4
+N 46000 49500 48000 49500 4
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+1
+T 51500 40100 9 10 1 0 0 0 1
+1
+N 48400 49100 49000 49100 4
+N 49500 44200 49500 44000 4
+C 45800 44200 1 0 0 TMC2660.sym
+{
+T 48195 46195 5 10 1 1 0 0 1
+footprint=LQFP44_10
+T 50595 48195 5 10 1 1 0 0 1
+refdes=U3
+}
+N 47500 48600 47500 48400 4
+N 47800 48600 47800 48400 4
+N 48100 48600 48100 48400 4
+N 50400 48700 50100 48700 4
+N 49500 49200 49500 49700 4
+C 47900 49400 1 0 0 cap.sym
+{
+T 47900 50000 5 10 0 0 0 0 1
+device=CAPACITOR
+T 47900 49550 5 10 1 1 0 0 1
+refdes=C7
+T 47900 50200 5 10 0 0 0 0 1
+symversion=0.1
+T 48300 49550 5 10 1 1 0 0 1
+value=470nF
+T 47900 49400 5 10 0 0 0 0 1
+footprint=0402.fp
+T 47900 49400 5 10 0 0 0 0 1
+description=Murata GRM155R61A474KE15D 470nF 0402 10Volt ceramic cap
+}
+N 50000 44200 49900 44200 4
+N 49900 44200 49900 43600 4
+N 50300 44200 50400 44200 4
+N 50400 44200 50400 43600 4
+N 49900 43800 49950 43800 4
+N 50350 43800 50400 43800 4
+N 49900 43100 50400 43100 4
+C 51250 44500 1 0 0 resistor.sym
+{
+T 51550 44900 5 10 0 0 0 0 1
+device=RESISTOR
+T 51300 44650 5 10 1 1 0 0 1
+refdes=R3
+T 51700 44650 5 10 1 1 0 0 1
+value=22
+T 51250 44500 5 10 0 0 0 0 1
+footprint=0402.fp
+T 51250 44500 5 10 0 0 0 0 1
+description=Yageo RC0402JR-0722RL 22 Ohm 0402 SMD resistor
+}
+C 51300 44600 1 270 0 cap.sym
+{
+T 52000 44400 5 10 0 0 270 0 1
+device=CAPACITOR
+T 52200 44400 5 10 0 0 270 0 1
+symversion=0.1
+T 51325 44100 5 10 1 1 90 0 1
+refdes=C16
+T 51500 44450 5 10 1 1 270 0 1
+value=10nF
+T 51300 44600 5 10 0 0 0 0 1
+footprint=0402.fp
+T 51300 44600 5 10 0 0 0 0 1
+description=Murata 10nF 0402 ceramic capacitor
+}
+C 52700 45000 1 180 0 resistor.sym
+{
+T 52400 44600 5 10 0 0 180 0 1
+device=RESISTOR
+T 52700 45000 5 10 0 1 180 0 1
+description=1% 2W Thick Film
+T 51900 44900 5 10 1 1 0 0 1
+refdes=R5
+T 52425 44900 5 10 1 1 0 0 1
+value=.075
+T 52700 45000 5 10 0 0 0 0 1
+description=Stackpole Electronics CSRN2010FK75L0 75mOhm current sense resistor.
+T 52700 45000 5 10 0 0 0 0 1
+footprint=CSR2010.fp
+}
+N 50400 43100 50400 43200 4
+N 49900 43100 49900 43200 4
+C 55000 45100 1 0 0 connector4-2.sym
+{
+T 55300 47150 5 10 0 0 0 0 1
+device=CONNECTOR_4
+T 55000 45100 5 10 0 0 0 0 1
+footprint=Molex 39-03-0040.fp
+T 55700 47200 5 10 1 1 0 6 1
+refdes=J1
+}
+N 55000 45500 54300 45500 4
+N 55000 45900 53800 45900 4
+C 51100 49100 1 0 0 gnd-2.sym
+C 50100 42800 1 0 0 gnd-2.sym
+C 45900 48800 1 0 0 gnd-2.sym
+N 46000 49500 46000 49100 4
+C 44900 43200 1 0 0 gnd-2.sym
+N 45800 44900 45000 44900 4
+N 45000 44900 45000 43500 4
+C 52500 43600 1 0 0 gnd-2.sym
+C 48800 49500 1 0 0 5V_motor.sym
+{
+T 48900 50200 5 10 0 0 0 0 1
+device=none
+}
+C 43100 47500 1 0 0 input-1.sym
+{
+T 43100 47800 5 10 0 0 0 0 1
+device=INPUT
+T 43100 47500 5 10 1 1 0 0 1
+refdes=SCK
+}
+C 43100 47200 1 0 0 input-1.sym
+{
+T 43100 47500 5 10 0 0 0 0 1
+device=INPUT
+T 43100 47200 5 10 1 1 0 0 1
+refdes=MOSI
+}
+C 43100 46500 1 0 0 input-1.sym
+{
+T 43100 46800 5 10 0 0 0 0 1
+device=INPUT
+T 43100 46500 5 10 1 1 0 0 1
+refdes=CLK
+}
+C 43100 46200 1 0 0 input-1.sym
+{
+T 43100 46500 5 10 0 0 0 0 1
+device=INPUT
+T 43100 46200 5 10 1 1 0 0 1
+refdes=ENN
+}
+C 43100 45800 1 0 0 input-1.sym
+{
+T 43100 46100 5 10 0 0 0 0 1
+device=INPUT
+T 43100 45800 5 10 1 1 0 0 1
+refdes=DIR
+}
+C 43100 45500 1 0 0 input-1.sym
+{
+T 43100 45800 5 10 0 0 0 0 1
+device=INPUT
+T 43100 45500 5 10 1 1 0 0 1
+refdes=STEP
+}
+C 43900 46900 1 0 1 output-1.sym
+{
+T 43800 47200 5 10 0 0 0 6 1
+device=OUTPUT
+T 43200 46900 5 10 1 1 0 0 1
+refdes=MISO
+}
+C 43900 44500 1 0 1 output-1.sym
+{
+T 43800 44800 5 10 0 0 0 6 1
+device=OUTPUT
+T 43100 44500 5 10 1 1 0 0 1
+refdes=FAULT
+}
+N 45800 44600 43900 44600 4
+N 45800 45600 43900 45600 4
+N 45800 45900 43900 45900 4
+N 43900 46300 45800 46300 4
+N 45800 46600 43900 46600 4
+N 43900 47000 45800 47000 4
+N 43900 47300 45800 47300 4
+N 43900 47600 45800 47600 4
+N 43900 47900 45800 47900 4
+N 51200 44900 52100 44900 4
+N 52500 44900 52600 44900 4
+N 52600 44900 52600 43900 4
+N 51200 44600 51450 44600 4
+N 51900 44600 51850 44600 4
+N 51400 44500 51400 44600 4
+N 51400 44100 51400 44000 4
+N 51900 44600 51900 44900 4
+C 51300 43700 1 0 0 gnd-2.sym
+C 49600 49700 1 0 0 Vs.sym
+{
+T 49700 50400 5 10 0 0 0 0 1
+device=none
+}
+C 43100 47800 1 0 0 input-1.sym
+{
+T 43100 48100 5 10 0 0 0 0 1
+device=INPUT
+T 43100 47800 5 10 1 1 0 0 1
+refdes=CSN
+}
diff --git a/Combined/power.sch b/Combined/power.sch
new file mode 100644
index 0000000..21dea52
--- /dev/null
+++ b/Combined/power.sch
@@ -0,0 +1,258 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+T 50000 40700 9 10 1 0 0 0 1
+Power
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+3
+T 51500 40100 9 10 1 0 0 0 1
+5
+C 43100 41900 1 0 0 pwrjack-1.sym
+{
+T 43200 42400 5 10 0 0 0 0 1
+device=PWRJACK
+T 43100 42400 5 10 1 1 0 0 1
+refdes=J2
+T 43100 41900 5 10 0 0 0 6 1
+footprint=Molex_39-29-1027.fp
+T 44000 41600 5 10 1 1 0 6 1
+description=12V-36V DC
+T 43100 41900 5 10 0 0 0 0 1
+description=Molex 39-29-1027 two -pin right angle header with pin 1 above pin 2
+}
+T 44600 50000 9 10 1 0 0 0 1
+5V 2A Regulator
+C 44400 49000 1 0 0 IRM-10.sym
+{
+T 45455 49805 5 10 1 1 180 0 1
+device=IRM-10-5
+T 45755 50105 5 10 0 0 180 0 1
+footprint=IRM-10-5.fp
+T 45595 49670 5 10 1 1 0 0 1
+refdes=U100
+}
+C 44600 46100 1 0 0 IRM-10.sym
+{
+T 45955 47205 5 10 0 0 180 0 1
+footprint=IRM-10-5.fp
+T 45655 46905 5 10 1 1 180 0 1
+device=IRM-10-5
+T 45795 46770 5 10 1 1 0 0 1
+refdes=U101
+}
+N 46300 45600 46300 46200 4
+N 46300 46500 47400 46500 4
+T 44800 47100 9 10 1 0 0 0 1
+5V 2A Regulator
+N 42300 48000 43700 48000 4
+{
+T 42500 48000 5 10 1 1 0 0 1
+netname=Line
+}
+N 42300 47700 44400 47700 4
+{
+T 42400 47700 5 10 1 1 0 0 1
+netname=Neutral
+}
+C 44000 44400 1 0 0 gnd.sym
+C 44700 44400 1 0 0 gnd-2.sym
+N 44600 46500 43700 46500 4
+N 43700 46500 43700 49400 4
+N 44600 46200 43300 46200 4
+N 43300 46200 43300 47700 4
+C 43100 45400 1 0 0 resistor.sym
+{
+T 43400 45800 5 10 0 0 0 0 1
+device=RESISTOR
+T 43200 45575 5 10 0 1 0 0 1
+footprint=RESC3225M.fp
+T 43600 45575 5 10 1 1 0 0 1
+value=0Ω
+T 43100 45600 5 10 1 1 0 0 1
+refdes=R1
+T 43100 45400 5 10 0 0 0 0 1
+description=Stackpole Electronics RMCF1210ZT0R00 0 Ohm jumper, 3225 fp
+}
+N 42500 44900 43300 44900 4
+N 43700 44900 44100 44900 4
+N 44100 44900 44100 44700 4
+N 43700 45500 44800 45500 4
+N 44800 44700 44800 45600 4
+C 47200 46500 1 0 0 5V_motor.sym
+{
+T 47300 47200 5 10 0 0 0 0 1
+device=none
+}
+C 41900 43400 1 0 0 CHASSIS_GND.sym
+N 43300 45500 42500 45500 4
+N 42500 44900 42500 47400 4
+C 43100 44800 1 0 0 resistor.sym
+{
+T 43400 45200 5 10 0 0 0 0 1
+device=RESISTOR
+T 43200 44975 5 10 0 1 0 0 1
+footprint=RESC3225M.fp
+T 43600 44975 5 10 1 1 0 0 1
+value=0Ω
+T 43100 45000 5 10 1 1 0 0 1
+refdes=R2
+T 43100 44800 5 10 0 0 0 0 1
+description=Stackpole Electronics RMCF1210ZT0R00 0 Ohm jumper, 3225 fp
+}
+C 40600 47200 1 0 0 connector3-1.sym
+{
+T 42400 48100 5 10 0 0 0 0 1
+device=CONNECTOR_3
+T 40600 48300 5 10 1 1 0 0 1
+refdes=J1
+T 40300 47000 5 10 1 1 0 0 1
+description=85V-264V AC
+T 40600 47200 5 10 0 0 0 0 1
+description=Molex 172648-0103 three-pin, right angle male header.  Mates with Molex 50-29-1662.  Both parts currently available at mouser.com
+T 40600 47200 5 10 0 0 0 0 1
+footprint=Molex_39-30-3036.fp
+}
+N 42300 47400 42500 47400 4
+C 46400 43000 1 0 0 Vs.sym
+{
+T 46500 43700 5 10 0 0 0 0 1
+device=none
+}
+C 46900 40500 1 0 0 gnd-2.sym
+C 45400 42400 1 270 0 capacitor-2.sym
+{
+T 46100 42200 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 45900 42200 5 10 1 1 270 0 1
+refdes=C1
+T 46300 42200 5 10 0 0 270 0 1
+symversion=0.1
+T 45400 42400 5 10 0 0 0 0 1
+footprint=NICHICON_WT_CAP_8_10.fp
+T 45000 41700 5 10 1 1 0 0 1
+value=220uF
+T 45400 42400 5 10 0 0 0 0 1
+description=Nichicon UCW1H221MNL1GS 220uF aluminum surface mount cap.
+}
+N 44000 42200 44900 42200 4
+N 44900 42200 44900 42400 4
+N 44900 42400 46500 42400 4
+N 46500 42400 46500 43000 4
+N 46500 43000 46600 43000 4
+N 47000 40800 47000 41500 4
+N 44900 41500 47000 41500 4
+N 44900 41500 44900 42000 4
+N 44900 42000 44000 42000 4
+C 46300 42400 1 270 0 capacitor-2.sym
+{
+T 47000 42200 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 46800 42200 5 10 1 1 270 0 1
+refdes=C2
+T 47200 42200 5 10 0 0 270 0 1
+symversion=0.1
+T 46300 42400 5 10 0 0 0 0 1
+footprint=NICHICON_WT_CAP_8_10.fp
+T 45900 41700 5 10 1 1 0 0 1
+value=220uF
+T 46300 42400 5 10 0 0 0 0 1
+description=Nichicon UCW1H221MNL1GS 220uF aluminum surface mount cap.
+}
+C 47600 50200 1 0 0 5V-plus-1.sym
+C 47700 48000 1 0 0 gnd-1.sym
+C 47600 50000 1 270 0 capacitor-2.sym
+{
+T 48300 49800 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 48100 49800 5 10 1 1 270 0 1
+refdes=C4
+T 48500 49800 5 10 0 0 270 0 1
+symversion=0.1
+T 47300 49700 5 10 1 1 0 0 1
+value=10uF
+T 47600 50000 5 10 0 1 0 0 1
+description=Nichicon UWP1A100MCL1GB 10uF 10Volt Aluminum Electrolytic SMD cap
+T 47600 50000 5 10 0 0 0 0 1
+footprint=NICHICON_WT_CAP_4_5p4.fp
+}
+C 47200 46500 1 270 0 capacitor-2.sym
+{
+T 47900 46300 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 47700 46300 5 10 1 1 270 0 1
+refdes=C5
+T 48100 46300 5 10 0 0 270 0 1
+symversion=0.1
+T 46900 46200 5 10 1 1 0 0 1
+value=10uF
+T 47200 46500 5 10 0 1 0 0 1
+description=Nichicon UWP1A100MCL1GB 10uF 10Volt Aluminum Electrolytic SMD cap
+T 47200 46500 5 10 0 0 0 0 1
+footprint=NICHICON_WT_CAP_4_5p4.fp
+}
+N 46100 49100 47800 49100 4
+N 46100 49400 46400 49400 4
+N 46400 49400 46400 50200 4
+N 46400 50200 48900 50200 4
+N 47800 50200 47800 50000 4
+N 47800 48300 47800 49100 4
+N 44800 45600 47400 45600 4
+N 44400 49100 44400 47700 4
+N 44400 49400 43700 49400 4
+C 51300 48800 1 0 0 UA78Mxx.sym
+{
+T 52955 50005 5 10 0 0 180 0 1
+footprint=SOT223
+T 52405 49955 5 10 1 1 180 0 1
+device=UA78M33CDCYR
+T 52495 49820 5 10 1 1 0 0 1
+refdes=U102
+}
+C 52100 48300 1 0 0 gnd.sym
+C 54700 50000 1 0 0 3.3V-plus.sym
+C 53400 48700 1 90 0 cap.sym
+{
+T 52700 48900 5 10 0 0 90 0 1
+device=CAPACITOR
+T 52500 48900 5 10 0 0 90 0 1
+symversion=0.1
+T 53800 49200 5 10 1 1 180 0 1
+refdes=C101
+T 53400 48800 5 10 1 1 0 0 1
+value=0.1uF
+T 53400 48700 5 10 0 0 0 0 1
+footprint=0603.fp
+T 53400 48700 5 10 0 0 0 0 1
+description=Kemet C0603C104M5RACTU 0603 ceramic 50 volt cap
+}
+N 48900 49500 51300 49500 4
+C 51200 48700 1 90 0 cap.sym
+{
+T 50500 48900 5 10 0 0 90 0 1
+device=CAPACITOR
+T 50300 48900 5 10 0 0 90 0 1
+symversion=0.1
+T 50800 49300 5 10 1 1 180 0 1
+refdes=C100
+T 50300 48900 5 10 1 1 0 0 1
+value=0.33uF
+T 51200 48700 5 10 0 0 0 0 1
+footprint=0402.fp
+T 51200 48700 5 10 0 0 0 0 1
+description=Samsung CL05F334ZP5NNNC .33uF, 10Volt, 0402, ceramic cap
+}
+N 52200 48600 52200 48800 4
+N 51100 48600 53300 48600 4
+N 51100 49200 51100 49500 4
+N 53300 49200 53300 49500 4
+N 51100 48600 51100 48800 4
+N 53300 48600 53300 48800 4
+T 51300 50200 9 10 1 0 0 0 1
+3.3V 0.5A Regulator
+N 48900 49500 48900 50200 4
+N 53100 49500 54900 49500 4
+N 54900 49500 54900 50000 4
+N 52400 48800 52400 48600 4
diff --git a/Combined/rpi_bus.sch b/Combined/rpi_bus.sch
new file mode 100644
index 0000000..294571f
--- /dev/null
+++ b/Combined/rpi_bus.sch
@@ -0,0 +1,291 @@
+v 20130925 2
+C 40000 40000 0 0 0 title-B.sym
+C 45700 42000 1 0 0 header40-2.sym
+{
+T 45950 50500 5 10 0 1 0 0 1
+device=HEADER40
+T 45900 50100 5 10 1 1 0 0 1
+refdes=raspberry_pi
+T 45700 42000 5 10 0 0 0 0 1
+footprint=HEADER40_1
+}
+C 47400 48900 1 90 0 gnd.sym
+C 47400 47300 1 90 0 gnd.sym
+C 47400 46100 1 90 0 gnd.sym
+C 47400 44100 1 90 0 gnd.sym
+C 47400 43300 1 90 0 gnd.sym
+C 45400 42300 1 270 0 gnd.sym
+C 45400 45100 1 270 0 gnd.sym
+C 45400 48300 1 270 0 gnd.sym
+C 47100 50000 1 270 0 5V-plus.sym
+C 47100 49600 1 270 0 5V-plus.sym
+C 52300 50100 1 180 0 header26-1.sym
+{
+T 50700 45400 5 10 0 0 180 0 1
+device=HEADER26
+T 52000 50300 5 10 1 1 180 0 1
+refdes=lcd_touch
+T 52300 50100 5 10 0 0 0 0 1
+footprint=HEADER26_1
+}
+C 52300 50000 1 270 0 5V-plus.sym
+C 52300 49600 1 270 0 5V-plus.sym
+C 52600 48900 1 90 0 gnd.sym
+C 52600 47300 1 90 0 gnd.sym
+C 52600 46100 1 90 0 gnd.sym
+C 50600 45100 1 270 0 gnd.sym
+C 50600 48300 1 270 0 gnd.sym
+N 47100 45000 47100 45100 4
+N 52300 45100 47100 45100 4
+N 52300 45100 52300 45000 4
+N 50900 45400 50900 45300 4
+N 50900 45300 45700 45300 4
+N 45700 45300 45700 45400 4
+N 47100 45400 47100 45500 4
+N 52300 45500 47100 45500 4
+N 52300 45500 52300 45400 4
+N 50900 45800 50900 45700 4
+N 50900 45700 45700 45700 4
+N 45700 45700 45700 45800 4
+N 52300 45800 52300 45900 4
+N 52300 45900 47100 45900 4
+N 47100 45900 47100 45800 4
+N 50900 46200 50900 46100 4
+N 50900 46100 45700 46100 4
+N 45700 46100 45700 46200 4
+N 47100 46600 47100 46700 4
+N 52300 46700 47100 46700 4
+N 52300 46700 52300 46600 4
+C 50600 49300 1 0 0 nc.sym
+{
+T 50600 49700 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 50100 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50600 48900 1 0 0 nc.sym
+{
+T 50600 49300 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 49700 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50600 48500 1 0 0 nc.sym
+{
+T 50600 48900 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 49300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50600 47700 1 0 0 nc.sym
+{
+T 50600 48100 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 48500 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50600 47300 1 0 0 nc.sym
+{
+T 50600 47700 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 48100 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 50600 46900 1 0 0 nc.sym
+{
+T 50600 47300 5 10 0 0 0 0 1
+value=NoConnection
+T 50600 47700 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 52600 47100 1 180 0 nc.sym
+{
+T 52500 46600 5 10 0 0 180 0 1
+value=NoConnection
+T 52500 46400 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 52600 47900 1 180 0 nc.sym
+{
+T 52500 47400 5 10 0 0 180 0 1
+value=NoConnection
+T 52500 47200 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 52600 48300 1 180 0 nc.sym
+{
+T 52500 47800 5 10 0 0 180 0 1
+value=NoConnection
+T 52500 47600 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 52600 48700 1 180 0 nc.sym
+{
+T 52500 48200 5 10 0 0 180 0 1
+value=NoConnection
+T 52500 48000 5 10 0 0 180 0 1
+device=DRC_Directive
+}
+C 47900 48300 1 180 0 input.sym
+{
+T 47900 48000 5 10 0 0 180 0 1
+device=INPUT
+T 47700 48100 5 10 1 1 0 0 1
+netname=serial_tx
+}
+C 47100 48500 1 0 0 output.sym
+{
+T 47200 48800 5 10 0 0 0 0 1
+device=OUTPUT
+T 47700 48500 5 10 1 1 0 0 1
+netname=serial_rx
+}
+T 50000 40700 9 10 1 0 0 0 1
+RPI Bus
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+2
+T 51500 40100 9 10 1 0 0 0 1
+5
+N 45700 46600 45700 46500 4
+N 45700 46500 50900 46500 4
+N 50900 46500 50900 46600 4
+N 45700 49800 45700 49600 4
+N 45700 49600 50900 49600 4
+N 50900 49600 50900 49800 4
+C 45700 49500 1 180 0 io.sym
+{
+T 45500 48900 5 10 0 0 180 0 1
+device=none
+T 45100 49400 5 10 1 1 180 1 1
+value=BCM2
+}
+C 45700 49100 1 180 0 io.sym
+{
+T 45500 48500 5 10 0 0 180 0 1
+device=none
+T 45100 49000 5 10 1 1 180 1 1
+value=BCM3
+}
+C 45700 48700 1 180 0 io.sym
+{
+T 45500 48100 5 10 0 0 180 0 1
+device=none
+T 45100 48600 5 10 1 1 180 1 1
+value=BCM4
+}
+C 45700 44700 1 180 0 io.sym
+{
+T 45500 44100 5 10 0 0 180 0 1
+device=none
+T 45100 44600 5 10 1 1 180 1 1
+value=BCM0
+}
+C 45700 44300 1 180 0 io.sym
+{
+T 45500 43700 5 10 0 0 180 0 1
+device=none
+T 45100 44200 5 10 1 1 180 1 1
+value=BCM5
+}
+C 45700 43900 1 180 0 io.sym
+{
+T 45500 43300 5 10 0 0 180 0 1
+device=none
+T 45100 43800 5 10 1 1 180 1 1
+value=BCM6
+}
+C 45700 43500 1 180 0 io.sym
+{
+T 45500 42900 5 10 0 0 180 0 1
+device=none
+T 45100 43400 5 10 1 1 180 1 1
+value=BCM13
+}
+C 45700 43100 1 180 0 io.sym
+{
+T 45500 42500 5 10 0 0 180 0 1
+device=none
+T 45100 43000 5 10 1 1 180 1 1
+value=spi_miso
+}
+C 45700 42700 1 180 0 io.sym
+{
+T 45500 42100 5 10 0 0 180 0 1
+device=none
+T 45100 42600 5 10 1 1 180 1 1
+value=BCM26
+}
+C 47100 44500 1 0 0 io.sym
+{
+T 47300 45100 5 10 0 0 0 0 1
+device=none
+T 47700 44600 5 10 1 1 0 1 1
+value=BCM1
+}
+C 47100 42500 1 0 0 io.sym
+{
+T 47300 43100 5 10 0 0 0 0 1
+device=none
+T 47700 42600 5 10 1 1 0 1 1
+value=spi_mosi
+}
+C 47100 42100 1 0 0 io.sym
+{
+T 47300 42700 5 10 0 0 0 0 1
+device=none
+T 47700 42200 5 10 1 1 0 1 1
+value=spi_clk
+}
+C 45700 47900 1 180 0 output.sym
+{
+T 45600 47600 5 10 0 0 180 0 1
+device=OUTPUT
+T 45100 47900 5 10 1 1 180 0 1
+netname=serial_rts
+}
+C 47900 43100 1 180 0 input.sym
+{
+T 47900 42800 5 10 0 0 180 0 1
+device=INPUT
+T 47700 42900 5 10 1 1 0 0 1
+netname=serial_cts
+}
+C 47100 47700 1 0 0 output.sym
+{
+T 47200 48000 5 10 0 0 0 0 1
+device=OUTPUT
+T 47700 47700 5 10 1 1 0 0 1
+netname=spi_cs_x
+}
+C 45700 47500 1 180 0 output.sym
+{
+T 45600 47200 5 10 0 0 180 0 1
+device=OUTPUT
+T 45100 47500 5 10 1 1 180 0 1
+netname=spi_cs_y
+}
+C 45700 47100 1 180 0 output.sym
+{
+T 45600 46800 5 10 0 0 180 0 1
+device=OUTPUT
+T 45100 47100 5 10 1 1 180 0 1
+netname=spi_cs_z
+}
+C 47100 46900 1 0 0 output.sym
+{
+T 47200 47200 5 10 0 0 0 0 1
+device=OUTPUT
+T 47700 46900 5 10 1 1 0 0 1
+netname=spi_cs_a
+}
+C 47100 43700 1 0 0 output.sym
+{
+T 47200 44000 5 10 0 0 0 0 1
+device=OUTPUT
+T 47700 43700 5 10 1 1 0 0 1
+netname=spi_cs_avr
+}
diff --git a/Combined/symbols/3.3V-plus.sym b/Combined/symbols/3.3V-plus.sym
new file mode 100644
index 0000000..6e55255
--- /dev/null
+++ b/Combined/symbols/3.3V-plus.sym
@@ -0,0 +1,17 @@
+v 20130925 2
+P 200 0 200 150 1 0 0
+{
+T 250 50 5 6 0 1 0 0 1
+pinnumber=1
+T 250 50 5 6 0 0 0 0 1
+pinseq=1
+T 250 50 5 6 0 1 0 0 1
+pinlabel=1
+T 250 50 5 6 0 1 0 0 1
+pintype=pwr
+}
+L 50 150 350 150 3 0 0 0 -1 -1
+T 25 175 9 8 1 0 0 0 1
++3.3V
+T 300 0 8 8 0 0 0 0 1
+net=+3.3V:1
diff --git a/Combined/symbols/5V-plus.sym b/Combined/symbols/5V-plus.sym
new file mode 100644
index 0000000..d4ee7c5
--- /dev/null
+++ b/Combined/symbols/5V-plus.sym
@@ -0,0 +1,17 @@
+v 20130925 2
+P 200 0 200 150 1 0 0
+{
+T 250 50 5 6 0 1 0 0 1
+pinnumber=1
+T 250 50 5 6 0 0 0 0 1
+pinseq=1
+T 250 50 5 6 0 1 0 0 1
+pinlabel=1
+T 250 50 5 6 0 1 0 0 1
+pintype=pwr
+}
+L 50 150 350 150 3 0 0 0 -1 -1
+T 75 175 9 8 1 0 0 0 1
++5V
+T 300 0 8 8 0 0 0 0 1
+net=+5V:1
diff --git a/Combined/symbols/5V_motor.sym b/Combined/symbols/5V_motor.sym
new file mode 100644
index 0000000..a098064
--- /dev/null
+++ b/Combined/symbols/5V_motor.sym
@@ -0,0 +1,31 @@
+v 20100214 2
+T 100 100 0 1 0 0 0 0 1
+gedasymbols::url=http://www.gedasymbols.org/user/amand_tihon/symbols/power/5V-1.sym
+P 200 0 200 200 1 0 0
+{
+T 300 100 5 6 0 1 0 0 1
+pinnumber=1
+T 200 100 5 6 0 1 0 0 1
+pinseq=1
+T 250 100 5 6 0 1 0 0 1
+pinlabel=1
+T 225 25 5 6 0 1 0 0 1
+pintype=pwr
+}
+T 200 325 9 10 1 0 0 3 1
++5Vm
+T 100 500 8 10 0 0 0 0 1
+net=+5Vm:1
+V 200 250 50 3 10 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 100 700 5 10 0 0 0 0 1
+device=none
+T 100 900 5 10 0 0 0 0 1
+description=+5V power rail, isolated for motors
+T 100 1100 5 10 0 0 0 0 1
+author=Amand Tihon amand.tihon@alrj.org, edited by Doug Coffland
+T 100 1300 5 10 0 0 0 0 1
+dist-license=GPL3, http://www.gnu.org/licenses/gpl-3.0.txt
+T 100 1500 5 10 0 0 0 0 1
+use-license=unrestricted
+T 100 1700 5 10 0 0 0 0 1
+numslots=0
diff --git a/Combined/symbols/ACT4060A-SOP8.sym b/Combined/symbols/ACT4060A-SOP8.sym
new file mode 100644
index 0000000..c9ca6e2
--- /dev/null
+++ b/Combined/symbols/ACT4060A-SOP8.sym
@@ -0,0 +1,102 @@
+v 20130925 2
+P 1800 1800 1800 1500 1 0 0
+{
+T 1800 2000 5 10 0 0 270 0 1
+pintype=pas
+T 1555 1450 5 10 1 1 180 6 1
+pinlabel=Boot
+T 1750 1595 5 10 1 1 90 0 1
+pinnumber=1
+T 1800 2000 5 10 0 0 270 0 1
+pinseq=1
+}
+P 2500 900 2200 900 1 0 0
+{
+T 2700 900 5 10 0 0 180 0 1
+pintype=pas
+T 2145 895 5 10 1 1 0 6 1
+pinlabel=Switch
+T 2295 945 5 10 1 1 0 0 1
+pinnumber=3
+T 2700 900 5 10 0 0 180 0 1
+pinseq=3
+}
+P 0 600 300 600 1 0 0
+{
+T -200 600 5 10 0 0 0 0 1
+pintype=pwr
+T 355 595 5 10 1 1 0 0 1
+pinlabel=In
+T 205 645 5 10 1 1 0 6 1
+pinnumber=2
+T -200 600 5 10 0 0 0 0 1
+pinseq=2
+}
+P 700 0 700 300 1 0 0
+{
+T 700 -200 5 10 0 0 90 0 1
+pintype=pwr
+T 845 500 5 10 1 1 180 0 1
+pinlabel=Gnd
+T 650 205 5 10 1 1 90 6 1
+pinnumber=4
+T 700 -200 5 10 0 0 90 0 1
+pinseq=4
+}
+P 700 1800 700 1500 1 0 0
+{
+T 700 2000 5 10 0 0 90 0 1
+pintype=pas
+T 555 1450 5 10 1 1 180 6 1
+pinlabel=N/C
+T 650 1595 5 10 1 1 90 0 1
+pinnumber=8
+T 700 2000 5 10 0 0 90 0 1
+pinseq=8
+}
+P 0 900 300 900 1 0 0
+{
+T -200 900 5 10 0 0 180 0 1
+pintype=in
+T 355 895 5 10 1 1 0 0 1
+pinlabel=Enable
+T 205 945 5 10 1 1 0 6 1
+pinnumber=7
+T -200 900 5 10 0 0 180 0 1
+pinseq=7
+}
+P 1800 0 1800 300 1 0 0
+{
+T 1800 -200 5 10 0 0 270 0 1
+pintype=pas
+T 2045 500 5 10 1 1 180 0 1
+pinlabel=Comp
+T 1750 205 5 10 1 1 90 6 1
+pinnumber=6
+T 1800 -200 5 10 0 0 270 0 1
+pinseq=6
+}
+P 2500 600 2200 600 1 0 0
+{
+T 2700 600 5 10 0 0 0 0 1
+pintype=pas
+T 2145 595 5 10 1 1 0 6 1
+pinlabel=Feedback
+T 2295 645 5 10 1 1 0 0 1
+pinnumber=5
+T 2700 600 5 10 0 0 0 0 1
+pinseq=5
+}
+T 1705 1255 8 10 1 1 180 0 1
+device=ACT4060A
+T 1505 1055 8 10 1 1 180 0 1
+footprint=SOP-8
+B 300 300 1900 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1095 1595 8 10 1 1 0 0 1
+refdes=U?
+T -5 2393 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 2193 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1993 8 10 0 0 0 0 1
+documentation=http://www.mouser.com/catalog/specsheets/activesemi_ACT4060A.pdf
diff --git a/Combined/symbols/ACT4455-SOP8.sym b/Combined/symbols/ACT4455-SOP8.sym
new file mode 100644
index 0000000..4eeb649
--- /dev/null
+++ b/Combined/symbols/ACT4455-SOP8.sym
@@ -0,0 +1,113 @@
+v 20130925 2
+P 1800 1800 1800 1500 1 0 0
+{
+T 1800 2000 5 10 0 0 270 0 1
+pintype=pas
+T 1555 1450 5 10 1 1 180 6 1
+pinlabel=Bias
+T 1750 1595 5 10 1 1 90 0 1
+pinnumber=3
+T 1800 2000 5 10 0 0 270 0 1
+pinseq=3
+}
+P 2500 1000 2200 1000 1 0 0
+{
+T 2700 1000 5 10 0 0 180 0 1
+pintype=pas
+T 2145 995 5 10 1 1 0 6 1
+pinlabel=Switch
+T 2295 1045 5 10 1 1 0 0 1
+pinnumber=2
+T 2700 1000 5 10 0 0 180 0 1
+pinseq=2
+}
+P 0 1000 300 1000 1 0 0
+{
+T -200 1000 5 10 0 0 0 0 1
+pintype=pwr
+T 355 995 5 10 1 1 0 0 1
+pinlabel=In
+T 205 1045 5 10 1 1 0 6 1
+pinnumber=7
+T -200 1000 5 10 0 0 0 0 1
+pinseq=7
+}
+P 600 0 600 300 1 0 0
+{
+T 600 -200 5 10 0 0 90 0 1
+pintype=pwr
+T 745 500 5 10 1 1 180 0 1
+pinlabel=Gnd
+T 550 205 5 10 1 1 90 6 1
+pinnumber=4
+T 600 -200 5 10 0 0 90 0 1
+pinseq=0
+}
+P 1000 0 1000 300 1 0 0
+{
+T 1000 -200 5 10 0 0 270 0 1
+pintype=pas
+T 1000 355 5 10 1 1 90 0 1
+pinlabel=Pad
+T 950 205 5 10 1 1 90 6 1
+pinnumber=9
+T 1000 -200 5 10 0 0 270 0 1
+pinseq=9
+}
+P 1900 0 1900 300 1 0 0
+{
+T 1900 -200 5 10 0 0 270 0 1
+pintype=pas
+T 2045 500 5 10 1 1 180 0 1
+pinlabel=CS1
+T 1850 205 5 10 1 1 90 6 1
+pinnumber=1
+T 1900 -200 5 10 0 0 270 0 1
+pinseq=1
+}
+P 0 600 300 600 1 0 0
+{
+T -200 600 5 10 0 0 180 0 1
+pintype=pas
+T 355 595 5 10 1 1 0 0 1
+pinlabel=Comp
+T 205 645 5 10 1 1 0 6 1
+pinnumber=5
+T -200 600 5 10 0 0 180 0 1
+pinseq=5
+}
+P 2500 600 2200 600 1 0 0
+{
+T 2700 600 5 10 0 0 0 0 1
+pintype=pas
+T 2145 595 5 10 1 1 0 6 1
+pinlabel=Feedback
+T 2295 645 5 10 1 1 0 0 1
+pinnumber=6
+T 2700 600 5 10 0 0 0 0 1
+pinseq=6
+}
+T 1505 1155 8 10 1 1 180 0 1
+device=ACT4455
+T 1405 955 8 10 1 1 180 0 1
+footprint=SOP-8
+B 300 300 1900 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1095 1595 8 10 1 1 0 0 1
+refdes=U?
+T -5 2393 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 2193 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1993 8 10 0 0 0 0 1
+documentation=http://www.active-semi.com/sheets/ACT4455_Datasheet.pdf
+P 1400 0 1400 300 1 0 0
+{
+T 1400 -200 5 10 0 0 270 0 1
+pintype=pas
+T 1545 500 5 10 1 1 180 0 1
+pinlabel=CS2
+T 1350 205 5 10 1 1 90 6 1
+pinnumber=8
+T 1400 -200 5 10 0 0 270 0 1
+pinseq=8
+}
diff --git a/Combined/symbols/ATXmegaA3.sym b/Combined/symbols/ATXmegaA3.sym
new file mode 100644
index 0000000..33c2448
--- /dev/null
+++ b/Combined/symbols/ATXmegaA3.sym
@@ -0,0 +1,728 @@
+v 20130925 2
+B 300 200 4100 8200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 9100 5 8 0 0 0 0 1
+distlicense=GPL3
+T 400 9300 5 8 0 0 0 0 1
+uselicense=no restrictions
+T 400 9500 5 8 0 0 0 0 1
+author=Kai-Martin Knaak, kmk@lilalaser.de
+T 400 9700 5 8 0 0 0 0 1
+symversion=1.0
+T 400 9900 5 8 0 0 0 0 1
+footprints=TQFP64-08, QFN64
+T 400 10100 5 8 0 0 0 0 1
+values=ATXmega16A3U-AU, ATXmega128A3U-AU, ATXmega192A3U-AU, ATXmega192A3U-AU, ATXmega256A3U-AU
+T 400 10300 5 8 0 0 0 0 1
+documentation=http://www.atmel.com/Images/Atmel-8386-8-and-16-bit-AVR-Microcontroller-ATxmega64A3U-128A3U-192A3U-256A3U_datasheet.pdf
+T 2200 6200 8 26 1 1 270 0 1
+description=ATXmegaA3U
+T 3400 8500 8 8 1 1 0 0 1
+footprint=TQFP64-08
+T 3400 8700 8 10 1 1 0 0 1
+value=ATXmegaA3
+T 3400 8900 8 10 1 1 0 0 1
+refdes=U?
+P 200 7200 300 7200 1 0 0
+{
+T 350 7200 9 10 1 1 0 1 1
+pinlabel=PA3
+T 200 7250 5 8 1 1 0 6 1
+pinnumber=1
+T 200 7250 5 8 0 1 0 6 1
+pinseq=1
+T 200 7200 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 6900 300 6900 1 0 0
+{
+T 350 6900 9 10 1 1 0 1 1
+pinlabel=PA4
+T 200 6950 5 8 1 1 0 6 1
+pinnumber=2
+T 200 6950 5 8 0 1 0 6 1
+pinseq=2
+T 200 6900 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 6600 300 6600 1 0 0
+{
+T 350 6600 9 10 1 1 0 1 1
+pinlabel=PA5
+T 200 6650 5 8 1 1 0 6 1
+pinnumber=3
+T 200 6650 5 8 0 1 0 6 1
+pinseq=3
+T 200 6600 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 6300 300 6300 1 0 0
+{
+T 350 6300 9 10 1 1 0 1 1
+pinlabel=PA6
+T 200 6350 5 8 1 1 0 6 1
+pinnumber=4
+T 200 6350 5 8 0 1 0 6 1
+pinseq=4
+T 200 6300 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 6000 300 6000 1 0 0
+{
+T 350 6000 9 10 1 1 0 1 1
+pinlabel=PA7
+T 200 6050 5 8 1 1 0 6 1
+pinnumber=5
+T 200 6050 5 8 0 1 0 6 1
+pinseq=5
+T 200 6000 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 5500 300 5500 1 0 0
+{
+T 350 5500 9 10 1 1 0 1 1
+pinlabel=PB0
+T 200 5550 5 8 1 1 0 6 1
+pinnumber=6
+T 200 5550 5 8 0 1 0 6 1
+pinseq=6
+T 200 5500 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 5200 300 5200 1 0 0
+{
+T 350 5200 9 10 1 1 0 1 1
+pinlabel=PB1
+T 200 5250 5 8 1 1 0 6 1
+pinnumber=7
+T 200 5250 5 8 0 1 0 6 1
+pinseq=7
+T 200 5200 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 4900 300 4900 1 0 0
+{
+T 350 4900 9 10 1 1 0 1 1
+pinlabel=PB2
+T 200 4950 5 8 1 1 0 6 1
+pinnumber=8
+T 200 4950 5 8 0 1 0 6 1
+pinseq=8
+T 200 4900 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 4600 300 4600 1 0 0
+{
+T 350 4600 9 10 1 1 0 1 1
+pinlabel=PB3
+T 200 4650 5 8 1 1 0 6 1
+pinnumber=9
+T 200 4650 5 8 0 1 0 6 1
+pinseq=9
+T 200 4600 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 4300 300 4300 1 0 0
+{
+T 350 4300 9 10 1 1 0 1 1
+pinlabel=PB4
+T 200 4350 5 8 1 1 0 6 1
+pinnumber=10
+T 200 4350 5 8 0 1 0 6 1
+pinseq=10
+T 200 4300 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 4000 300 4000 1 0 0
+{
+T 350 4000 9 10 1 1 0 1 1
+pinlabel=PB5
+T 200 4050 5 8 1 1 0 6 1
+pinnumber=11
+T 200 4050 5 8 0 1 0 6 1
+pinseq=11
+T 200 4000 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 3700 300 3700 1 0 0
+{
+T 350 3700 9 10 1 1 0 1 1
+pinlabel=PB6
+T 200 3750 5 8 1 1 0 6 1
+pinnumber=12
+T 200 3750 5 8 0 1 0 6 1
+pinseq=12
+T 200 3700 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 3400 300 3400 1 0 0
+{
+T 350 3400 9 10 1 1 0 1 1
+pinlabel=PB7
+T 200 3450 5 8 1 1 0 6 1
+pinnumber=13
+T 200 3450 5 8 0 1 0 6 1
+pinseq=13
+T 200 3400 5 10 0 0 0 0 1
+pintype=io
+}
+P 1600 100 1600 200 1 0 0
+{
+T 1600 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 1650 150 5 8 1 1 0 2 1
+pinnumber=14
+T 1650 150 5 8 0 1 0 2 1
+pinseq=14
+T 1600 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 1700 8500 1700 8400 1 0 0
+{
+T 1700 8350 9 10 1 1 90 7 1
+pinlabel=VCC
+T 1750 8450 5 8 1 1 0 0 1
+pinnumber=15
+T 1750 8450 5 8 0 1 0 0 1
+pinseq=15
+T 1700 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 200 2900 300 2900 1 0 0
+{
+T 350 2900 9 10 1 1 0 1 1
+pinlabel=PC0
+T 200 2950 5 8 1 1 0 6 1
+pinnumber=16
+T 200 2950 5 8 0 1 0 6 1
+pinseq=16
+T 200 2900 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 2600 300 2600 1 0 0
+{
+T 350 2600 9 10 1 1 0 1 1
+pinlabel=PC1
+T 200 2650 5 8 1 1 0 6 1
+pinnumber=17
+T 200 2650 5 8 0 1 0 6 1
+pinseq=17
+T 200 2600 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=PC2
+T 200 2350 5 8 1 1 0 6 1
+pinnumber=18
+T 200 2350 5 8 0 1 0 6 1
+pinseq=18
+T 200 2300 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 2000 300 2000 1 0 0
+{
+T 350 2000 9 10 1 1 0 1 1
+pinlabel=PC3
+T 200 2050 5 8 1 1 0 6 1
+pinnumber=19
+T 200 2050 5 8 0 1 0 6 1
+pinseq=19
+T 200 2000 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 1700 300 1700 1 0 0
+{
+T 350 1700 9 10 1 1 0 1 1
+pinlabel=PC4
+T 200 1750 5 8 1 1 0 6 1
+pinnumber=20
+T 200 1750 5 8 0 1 0 6 1
+pinseq=20
+T 200 1700 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 1400 300 1400 1 0 0
+{
+T 350 1400 9 10 1 1 0 1 1
+pinlabel=PC5
+T 200 1450 5 8 1 1 0 6 1
+pinnumber=21
+T 200 1450 5 8 0 1 0 6 1
+pinseq=21
+T 200 1400 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 1100 300 1100 1 0 0
+{
+T 350 1100 9 10 1 1 0 1 1
+pinlabel=PC6
+T 200 1150 5 8 1 1 0 6 1
+pinnumber=22
+T 200 1150 5 8 0 1 0 6 1
+pinseq=22
+T 200 1100 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 800 300 800 1 0 0
+{
+T 350 800 9 10 1 1 0 1 1
+pinlabel=PC7
+T 200 850 5 8 1 1 0 6 1
+pinnumber=23
+T 200 850 5 8 0 1 0 6 1
+pinseq=23
+T 200 800 5 10 0 0 0 0 1
+pintype=io
+}
+P 1900 100 1900 200 1 0 0
+{
+T 1900 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 1950 150 5 8 1 1 0 2 1
+pinnumber=24
+T 1950 150 5 8 0 1 0 2 1
+pinseq=24
+T 1900 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 2000 8500 2000 8400 1 0 0
+{
+T 2000 8350 9 10 1 1 90 7 1
+pinlabel=VCC
+T 2050 8450 5 8 1 1 0 0 1
+pinnumber=25
+T 2050 8450 5 8 0 1 0 0 1
+pinseq=25
+T 2000 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 4500 8100 4400 8100 1 0 0
+{
+T 4350 8100 9 10 1 1 0 7 1
+pinlabel=PD0
+T 4500 8150 5 8 1 1 0 0 1
+pinnumber=26
+T 4500 8150 5 8 0 1 0 0 1
+pinseq=26
+T 4500 8100 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 7800 4400 7800 1 0 0
+{
+T 4350 7800 9 10 1 1 0 7 1
+pinlabel=PD1
+T 4500 7850 5 8 1 1 0 0 1
+pinnumber=27
+T 4500 7850 5 8 0 1 0 0 1
+pinseq=27
+T 4500 7800 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 7500 4400 7500 1 0 0
+{
+T 4350 7500 9 10 1 1 0 7 1
+pinlabel=PD2
+T 4500 7550 5 8 1 1 0 0 1
+pinnumber=28
+T 4500 7550 5 8 0 1 0 0 1
+pinseq=28
+T 4500 7500 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 7200 4400 7200 1 0 0
+{
+T 4350 7200 9 10 1 1 0 7 1
+pinlabel=PD3
+T 4500 7250 5 8 1 1 0 0 1
+pinnumber=29
+T 4500 7250 5 8 0 1 0 0 1
+pinseq=29
+T 4500 7200 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 6900 4400 6900 1 0 0
+{
+T 4350 6900 9 10 1 1 0 7 1
+pinlabel=PD4
+T 4500 6950 5 8 1 1 0 0 1
+pinnumber=30
+T 4500 6950 5 8 0 1 0 0 1
+pinseq=30
+T 4500 6900 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 6600 4400 6600 1 0 0
+{
+T 4350 6600 9 10 1 1 0 7 1
+pinlabel=PD5
+T 4500 6650 5 8 1 1 0 0 1
+pinnumber=31
+T 4500 6650 5 8 0 1 0 0 1
+pinseq=31
+T 4500 6600 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 6300 4400 6300 1 0 0
+{
+T 4350 6300 9 10 1 1 0 7 1
+pinlabel=PD6
+T 4500 6350 5 8 1 1 0 0 1
+pinnumber=32
+T 4500 6350 5 8 0 1 0 0 1
+pinseq=32
+T 4500 6300 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 6000 4400 6000 1 0 0
+{
+T 4350 6000 9 10 1 1 0 7 1
+pinlabel=PD7
+T 4500 6050 5 8 1 1 0 0 1
+pinnumber=33
+T 4500 6050 5 8 0 1 0 0 1
+pinseq=33
+T 4500 6000 5 10 0 0 0 0 1
+pintype=io
+}
+P 2200 100 2200 200 1 0 0
+{
+T 2200 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 2250 150 5 8 1 1 0 2 1
+pinnumber=34
+T 2250 150 5 8 0 1 0 2 1
+pinseq=34
+T 2200 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 2300 8500 2300 8400 1 0 0
+{
+T 2300 8350 9 10 1 1 90 7 1
+pinlabel=VCC
+T 2350 8450 5 8 1 1 0 0 1
+pinnumber=35
+T 2350 8450 5 8 0 1 0 0 1
+pinseq=35
+T 2300 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 4500 5500 4400 5500 1 0 0
+{
+T 4350 5500 9 10 1 1 0 7 1
+pinlabel=PE0
+T 4500 5550 5 8 1 1 0 0 1
+pinnumber=36
+T 4500 5550 5 8 0 1 0 0 1
+pinseq=36
+T 4500 5500 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 5200 4400 5200 1 0 0
+{
+T 4350 5200 9 10 1 1 0 7 1
+pinlabel=PE1
+T 4500 5250 5 8 1 1 0 0 1
+pinnumber=37
+T 4500 5250 5 8 0 1 0 0 1
+pinseq=37
+T 4500 5200 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 4900 4400 4900 1 0 0
+{
+T 4350 4900 9 10 1 1 0 7 1
+pinlabel=PE2
+T 4500 4950 5 8 1 1 0 0 1
+pinnumber=38
+T 4500 4950 5 8 0 1 0 0 1
+pinseq=38
+T 4500 4900 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 4600 4400 4600 1 0 0
+{
+T 4350 4600 9 10 1 1 0 7 1
+pinlabel=PE3
+T 4500 4650 5 8 1 1 0 0 1
+pinnumber=39
+T 4500 4650 5 8 0 1 0 0 1
+pinseq=39
+T 4500 4600 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 4300 4400 4300 1 0 0
+{
+T 4350 4300 9 10 1 1 0 7 1
+pinlabel=PE4
+T 4500 4350 5 8 1 1 0 0 1
+pinnumber=40
+T 4500 4350 5 8 0 1 0 0 1
+pinseq=40
+T 4500 4300 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 4000 4400 4000 1 0 0
+{
+T 4350 4000 9 10 1 1 0 7 1
+pinlabel=PE5
+T 4500 4050 5 8 1 1 0 0 1
+pinnumber=41
+T 4500 4050 5 8 0 1 0 0 1
+pinseq=41
+T 4500 4000 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 3700 4400 3700 1 0 0
+{
+T 4350 3700 9 10 1 1 0 7 1
+pinlabel=PE6
+T 4500 3750 5 8 1 1 0 0 1
+pinnumber=42
+T 4500 3750 5 8 0 1 0 0 1
+pinseq=42
+T 4500 3700 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 3400 4400 3400 1 0 0
+{
+T 4350 3400 9 10 1 1 0 7 1
+pinlabel=PE7
+T 4500 3450 5 8 1 1 0 0 1
+pinnumber=43
+T 4500 3450 5 8 0 1 0 0 1
+pinseq=43
+T 4500 3400 5 10 0 0 0 0 1
+pintype=io
+}
+P 2500 100 2500 200 1 0 0
+{
+T 2500 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 2550 150 5 8 1 1 0 2 1
+pinnumber=44
+T 2550 150 5 8 0 1 0 2 1
+pinseq=44
+T 2500 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 2600 8500 2600 8400 1 0 0
+{
+T 2600 8350 9 10 1 1 90 7 1
+pinlabel=VCC
+T 2650 8450 5 8 1 1 0 0 1
+pinnumber=45
+T 2650 8450 5 8 0 1 0 0 1
+pinseq=45
+T 2600 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 4500 2900 4400 2900 1 0 0
+{
+T 4350 2900 9 10 1 1 0 7 1
+pinlabel=PF0
+T 4500 2950 5 8 1 1 0 0 1
+pinnumber=46
+T 4500 2950 5 8 0 1 0 0 1
+pinseq=46
+T 4500 2900 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 2600 4400 2600 1 0 0
+{
+T 4350 2600 9 10 1 1 0 7 1
+pinlabel=PF1
+T 4500 2650 5 8 1 1 0 0 1
+pinnumber=47
+T 4500 2650 5 8 0 1 0 0 1
+pinseq=47
+T 4500 2600 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 2300 4400 2300 1 0 0
+{
+T 4350 2300 9 10 1 1 0 7 1
+pinlabel=PF2
+T 4500 2350 5 8 1 1 0 0 1
+pinnumber=48
+T 4500 2350 5 8 0 1 0 0 1
+pinseq=48
+T 4500 2300 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 2000 4400 2000 1 0 0
+{
+T 4350 2000 9 10 1 1 0 7 1
+pinlabel=PF3
+T 4500 2050 5 8 1 1 0 0 1
+pinnumber=49
+T 4500 2050 5 8 0 1 0 0 1
+pinseq=49
+T 4500 2000 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 1700 4400 1700 1 0 0
+{
+T 4350 1700 9 10 1 1 0 7 1
+pinlabel=PF4
+T 4500 1750 5 8 1 1 0 0 1
+pinnumber=50
+T 4500 1750 5 8 0 1 0 0 1
+pinseq=50
+T 4500 1700 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 1400 4400 1400 1 0 0
+{
+T 4350 1400 9 10 1 1 0 7 1
+pinlabel=PF5
+T 4500 1450 5 8 1 1 0 0 1
+pinnumber=51
+T 4500 1450 5 8 0 1 0 0 1
+pinseq=51
+T 4500 1400 5 10 0 0 0 0 1
+pintype=io
+}
+P 2800 100 2800 200 1 0 0
+{
+T 2800 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 2850 150 5 8 1 1 0 2 1
+pinnumber=52
+T 2850 150 5 8 0 1 0 2 1
+pinseq=52
+T 2800 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 2900 8500 2900 8400 1 0 0
+{
+T 2900 8350 9 10 1 1 90 7 1
+pinlabel=VCC
+T 2950 8450 5 8 1 1 0 0 1
+pinnumber=53
+T 2950 8450 5 8 0 1 0 0 1
+pinseq=53
+T 2900 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 4500 1100 4400 1100 1 0 0
+{
+T 4350 1100 9 10 1 1 0 7 1
+pinlabel=PF6
+T 4500 1150 5 8 1 1 0 0 1
+pinnumber=54
+T 4500 1150 5 8 0 1 0 0 1
+pinseq=54
+T 4500 1100 5 10 0 0 0 0 1
+pintype=io
+}
+P 4500 800 4400 800 1 0 0
+{
+T 4350 800 9 10 1 1 0 7 1
+pinlabel=PF7
+T 4500 850 5 8 1 1 0 0 1
+pinnumber=55
+T 4500 850 5 8 0 1 0 0 1
+pinseq=55
+T 4500 800 5 10 0 0 0 0 1
+pintype=io
+}
+P 800 100 800 200 1 0 0
+{
+T 800 255 9 10 1 1 90 0 1
+pinlabel=PDI
+T 750 105 5 8 1 1 90 6 1
+pinnumber=56
+T 750 100 5 8 0 1 90 6 1
+pinseq=56
+T 800 100 5 10 0 0 0 0 1
+pintype=io
+}
+P 1100 100 1100 200 1 0 0
+{
+T 1100 255 9 10 1 1 90 0 1
+pinlabel=\_RESET\_
+T 1050 105 5 8 1 1 90 6 1
+pinnumber=57
+T 1050 100 5 8 0 1 90 6 1
+pinseq=57
+T 1100 100 5 10 0 0 0 0 1
+pintype=io
+}
+P 3700 100 3700 200 1 0 0
+{
+T 3700 255 9 10 1 1 90 0 1
+pinlabel=PR0
+T 3650 105 5 8 1 1 90 6 1
+pinnumber=58
+T 3650 100 5 8 0 1 90 6 1
+pinseq=58
+T 3700 100 5 10 0 0 0 0 1
+pintype=io
+}
+P 4000 100 4000 200 1 0 0
+{
+T 4000 255 9 10 1 1 90 0 1
+pinlabel=PR1
+T 3950 105 5 8 1 1 90 6 1
+pinnumber=59
+T 3950 100 5 8 0 1 90 6 1
+pinseq=59
+T 4000 100 5 10 0 0 0 0 1
+pintype=io
+}
+P 3100 100 3100 200 1 0 0
+{
+T 3100 250 9 10 1 1 90 1 1
+pinlabel=GND
+T 3150 150 5 8 1 1 0 2 1
+pinnumber=60
+T 3150 150 5 8 0 1 0 2 1
+pinseq=60
+T 3100 100 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 1200 8500 1200 8400 1 0 0
+{
+T 1200 8350 9 10 1 1 90 7 1
+pinlabel=AVCC
+T 1250 8450 5 8 1 1 0 0 1
+pinnumber=61
+T 1250 8450 5 8 0 1 0 0 1
+pinseq=61
+T 1200 8500 5 10 0 0 0 0 1
+pintype=pwr
+}
+P 200 8100 300 8100 1 0 0
+{
+T 350 8100 9 10 1 1 0 1 1
+pinlabel=PA0
+T 200 8150 5 8 1 1 0 6 1
+pinnumber=62
+T 200 8150 5 8 0 1 0 6 1
+pinseq=62
+T 200 8100 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 7800 300 7800 1 0 0
+{
+T 350 7800 9 10 1 1 0 1 1
+pinlabel=PA1
+T 200 7850 5 8 1 1 0 6 1
+pinnumber=63
+T 200 7850 5 8 0 1 0 6 1
+pinseq=63
+T 200 7800 5 10 0 0 0 0 1
+pintype=io
+}
+P 200 7500 300 7500 1 0 0
+{
+T 350 7500 9 10 1 1 0 1 1
+pinlabel=PA2
+T 200 7550 5 8 1 1 0 6 1
+pinnumber=64
+T 200 7550 5 8 0 1 0 6 1
+pinseq=64
+T 200 7500 5 10 0 0 0 0 1
+pintype=io
+}
diff --git a/Combined/symbols/CHASSIS_GND.sym b/Combined/symbols/CHASSIS_GND.sym
new file mode 100644
index 0000000..6f0bb41
--- /dev/null
+++ b/Combined/symbols/CHASSIS_GND.sym
@@ -0,0 +1,24 @@
+v 20130925 2
+L 0 500 1000 500 3 0 0 0 -1 -1
+L 0 500 200 200 3 0 0 0 -1 -1
+L 300 500 500 200 3 0 0 0 -1 -1
+L 600 500 800 200 3 0 0 0 -1 -1
+L 900 500 1100 200 3 0 0 0 -1 -1
+L 1200 500 1000 500 3 0 0 0 -1 -1
+L 1200 500 1400 200 3 0 0 0 -1 -1
+L 600 1100 600 500 3 0 0 0 -1 -1
+P 600 1500 600 1100 1 0 0
+{
+T 600 1500 5 10 0 0 0 0 1
+pintype=gnd
+T 55 200 5 10 1 1 180 6 1
+pinlabel=CHASSIS_GND
+T 550 1195 5 10 1 1 90 0 1
+pinnumber=1
+T 600 1500 5 10 0 0 0 0 1
+pinseq=1
+T 600 1500 5 10 0 0 0 0 1
+netname=CGND
+}
+T 0 38 8 10 0 1 0 0 1
+net=CGND:1
diff --git a/Combined/symbols/DB9.sym b/Combined/symbols/DB9.sym
new file mode 100644
index 0000000..50ea87c
--- /dev/null
+++ b/Combined/symbols/DB9.sym
@@ -0,0 +1,112 @@
+v 20130925 2
+L 100 250 100 1750 3 0 0 0 -1 -1
+T 800 2800 5 10 0 0 0 0 1
+device=DB9
+P 500 200 1000 200 1 0 1
+{
+T 800 250 5 8 1 1 0 0 1
+pinnumber=5
+T 800 250 5 8 0 0 0 0 1
+pinseq=1
+T 800 250 5 8 0 1 0 0 1
+pinlabel=5
+T 800 250 5 8 0 1 0 0 1
+pintype=pas
+}
+A 550 150 150 250 110 3 0 0 0 -1 -1
+A 175 250 75 180 60 3 0 0 0 -1 -1
+A 550 1890 150 0 110 3 0 0 0 -1 -1
+A 175 1750 75 120 60 3 0 0 0 -1 -1
+L 700 150 700 1900 3 0 0 0 -1 -1
+P 300 400 1000 400 1 0 1
+{
+T 800 450 5 8 1 1 0 0 1
+pinnumber=9
+T 800 450 5 8 0 0 0 0 1
+pinseq=2
+T 800 450 5 8 0 1 0 0 1
+pinlabel=9
+T 800 450 5 8 0 1 0 0 1
+pintype=pas
+}
+P 500 600 1000 600 1 0 1
+{
+T 800 650 5 8 1 1 0 0 1
+pinnumber=4
+T 800 650 5 8 0 0 0 0 1
+pinseq=3
+T 800 650 5 8 0 1 0 0 1
+pinlabel=4
+T 800 650 5 8 0 1 0 0 1
+pintype=pas
+}
+P 300 800 1000 800 1 0 1
+{
+T 800 850 5 8 1 1 0 0 1
+pinnumber=8
+T 800 850 5 8 0 0 0 0 1
+pinseq=4
+T 800 850 5 8 0 1 0 0 1
+pinlabel=8
+T 800 850 5 8 0 1 0 0 1
+pintype=pas
+}
+P 500 1000 1000 1000 1 0 1
+{
+T 800 1050 5 8 1 1 0 0 1
+pinnumber=3
+T 800 1050 5 8 0 0 0 0 1
+pinseq=5
+T 800 1050 5 8 0 1 0 0 1
+pinlabel=3
+T 800 1050 5 8 0 1 0 0 1
+pintype=pas
+}
+P 300 1200 1000 1200 1 0 1
+{
+T 800 1250 5 8 1 1 0 0 1
+pinnumber=7
+T 800 1250 5 8 0 0 0 0 1
+pinseq=6
+T 800 1250 5 8 0 1 0 0 1
+pinlabel=7
+T 800 1250 5 8 0 1 0 0 1
+pintype=pas
+}
+P 500 1400 1000 1400 1 0 1
+{
+T 800 1450 5 8 1 1 0 0 1
+pinnumber=2
+T 800 1450 5 8 0 0 0 0 1
+pinseq=7
+T 800 1450 5 8 0 1 0 0 1
+pinlabel=2
+T 800 1450 5 8 0 1 0 0 1
+pintype=pas
+}
+P 300 1600 1000 1600 1 0 1
+{
+T 800 1650 5 8 1 1 0 0 1
+pinnumber=6
+T 800 1650 5 8 0 0 0 0 1
+pinseq=8
+T 800 1650 5 8 0 1 0 0 1
+pinlabel=6
+T 800 1650 5 8 0 1 0 0 1
+pintype=pas
+}
+P 500 1800 1000 1800 1 0 1
+{
+T 800 1850 5 8 1 1 0 0 1
+pinnumber=1
+T 800 1850 5 8 0 0 0 0 1
+pinseq=9
+T 800 1850 5 8 0 1 0 0 1
+pinlabel=1
+T 800 1850 5 8 0 1 0 0 1
+pintype=pas
+}
+T 125 2125 8 10 1 1 0 0 1
+refdes=CONN?
+L 137 185 499 9 3 0 0 0 -1 -1
+L 499 2031 136 1814 3 0 0 0 -1 -1
diff --git a/Combined/symbols/IRM-10.sym b/Combined/symbols/IRM-10.sym
new file mode 100644
index 0000000..dcfaca3
--- /dev/null
+++ b/Combined/symbols/IRM-10.sym
@@ -0,0 +1,58 @@
+v 20130925 2
+P 1700 400 1400 400 1 0 0
+{
+T 1900 400 5 10 0 0 180 0 1
+pintype=pwr
+T 1345 395 5 10 1 1 0 6 1
+pinlabel=Vcc
+T 1495 445 5 10 1 1 0 0 1
+pinnumber=3
+T 1900 400 5 10 0 0 180 0 1
+pinseq=3
+}
+P 0 100 300 100 1 0 0
+{
+T -200 100 5 10 0 0 0 0 1
+pintype=pwr
+T 355 95 5 10 1 1 0 0 1
+pinlabel=AC/N
+T 205 145 5 10 1 1 0 6 1
+pinnumber=2
+T -200 100 5 10 0 0 0 0 1
+pinseq=2
+}
+P 0 400 300 400 1 0 0
+{
+T -200 400 5 10 0 0 180 0 1
+pintype=pwr
+T 355 395 5 10 1 1 0 0 1
+pinlabel=AC/L
+T 205 445 5 10 1 1 0 6 1
+pinnumber=1
+T -200 400 5 10 0 0 180 0 1
+pinseq=1
+}
+P 1700 100 1400 100 1 0 0
+{
+T 1900 100 5 10 0 0 0 0 1
+pintype=pwr
+T 1345 95 5 10 1 1 0 6 1
+pinlabel=Gnd
+T 1495 145 5 10 1 1 0 0 1
+pinnumber=4
+T 1900 100 5 10 0 0 0 0 1
+pinseq=4
+}
+T 905 755 8 10 1 1 180 0 1
+device=IRM-10
+T 1355 1105 8 10 0 0 180 0 1
+footprint=IRM-10
+B 300 0 1100 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1195 620 8 10 1 1 0 0 1
+refdes=U?
+T -5 1593 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 1393 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1193 8 10 0 0 0 0 1
+documentation=http://www.mouser.com/ds/2/260/IRM-10-spec-267994.pdf
diff --git a/Combined/symbols/MAX18450 (copy).sym b/Combined/symbols/MAX18450 (copy).sym
new file mode 100644
index 0000000..9857a62
--- /dev/null
+++ b/Combined/symbols/MAX18450 (copy).sym	
@@ -0,0 +1,191 @@
+v 20130925 2
+T 1600 2500 8 10 1 1 0 0 1
+refdes=U?
+T -105 3495 8 10 0 0 0 0 1
+author=Joseph Coffland <joseph@cauldrondevelopment.com>
+T -105 3295 8 10 0 0 0 0 1
+documentation=https://www.silabs.com/Support%20Documents/TechnicalDocs/Si844x.pdf
+T -105 3038 8 10 0 0 0 0 1
+dist-license=GPLv2+
+P 0 1000 300 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=in
+T 355 995 5 10 1 1 0 0 1
+pinlabel=OUTA2
+T 205 1045 5 10 1 1 0 6 1
+pinnumber=5
+T 0 1000 5 10 0 0 0 0 1
+pinseq=5
+}
+P 0 700 300 700 1 0 0
+{
+T 0 700 5 10 0 0 0 0 1
+pintype=out
+T 355 695 5 10 1 1 0 0 1
+pinlabel=IOA1
+T 205 745 5 10 1 1 0 6 1
+pinnumber=6
+T 0 700 5 10 0 0 0 0 1
+pinseq=6
+}
+P 0 400 300 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=in
+T 355 395 5 10 1 1 0 0 1
+pinlabel=IOA2
+T 205 445 5 10 1 1 0 6 1
+pinnumber=7
+T 0 400 5 10 0 0 0 0 1
+pinseq=7
+}
+P 0 100 300 100 1 0 0
+{
+T 0 100 5 10 0 0 0 0 1
+pintype=pwr
+T 355 95 5 10 1 1 0 0 1
+pinlabel=GNDA
+T 205 145 5 10 1 1 0 6 1
+pinnumber=8
+T 0 100 5 10 0 0 0 0 1
+pinseq=8
+}
+P 0 2200 300 2200 1 0 0
+{
+T 0 2200 5 10 0 0 0 0 1
+pintype=pwr
+T 0 2200 5 10 0 0 0 0 1
+pinseq=1
+T 355 2195 5 10 1 1 0 0 1
+pinlabel=VCCA
+T 205 2245 5 10 1 1 0 6 1
+pinnumber=1
+}
+P 0 1900 300 1900 1 0 0
+{
+T 0 1900 5 10 0 0 0 0 1
+pintype=pwr
+T 0 1900 5 10 0 0 0 0 1
+pinseq=2
+T 355 1895 5 10 1 1 0 0 1
+pinlabel=INA1
+T 205 1945 5 10 1 1 0 6 1
+pinnumber=2
+}
+P 0 1600 300 1600 1 0 0
+{
+T 0 1600 5 10 0 0 0 0 1
+pintype=in
+T 0 1600 5 10 0 0 0 0 1
+pinseq=3
+T 355 1595 5 10 1 1 0 0 1
+pinlabel=INA2
+T 205 1645 5 10 1 1 0 6 1
+pinnumber=3
+}
+P 0 1300 300 1300 1 0 0
+{
+T 0 1300 5 10 0 0 0 0 1
+pintype=in
+T 0 1300 5 10 0 0 0 0 1
+pinseq=4
+T 355 1295 5 10 1 1 0 0 1
+pinlabel=OUTA1
+T 205 1345 5 10 1 1 0 6 1
+pinnumber=4
+}
+P 2200 1000 1900 1000 1 0 0
+{
+T 2200 1000 5 10 0 0 0 6 1
+pintype=out
+T 2200 1000 5 10 0 0 0 6 1
+pinseq=12
+T 1845 995 5 10 1 1 0 6 1
+pinlabel=INB2
+T 1995 1045 5 10 1 1 0 0 1
+pinnumber=12
+}
+P 2200 700 1900 700 1 0 0
+{
+T 2200 700 5 10 0 0 0 6 1
+pintype=in
+T 2200 700 5 10 0 0 0 6 1
+pinseq=11
+T 1845 695 5 10 1 1 0 6 1
+pinlabel=IOB1
+T 1995 745 5 10 1 1 0 0 1
+pinnumber=11
+}
+P 2200 400 1900 400 1 0 0
+{
+T 2200 400 5 10 0 0 0 6 1
+pintype=in
+T 2200 400 5 10 0 0 0 6 1
+pinseq=10
+T 1845 395 5 10 1 1 0 6 1
+pinlabel=IOB2
+T 1995 445 5 10 1 1 0 0 1
+pinnumber=10
+}
+P 2200 100 1900 100 1 0 0
+{
+T 2200 100 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 100 5 10 0 0 0 6 1
+pinseq=9
+T 1845 95 5 10 1 1 0 6 1
+pinlabel=GNDB
+T 1995 145 5 10 1 1 0 0 1
+pinnumber=9
+}
+P 2200 2200 1900 2200 1 0 0
+{
+T 2200 2200 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 2200 5 10 0 0 0 6 1
+pinseq=16
+T 1845 2195 5 10 1 1 0 6 1
+pinlabel=VCCB
+T 1995 2245 5 10 1 1 0 0 1
+pinnumber=16
+}
+P 2200 1900 1900 1900 1 0 0
+{
+T 2200 1900 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 1900 5 10 0 0 0 6 1
+pinseq=15
+T 1845 1895 5 10 1 1 0 6 1
+pinlabel=OUTB1
+T 1995 1945 5 10 1 1 0 0 1
+pinnumber=15
+}
+P 2200 1600 1900 1600 1 0 0
+{
+T 2200 1600 5 10 0 0 0 6 1
+pintype=out
+T 2200 1600 5 10 0 0 0 6 1
+pinseq=14
+T 1845 1595 5 10 1 1 0 6 1
+pinlabel=OUTB2
+T 1995 1645 5 10 1 1 0 0 1
+pinnumber=14
+}
+P 2200 1300 1900 1300 1 0 0
+{
+T 2200 1300 5 10 0 0 0 6 1
+pintype=out
+T 2200 1300 5 10 0 0 0 6 1
+pinseq=13
+T 1845 1295 5 10 1 1 0 6 1
+pinlabel=INB1
+T 1995 1345 5 10 1 1 0 0 1
+pinnumber=13
+}
+T 1400 700 9 10 1 0 90 0 2
+MAX14850
+
+B 300 0 1600 2400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1300 895 8 10 0 1 90 0 1
+footprint=QSOP16.fp
diff --git a/Combined/symbols/MAX18450.sym b/Combined/symbols/MAX18450.sym
new file mode 100644
index 0000000..5715386
--- /dev/null
+++ b/Combined/symbols/MAX18450.sym
@@ -0,0 +1,182 @@
+v 20130925 2
+P 0 1500 200 1500 1 0 0
+{
+T 0 1500 5 8 0 0 0 0 1
+pintype=power
+T 0 1500 5 8 0 0 0 0 1
+pinseq=1
+T 255 1495 5 8 1 1 0 0 1
+pinlabel=VCCA
+T 105 1545 5 8 1 1 0 6 1
+pinnumber=1
+}
+P 0 1300 200 1300 1 0 0
+{
+T 0 1300 5 8 0 0 0 0 1
+pintype=input
+T 0 1300 5 8 0 0 0 0 1
+pinseq=2
+T 255 1295 5 8 1 1 0 0 1
+pinlabel=INA1
+T 105 1345 5 8 1 1 0 6 1
+pinnumber=2
+}
+P 0 1100 200 1100 1 0 0
+{
+T 0 1100 5 8 0 0 0 0 1
+pintype=input
+T 0 1100 5 8 0 0 0 0 1
+pinseq=3
+T 255 1095 5 8 1 1 0 0 1
+pinlabel=INA2
+T 105 1145 5 8 1 1 0 6 1
+pinnumber=3
+}
+P 0 900 200 900 1 0 0
+{
+T 0 900 5 8 0 0 0 0 1
+pintype=output
+T 0 900 5 8 0 0 0 0 1
+pinseq=4
+T 255 895 5 8 1 1 0 0 1
+pinlabel=OUTA1
+T 105 945 5 8 1 1 0 6 1
+pinnumber=4
+}
+P 0 700 200 700 1 0 0
+{
+T 0 700 5 8 0 0 0 0 1
+pintype=output
+T 0 700 5 8 0 0 0 0 1
+pinseq=5
+T 255 695 5 8 1 1 0 0 1
+pinlabel=OUTA2
+T 105 745 5 8 1 1 0 6 1
+pinnumber=5
+}
+P 0 500 200 500 1 0 0
+{
+T 0 500 5 8 0 0 0 0 1
+pintype=io
+T 0 500 5 8 0 0 0 0 1
+pinseq=6
+T 255 495 5 8 1 1 0 0 1
+pinlabel=IOA1
+T 105 545 5 8 1 1 0 6 1
+pinnumber=6
+}
+P 0 300 200 300 1 0 0
+{
+T 0 300 5 8 0 0 0 0 1
+pintype=io
+T 0 300 5 8 0 0 0 0 1
+pinseq=7
+T 255 295 5 8 1 1 0 0 1
+pinlabel=IOA2
+T 105 345 5 8 1 1 0 6 1
+pinnumber=7
+}
+P 0 100 200 100 1 0 0
+{
+T 0 100 5 8 0 0 0 0 1
+pintype=ground
+T 0 100 5 8 0 0 0 0 1
+pinseq=8
+T 255 95 5 8 1 1 0 0 1
+pinlabel=GNDA
+T 105 145 5 8 1 1 0 6 1
+pinnumber=8
+}
+P 2400 1500 2200 1500 1 0 0
+{
+T 2400 1500 5 8 0 0 0 0 1
+pintype=power
+T 2400 1500 5 8 0 0 0 0 1
+pinseq=16
+T 2145 1495 5 8 1 1 0 6 1
+pinlabel=VCCB
+T 2295 1545 5 8 1 1 0 0 1
+pinnumber=16
+}
+P 2400 1300 2200 1300 1 0 0
+{
+T 2400 1300 5 8 0 0 0 0 1
+pintype=output
+T 2400 1300 5 8 0 0 0 0 1
+pinseq=15
+T 2145 1295 5 8 1 1 0 6 1
+pinlabel=OUTB1
+T 2295 1345 5 8 1 1 0 0 1
+pinnumber=15
+}
+P 2400 1100 2200 1100 1 0 0
+{
+T 2400 1100 5 8 0 0 0 0 1
+pintype=output
+T 2400 1100 5 8 0 0 0 0 1
+pinseq=14
+T 2145 1095 5 8 1 1 0 6 1
+pinlabel=OUTB2
+T 2295 1145 5 8 1 1 0 0 1
+pinnumber=14
+}
+P 2400 900 2200 900 1 0 0
+{
+T 2400 900 5 8 0 0 0 0 1
+pintype=input
+T 2400 900 5 8 0 0 0 0 1
+pinseq=13
+T 2145 895 5 8 1 1 0 6 1
+pinlabel=INB1
+T 2295 945 5 8 1 1 0 0 1
+pinnumber=13
+}
+P 2400 700 2200 700 1 0 0
+{
+T 2400 700 5 8 0 0 0 0 1
+pintype=input
+T 2400 700 5 8 0 0 0 0 1
+pinseq=12
+T 2145 695 5 8 1 1 0 6 1
+pinlabel=INB2
+T 2295 745 5 8 1 1 0 0 1
+pinnumber=12
+}
+P 2400 500 2200 500 1 0 0
+{
+T 2400 500 5 8 0 0 0 0 1
+pintype=io
+T 2400 500 5 8 0 0 0 0 1
+pinseq=11
+T 2145 495 5 8 1 1 0 6 1
+pinlabel=IOB1
+T 2295 545 5 8 1 1 0 0 1
+pinnumber=11
+}
+P 2400 300 2200 300 1 0 0
+{
+T 2400 300 5 8 0 0 0 0 1
+pintype=io
+T 2400 300 5 8 0 0 0 0 1
+pinseq=10
+T 2145 295 5 8 1 1 0 6 1
+pinlabel=IOB2
+T 2295 345 5 8 1 1 0 0 1
+pinnumber=10
+}
+P 2400 100 2200 100 1 0 0
+{
+T 2400 100 5 8 0 0 0 0 1
+pintype=ground
+T 2400 100 5 8 0 0 0 0 1
+pinseq=9
+T 2145 95 5 8 1 1 0 6 1
+pinlabel=GNDB
+T 2295 145 5 8 1 1 0 0 1
+pinnumber=9
+}
+B 200 0 2000 1700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1200 500 9 8 1 0 90 0 1
+MAX14850
+T 1095 100 8 8 1 1 0 0 1
+refdes=U?
diff --git a/Combined/symbols/Si8441.sym b/Combined/symbols/Si8441.sym
new file mode 100644
index 0000000..41ad338
--- /dev/null
+++ b/Combined/symbols/Si8441.sym
@@ -0,0 +1,191 @@
+v 20130925 2
+T 1600 2500 8 10 1 1 0 0 1
+refdes=U?
+T -105 3495 8 10 0 0 0 0 1
+author=Joseph Coffland <joseph@cauldrondevelopment.com>
+T -105 3295 8 10 0 0 0 0 1
+documentation=https://www.silabs.com/Support%20Documents/TechnicalDocs/Si844x.pdf
+T -105 3038 8 10 0 0 0 0 1
+dist-license=GPLv2+
+P 0 1000 300 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=in
+T 355 995 5 10 1 1 0 0 1
+pinlabel=A3
+T 205 1045 5 10 1 1 0 6 1
+pinnumber=5
+T 0 1000 5 10 0 0 0 0 1
+pinseq=5
+}
+P 0 700 300 700 1 0 0
+{
+T 0 700 5 10 0 0 0 0 1
+pintype=out
+T 355 695 5 10 1 1 0 0 1
+pinlabel=A4
+T 205 745 5 10 1 1 0 6 1
+pinnumber=6
+T 0 700 5 10 0 0 0 0 1
+pinseq=6
+}
+P 0 400 300 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=in
+T 355 395 5 10 1 1 0 0 1
+pinlabel=EN1
+T 205 445 5 10 1 1 0 6 1
+pinnumber=7
+T 0 400 5 10 0 0 0 0 1
+pinseq=7
+}
+P 0 100 300 100 1 0 0
+{
+T 0 100 5 10 0 0 0 0 1
+pintype=pwr
+T 355 95 5 10 1 1 0 0 1
+pinlabel=GND1
+T 205 145 5 10 1 1 0 6 1
+pinnumber=8
+T 0 100 5 10 0 0 0 0 1
+pinseq=8
+}
+P 0 2200 300 2200 1 0 0
+{
+T 0 2200 5 10 0 0 0 0 1
+pintype=pwr
+T 0 2200 5 10 0 0 0 0 1
+pinseq=1
+T 355 2195 5 10 1 1 0 0 1
+pinlabel=VDD1
+T 205 2245 5 10 1 1 0 6 1
+pinnumber=1
+}
+P 0 1900 300 1900 1 0 0
+{
+T 0 1900 5 10 0 0 0 0 1
+pintype=pwr
+T 0 1900 5 10 0 0 0 0 1
+pinseq=2
+T 355 1895 5 10 1 1 0 0 1
+pinlabel=GND1
+T 205 1945 5 10 1 1 0 6 1
+pinnumber=2
+}
+P 0 1600 300 1600 1 0 0
+{
+T 0 1600 5 10 0 0 0 0 1
+pintype=in
+T 0 1600 5 10 0 0 0 0 1
+pinseq=3
+T 355 1595 5 10 1 1 0 0 1
+pinlabel=A1
+T 205 1645 5 10 1 1 0 6 1
+pinnumber=3
+}
+P 0 1300 300 1300 1 0 0
+{
+T 0 1300 5 10 0 0 0 0 1
+pintype=in
+T 0 1300 5 10 0 0 0 0 1
+pinseq=4
+T 355 1295 5 10 1 1 0 0 1
+pinlabel=A2
+T 205 1345 5 10 1 1 0 6 1
+pinnumber=4
+}
+P 2200 1000 1900 1000 1 0 0
+{
+T 2200 1000 5 10 0 0 0 6 1
+pintype=out
+T 2200 1000 5 10 0 0 0 6 1
+pinseq=12
+T 1845 995 5 10 1 1 0 6 1
+pinlabel=B3
+T 1995 1045 5 10 1 1 0 0 1
+pinnumber=12
+}
+P 2200 700 1900 700 1 0 0
+{
+T 2200 700 5 10 0 0 0 6 1
+pintype=in
+T 2200 700 5 10 0 0 0 6 1
+pinseq=11
+T 1845 695 5 10 1 1 0 6 1
+pinlabel=B4
+T 1995 745 5 10 1 1 0 0 1
+pinnumber=11
+}
+P 2200 400 1900 400 1 0 0
+{
+T 2200 400 5 10 0 0 0 6 1
+pintype=in
+T 2200 400 5 10 0 0 0 6 1
+pinseq=10
+T 1845 395 5 10 1 1 0 6 1
+pinlabel=EN2
+T 1995 445 5 10 1 1 0 0 1
+pinnumber=10
+}
+P 2200 100 1900 100 1 0 0
+{
+T 2200 100 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 100 5 10 0 0 0 6 1
+pinseq=9
+T 1845 95 5 10 1 1 0 6 1
+pinlabel=GND2
+T 1995 145 5 10 1 1 0 0 1
+pinnumber=9
+}
+P 2200 2200 1900 2200 1 0 0
+{
+T 2200 2200 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 2200 5 10 0 0 0 6 1
+pinseq=16
+T 1845 2195 5 10 1 1 0 6 1
+pinlabel=VDD2
+T 1995 2245 5 10 1 1 0 0 1
+pinnumber=16
+}
+P 2200 1900 1900 1900 1 0 0
+{
+T 2200 1900 5 10 0 0 0 6 1
+pintype=pwr
+T 2200 1900 5 10 0 0 0 6 1
+pinseq=15
+T 1845 1895 5 10 1 1 0 6 1
+pinlabel=GND2
+T 1995 1945 5 10 1 1 0 0 1
+pinnumber=15
+}
+P 2200 1600 1900 1600 1 0 0
+{
+T 2200 1600 5 10 0 0 0 6 1
+pintype=out
+T 2200 1600 5 10 0 0 0 6 1
+pinseq=14
+T 1845 1595 5 10 1 1 0 6 1
+pinlabel=B1
+T 1995 1645 5 10 1 1 0 0 1
+pinnumber=14
+}
+P 2200 1300 1900 1300 1 0 0
+{
+T 2200 1300 5 10 0 0 0 6 1
+pintype=out
+T 2200 1300 5 10 0 0 0 6 1
+pinseq=13
+T 1845 1295 5 10 1 1 0 6 1
+pinlabel=B2
+T 1995 1345 5 10 1 1 0 0 1
+pinnumber=13
+}
+T 1300 900 9 10 1 0 90 0 2
+Si8441
+
+B 300 0 1600 2400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1300 895 8 10 1 1 90 0 1
+footprint=SOIC16
diff --git a/Combined/symbols/TMC2660.sym b/Combined/symbols/TMC2660.sym
new file mode 100644
index 0000000..9f92b93
--- /dev/null
+++ b/Combined/symbols/TMC2660.sym
@@ -0,0 +1,508 @@
+v 20130925 2
+T -8500 -4500 9 10 0 0 0 0 1
+author=DJ Delorie
+T -8500 -4500 9 10 0 0 0 0 1
+copyright=2006 DJ Delorie
+T -8500 -4500 9 10 0 0 0 0 1
+dist-license=GPL
+T -8500 -4500 9 10 0 0 0 0 1
+use-license=unlimited
+T -8500 -4500 9 10 0 0 0 0 1
+description=DB-9 numbering
+P 1300 0 1300 300 1 0 0
+{
+T 1300 0 5 10 0 0 270 2 1
+pintype=pas
+T 1300 355 5 10 1 1 90 0 1
+pinlabel=NC
+T 1250 205 5 10 1 1 90 6 1
+pinnumber=33
+T 1300 0 5 10 0 0 270 2 1
+pinseq=33
+}
+P 1600 0 1600 300 1 0 0
+{
+T 1600 0 5 10 0 0 270 2 1
+pintype=pwr
+T 1600 355 5 10 1 1 90 0 1
+pinlabel=OB1
+T 1550 205 5 10 1 1 90 6 1
+pinnumber=32
+T 1600 0 5 10 0 0 270 2 1
+pinseq=32
+}
+P 1900 0 1900 300 1 0 0
+{
+T 1900 0 5 10 0 0 270 2 1
+pintype=pwr
+T 1900 355 5 10 1 1 90 0 1
+pinlabel=OB1
+T 1850 205 5 10 1 1 90 6 1
+pinnumber=31
+T 1900 0 5 10 0 0 270 2 1
+pinseq=31
+}
+P 2200 0 2200 300 1 0 0
+{
+T 2200 0 5 10 0 0 270 2 1
+pintype=pwr
+T 2200 0 5 10 0 0 270 2 1
+pinseq=27
+T 2150 205 5 10 1 1 90 6 1
+pinnumber=27
+T 2200 355 5 10 1 1 90 0 1
+pinlabel=OB1
+}
+P 2500 0 2500 300 1 0 0
+{
+T 2500 0 5 10 0 0 270 2 1
+pintype=pwr
+T 2500 0 5 10 0 0 270 2 1
+pinseq=26
+T 2500 355 5 10 1 1 90 0 1
+pinlabel=OB1
+T 2450 205 5 10 1 1 90 6 1
+pinnumber=26
+}
+P 2800 0 2800 300 1 0 0
+{
+T 2800 0 5 10 0 0 270 2 1
+pintype=pwr
+T 2800 0 5 10 0 0 270 2 1
+pinseq=29
+T 2750 205 5 10 1 1 90 6 1
+pinnumber=29
+T 2800 355 5 10 1 1 90 0 1
+pinlabel=OB2
+}
+P 3100 0 3100 300 1 0 0
+{
+T 3100 0 5 10 0 0 270 2 1
+pintype=pwr
+T 3100 0 5 10 0 0 270 2 1
+pinseq=28
+T 3100 355 5 10 1 1 90 0 1
+pinlabel=OB2
+T 3050 205 5 10 1 1 90 6 1
+pinnumber=28
+}
+P 3400 0 3400 300 1 0 0
+{
+T 3400 0 5 10 0 0 270 2 1
+pintype=pwr
+T 3400 0 5 10 0 0 270 2 1
+pinseq=24
+T 3350 205 5 10 1 1 90 6 1
+pinnumber=24
+T 3400 355 5 10 1 1 90 0 1
+pinlabel=OB2
+}
+P 3700 0 3700 300 1 0 0
+{
+T 3700 0 5 10 0 0 270 2 1
+pintype=pwr
+T 3700 0 5 10 0 0 270 2 1
+pinseq=23
+T 3700 355 5 10 1 1 90 0 1
+pinlabel=OB2
+T 3650 205 5 10 1 1 90 6 1
+pinnumber=23
+}
+P 4600 4200 4600 3900 1 0 0
+{
+T 4600 4200 5 10 0 0 90 2 1
+pintype=pwr
+T 4600 4200 5 10 0 0 90 2 1
+pinseq=30
+T 4600 3845 5 10 1 1 90 6 1
+pinlabel=VSB
+T 4550 3995 5 10 1 1 90 0 1
+pinnumber=30
+}
+P 4200 0 4200 300 1 0 0
+{
+T 4200 0 5 10 0 0 270 2 1
+pintype=pwr
+T 4200 0 5 10 0 0 270 2 1
+pinseq=25
+T 4200 355 5 10 1 1 90 0 1
+pinlabel=BRB
+T 4150 205 5 10 1 1 90 6 1
+pinnumber=25
+}
+P 5400 3600 5100 3600 1 0 0
+{
+T 5400 3600 5 10 0 0 0 0 1
+pintype=pas
+T 5400 3600 5 10 0 0 0 0 1
+pinseq=1
+T 5045 3595 5 10 1 1 0 6 1
+pinlabel=NC
+T 5195 3645 5 10 1 1 0 0 1
+pinnumber=1
+}
+P 5400 3300 5100 3300 1 0 0
+{
+T 5400 3300 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 3300 5 10 0 0 0 0 1
+pinseq=2
+T 5045 3295 5 10 1 1 0 6 1
+pinlabel=OA1
+T 5195 3345 5 10 1 1 0 0 1
+pinnumber=2
+}
+P 5400 3000 5100 3000 1 0 0
+{
+T 5400 3000 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 3000 5 10 0 0 0 0 1
+pinseq=3
+T 5045 2995 5 10 1 1 0 6 1
+pinlabel=OA1
+T 5195 3045 5 10 1 1 0 0 1
+pinnumber=3
+}
+P 5400 2700 5100 2700 1 0 0
+{
+T 5400 2700 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 2700 5 10 0 0 0 0 1
+pinseq=7
+T 5195 2745 5 10 1 1 0 0 1
+pinnumber=7
+T 5045 2695 5 10 1 1 0 6 1
+pinlabel=OA1
+}
+P 5400 2400 5100 2400 1 0 0
+{
+T 5400 2400 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 2400 5 10 0 0 0 0 1
+pinseq=8
+T 5045 2395 5 10 1 1 0 6 1
+pinlabel=OA1
+T 5195 2445 5 10 1 1 0 0 1
+pinnumber=8
+}
+P 5400 2100 5100 2100 1 0 0
+{
+T 5400 2100 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 2100 5 10 0 0 0 0 1
+pinseq=5
+T 5195 2145 5 10 1 1 0 0 1
+pinnumber=5
+T 5045 2095 5 10 1 1 0 6 1
+pinlabel=OA2
+}
+P 5400 1800 5100 1800 1 0 0
+{
+T 5400 1800 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 1800 5 10 0 0 0 0 1
+pinseq=6
+T 5045 1795 5 10 1 1 0 6 1
+pinlabel=OA2
+T 5195 1845 5 10 1 1 0 0 1
+pinnumber=6
+}
+P 5400 1500 5100 1500 1 0 0
+{
+T 5400 1500 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 1500 5 10 0 0 0 0 1
+pinseq=10
+T 5195 1545 5 10 1 1 0 0 1
+pinnumber=10
+T 5045 1495 5 10 1 1 0 6 1
+pinlabel=OA2
+}
+P 5400 1200 5100 1200 1 0 0
+{
+T 5400 1200 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 1200 5 10 0 0 0 0 1
+pinseq=11
+T 5045 1195 5 10 1 1 0 6 1
+pinlabel=OA2
+T 5195 1245 5 10 1 1 0 0 1
+pinnumber=11
+}
+P 4300 4200 4300 3900 1 0 0
+{
+T 4300 4200 5 10 0 0 90 0 1
+pintype=pwr
+T 4300 4200 5 10 0 0 90 0 1
+pinseq=4
+T 4300 3845 5 10 1 1 90 6 1
+pinlabel=VSA
+T 4250 3995 5 10 1 1 90 0 1
+pinnumber=4
+}
+P 5400 700 5100 700 1 0 0
+{
+T 5400 700 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 700 5 10 0 0 0 0 1
+pinseq=9
+T 5045 695 5 10 1 1 0 6 1
+pinlabel=BRA
+T 5195 745 5 10 1 1 0 0 1
+pinnumber=9
+}
+P 0 2800 300 2800 1 0 0
+{
+T 0 2800 5 10 0 0 0 0 1
+pintype=out
+T 355 2795 5 10 1 1 0 0 1
+pinlabel=SDO
+T 205 2845 5 10 1 1 0 6 1
+pinnumber=14
+T 0 2800 5 10 0 0 0 0 1
+pinseq=14
+}
+P 0 3100 300 3100 1 0 0
+{
+T 0 3100 5 10 0 0 0 0 1
+pintype=in
+T 355 3095 5 10 1 1 0 0 1
+pinlabel=SDI
+T 205 3145 5 10 1 1 0 6 1
+pinnumber=15
+T 0 3100 5 10 0 0 0 0 1
+pinseq=15
+}
+P 0 3400 300 3400 1 0 0
+{
+T 0 3400 5 10 0 0 0 0 1
+pintype=in
+T 355 3395 5 10 1 1 0 0 1
+pinlabel=SCK
+T 205 3445 5 10 1 1 0 6 1
+pinnumber=16
+T 0 3400 5 10 0 0 0 0 1
+pinseq=16
+}
+P 0 3700 300 3700 1 0 0
+{
+T 0 3700 5 10 0 0 0 0 1
+pintype=in
+T 355 3695 5 10 1 1 0 0 1
+pinlabel=CSN
+T 205 3745 5 10 1 1 0 6 1
+pinnumber=18
+T 0 3700 5 10 0 0 0 0 1
+pinseq=18
+}
+P 0 2100 300 2100 1 0 0
+{
+T 0 2100 5 10 0 0 0 0 1
+pintype=in
+T 355 2095 5 10 1 1 0 0 1
+pinlabel=ENN
+T 205 2145 5 10 1 1 0 6 1
+pinnumber=19
+T 0 2100 5 10 0 0 0 0 1
+pinseq=19
+}
+P 0 400 300 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=out
+T 355 395 5 10 1 1 0 0 1
+pinlabel=SG_TST
+T 205 445 5 10 1 1 0 6 1
+pinnumber=38
+T 0 400 5 10 0 0 0 0 1
+pinseq=38
+}
+P 2800 4200 2800 3900 1 0 0
+{
+T 2800 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 2800 3845 5 10 1 1 90 6 1
+pinlabel=VCC_IO
+T 2750 3995 5 10 1 1 90 0 1
+pinnumber=40
+T 2800 4200 5 10 0 0 270 0 1
+pinseq=40
+}
+P 0 1700 300 1700 1 0 0
+{
+T 0 1700 5 10 0 0 0 0 1
+pintype=in
+T 355 1695 5 10 1 1 0 0 1
+pinlabel=DIR
+T 205 1745 5 10 1 1 0 6 1
+pinnumber=41
+T 0 1700 5 10 0 0 0 0 1
+pinseq=41
+}
+P 0 1400 300 1400 1 0 0
+{
+T 0 1400 5 10 0 0 0 0 1
+pintype=in
+T 355 1395 5 10 1 1 0 0 1
+pinlabel=STEP
+T 205 1445 5 10 1 1 0 6 1
+pinnumber=42
+T 0 1400 5 10 0 0 0 0 1
+pinseq=42
+}
+P 0 700 300 700 1 0 0
+{
+T 0 700 5 10 0 0 0 0 1
+pintype=in
+T 355 695 5 10 1 1 0 0 1
+pinlabel=TST_MODE
+T 205 745 5 10 1 1 0 6 1
+pinnumber=43
+T 0 700 5 10 0 0 0 0 1
+pinseq=43
+}
+P 2300 4200 2300 3900 1 0 0
+{
+T 2300 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 2300 3845 5 10 1 1 90 6 1
+pinlabel=GND
+T 2250 3995 5 10 1 1 90 0 1
+pinnumber=17
+T 2300 4200 5 10 0 0 270 0 1
+pinseq=17
+}
+P 1700 4200 1700 3900 1 0 0
+{
+T 1700 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 1700 3845 5 10 1 1 90 6 1
+pinlabel=GND
+T 1650 3995 5 10 1 1 90 0 1
+pinnumber=44
+T 1700 4200 5 10 0 0 270 0 1
+pinseq=44
+}
+P 2000 4200 2000 3900 1 0 0
+{
+T 2000 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 2000 3845 5 10 1 1 90 6 1
+pinlabel=GND
+T 1950 3995 5 10 1 1 90 0 1
+pinnumber=39
+T 2000 4200 5 10 0 0 270 0 1
+pinseq=39
+}
+P 5400 400 5100 400 1 0 0
+{
+T 5400 400 5 10 0 0 0 0 1
+pintype=pwr
+T 5400 400 5 10 0 0 0 0 1
+pinseq=12
+T 5045 395 5 10 1 1 0 6 1
+pinlabel=SRA
+T 5195 445 5 10 1 1 0 0 1
+pinnumber=12
+}
+P 4500 0 4500 300 1 0 0
+{
+T 4500 0 5 10 0 0 270 2 1
+pintype=pwr
+T 4500 0 5 10 0 0 270 2 1
+pinseq=22
+T 4500 355 5 10 1 1 90 0 1
+pinlabel=SRB
+T 4450 205 5 10 1 1 90 6 1
+pinnumber=22
+}
+P 3200 4200 3200 3900 1 0 0
+{
+T 3200 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 3200 3845 5 10 1 1 90 6 1
+pinlabel=5VOUT
+T 3150 3995 5 10 1 1 90 0 1
+pinnumber=13
+T 3200 4200 5 10 0 0 270 0 1
+pinseq=13
+}
+P 1300 4200 1300 3900 1 0 0
+{
+T 1300 4200 5 10 0 0 270 0 1
+pintype=pas
+T 1300 3845 5 10 1 1 90 6 1
+pinlabel=NC
+T 1250 3995 5 10 1 1 90 0 1
+pinnumber=20
+T 1300 4200 5 10 0 0 270 0 1
+pinseq=20
+}
+P 1000 4200 1000 3900 1 0 0
+{
+T 1000 4200 5 10 0 0 270 0 1
+pintype=pas
+T 1000 3845 5 10 1 1 90 6 1
+pinlabel=NC
+T 950 3995 5 10 1 1 90 0 1
+pinnumber=34
+T 1000 4200 5 10 0 0 270 0 1
+pinseq=34
+}
+P 0 1000 300 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=pas
+T 355 995 5 10 1 1 0 0 1
+pinlabel=TST_ANA
+T 205 1045 5 10 1 1 0 6 1
+pinnumber=37
+T 0 1000 5 10 0 0 0 0 1
+pinseq=37
+}
+P 0 2400 300 2400 1 0 0
+{
+T 0 2400 5 10 0 0 0 0 1
+pintype=in
+T 355 2395 5 10 1 1 0 0 1
+pinlabel=CLK
+T 205 2445 5 10 1 1 0 6 1
+pinnumber=21
+T 0 2400 5 10 0 0 0 0 1
+pinseq=21
+}
+P 3700 4200 3700 3900 1 0 0
+{
+T 3700 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 3700 3845 5 10 1 1 90 6 1
+pinlabel=VHS
+T 3650 3995 5 10 1 1 90 0 1
+pinnumber=35
+T 3700 4200 5 10 0 0 270 0 1
+pinseq=35
+}
+P 4000 4200 4000 3900 1 0 0
+{
+T 4000 4200 5 10 0 0 270 0 1
+pintype=pwr
+T 4000 3845 5 10 1 1 90 6 1
+pinlabel=VS
+T 3950 3995 5 10 1 1 90 0 1
+pinnumber=36
+T 4000 4200 5 10 0 0 270 0 1
+pinseq=36
+}
+T 2300 2200 9 10 1 0 0 0 1
+TMC2660
+T 2395 1995 8 10 1 1 0 0 1
+footprint=QFP44
+T 5095 4095 8 10 1 1 0 0 1
+refdes=U?
+T -105 5195 8 10 0 0 0 0 1
+author=Joseph Coffland <joseph@cauldrondevelopment.com>
+T -105 4995 8 10 0 0 0 0 1
+documentation=http://www.trinamic.com/_scripts/download.php?file=_articles%2Fproducts%2Fintegrated-circuits%2Ftmc2660%2F_datasheet%2FTMC2660_datasheet.pdf
+T -105 4738 8 10 0 0 0 0 1
+dist-license=GPLv2+
+B 300 300 4800 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
diff --git a/Combined/symbols/TQFP64_14.fp b/Combined/symbols/TQFP64_14.fp
new file mode 100644
index 0000000..072fc8e
--- /dev/null
+++ b/Combined/symbols/TQFP64_14.fp
@@ -0,0 +1,352 @@
+
+	
+        
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+	
+
+
+Element[0x00000000 "Square Quad-side flat pack" "" "TQFP64_14" 0 0 -2000 -6000 0 100 0x00000000]
+(
+
+	# left row
+
+
+
+
+
+	Pad[-34772  -23622  -30346  -23622  1574  3000 1874 "1" "1"  0x00000100]
+	
+	
+
+	Pad[-34772  -20473  -30346  -20473  1574  3000 1874 "2" "2"  0x00000100]
+	
+	
+
+	Pad[-34772  -17323  -30346  -17323  1574  3000 1874 "3" "3"  0x00000100]
+	
+	
+
+	Pad[-34772  -14174  -30346  -14174  1574  3000 1874 "4" "4"  0x00000100]
+	
+	
+
+	Pad[-34772  -11024  -30346  -11024  1574  3000 1874 "5" "5"  0x00000100]
+	
+	
+
+	Pad[-34772  -7874  -30346  -7874  1574  3000 1874 "6" "6"  0x00000100]
+	
+	
+
+	Pad[-34772  -4725  -30346  -4725  1574  3000 1874 "7" "7"  0x00000100]
+	
+	
+
+	Pad[-34772  -1575  -30346  -1575  1574  3000 1874 "8" "8"  0x00000100]
+	
+	
+
+	Pad[-34772  1574  -30346  1574  1574  3000 1874 "9" "9"  0x00000100]
+	
+	
+
+	Pad[-34772  4724  -30346  4724  1574  3000 1874 "10" "10"  0x00000100]
+	
+	
+
+	Pad[-34772  7874  -30346  7874  1574  3000 1874 "11" "11"  0x00000100]
+	
+	
+
+	Pad[-34772  11023  -30346  11023  1574  3000 1874 "12" "12"  0x00000100]
+	
+	
+
+	Pad[-34772  14173  -30346  14173  1574  3000 1874 "13" "13"  0x00000100]
+	
+	
+
+	Pad[-34772  17322  -30346  17322  1574  3000 1874 "14" "14"  0x00000100]
+	
+	
+
+	Pad[-34772  20472  -30346  20472  1574  3000 1874 "15" "15"  0x00000100]
+	
+	
+
+	Pad[-34772  23622  -30346  23622  1574  3000 1874 "16" "16"  0x00000100]
+	
+	
+
+
+	# bottom row
+
+
+
+
+	Pad[-23622 34772  -23622  30346  1574  3000 1874 "17" "17"  0x00000900]
+	
+	
+
+	Pad[-20473 34772  -20473  30346  1574  3000 1874 "18" "18"  0x00000900]
+	
+	
+
+	Pad[-17323 34772  -17323  30346  1574  3000 1874 "19" "19"  0x00000900]
+	
+	
+
+	Pad[-14174 34772  -14174  30346  1574  3000 1874 "20" "20"  0x00000900]
+	
+	
+
+	Pad[-11024 34772  -11024  30346  1574  3000 1874 "21" "21"  0x00000900]
+	
+	
+
+	Pad[-7874 34772  -7874  30346  1574  3000 1874 "22" "22"  0x00000900]
+	
+	
+
+	Pad[-4725 34772  -4725  30346  1574  3000 1874 "23" "23"  0x00000900]
+	
+	
+
+	Pad[-1575 34772  -1575  30346  1574  3000 1874 "24" "24"  0x00000900]
+	
+	
+
+	Pad[1574 34772  1574  30346  1574  3000 1874 "25" "25"  0x00000900]
+	
+	
+
+	Pad[4724 34772  4724  30346  1574  3000 1874 "26" "26"  0x00000900]
+	
+	
+
+	Pad[7874 34772  7874  30346  1574  3000 1874 "27" "27"  0x00000900]
+	
+	
+
+	Pad[11023 34772  11023  30346  1574  3000 1874 "28" "28"  0x00000900]
+	
+	
+
+	Pad[14173 34772  14173  30346  1574  3000 1874 "29" "29"  0x00000900]
+	
+	
+
+	Pad[17322 34772  17322  30346  1574  3000 1874 "30" "30"  0x00000900]
+	
+	
+
+	Pad[20472 34772  20472  30346  1574  3000 1874 "31" "31"  0x00000900]
+	
+	
+
+	Pad[23622 34772  23622  30346  1574  3000 1874 "32" "32"  0x00000900]
+	
+	
+
+
+	# right row
+
+
+
+
+	Pad[34772  23622  30346  23622  1574  3000 1874 "33" "33"  0x00000100]
+	
+	
+
+	Pad[34772  20473  30346  20473  1574  3000 1874 "34" "34"  0x00000100]
+	
+	
+
+	Pad[34772  17323  30346  17323  1574  3000 1874 "35" "35"  0x00000100]
+	
+	
+
+	Pad[34772  14174  30346  14174  1574  3000 1874 "36" "36"  0x00000100]
+	
+	
+
+	Pad[34772  11024  30346  11024  1574  3000 1874 "37" "37"  0x00000100]
+	
+	
+
+	Pad[34772  7874  30346  7874  1574  3000 1874 "38" "38"  0x00000100]
+	
+	
+
+	Pad[34772  4725  30346  4725  1574  3000 1874 "39" "39"  0x00000100]
+	
+	
+
+	Pad[34772  1575  30346  1575  1574  3000 1874 "40" "40"  0x00000100]
+	
+	
+
+	Pad[34772  -1574  30346  -1574  1574  3000 1874 "41" "41"  0x00000100]
+	
+	
+
+	Pad[34772  -4724  30346  -4724  1574  3000 1874 "42" "42"  0x00000100]
+	
+	
+
+	Pad[34772  -7874  30346  -7874  1574  3000 1874 "43" "43"  0x00000100]
+	
+	
+
+	Pad[34772  -11023  30346  -11023  1574  3000 1874 "44" "44"  0x00000100]
+	
+	
+
+	Pad[34772  -14173  30346  -14173  1574  3000 1874 "45" "45"  0x00000100]
+	
+	
+
+	Pad[34772  -17322  30346  -17322  1574  3000 1874 "46" "46"  0x00000100]
+	
+	
+
+	Pad[34772  -20472  30346  -20472  1574  3000 1874 "47" "47"  0x00000100]
+	
+	
+
+	Pad[34772  -23622  30346  -23622  1574  3000 1874 "48" "48"  0x00000100]
+	
+	
+
+
+	# top row
+
+
+
+
+	Pad[23622 -34772  23622  -30346  1574  3000 1874 "49" "49"  0x00000900]
+	
+	
+	
+
+	Pad[20473 -34772  20473  -30346  1574  3000 1874 "50" "50"  0x00000900]
+	
+	
+	
+
+	Pad[17323 -34772  17323  -30346  1574  3000 1874 "51" "51"  0x00000900]
+	
+	
+	
+
+	Pad[14174 -34772  14174  -30346  1574  3000 1874 "52" "52"  0x00000900]
+	
+	
+	
+
+	Pad[11024 -34772  11024  -30346  1574  3000 1874 "53" "53"  0x00000900]
+	
+	
+	
+
+	Pad[7874 -34772  7874  -30346  1574  3000 1874 "54" "54"  0x00000900]
+	
+	
+	
+
+	Pad[4725 -34772  4725  -30346  1574  3000 1874 "55" "55"  0x00000900]
+	
+	
+	
+
+	Pad[1575 -34772  1575  -30346  1574  3000 1874 "56" "56"  0x00000900]
+	
+	
+	
+
+	Pad[-1574 -34772  -1574  -30346  1574  3000 1874 "57" "57"  0x00000900]
+	
+	
+	
+
+	Pad[-4724 -34772  -4724  -30346  1574  3000 1874 "58" "58"  0x00000900]
+	
+	
+	
+
+	Pad[-7874 -34772  -7874  -30346  1574  3000 1874 "59" "59"  0x00000900]
+	
+	
+	
+
+	Pad[-11023 -34772  -11023  -30346  1574  3000 1874 "60" "60"  0x00000900]
+	
+	
+	
+
+	Pad[-14173 -34772  -14173  -30346  1574  3000 1874 "61" "61"  0x00000900]
+	
+	
+	
+
+	Pad[-17322 -34772  -17322  -30346  1574  3000 1874 "62" "62"  0x00000900]
+	
+	
+	
+
+	Pad[-20472 -34772  -20472  -30346  1574  3000 1874 "63" "63"  0x00000900]
+	
+	
+	
+
+	Pad[-23622 -34772  -23622  -30346  1574  3000 1874 "64" "64"  0x00000900]
+	
+	
+	
+
+
+	# exposed paddle (if this is an exposed paddle part) 
+
+
+	# top
+	ElementLine[-24259 -27159 27159 -27159 800]
+	# right
+	ElementLine[27159 -27159 27159 27159 800]
+	# bottom
+	ElementLine[27159 27159 -27159 27159 800]
+	# left
+	ElementLine[-27159 27159 -27159 -24259 800]
+	# angled corner
+	ElementLine[-27159 -24259 -24259 -27159 800]
+
+	ElementArc[-24259 -24259 1000 1000 0 360 800]
+
+)
+
diff --git a/Combined/symbols/UA78Mxx.sym b/Combined/symbols/UA78Mxx.sym
new file mode 100644
index 0000000..e385d97
--- /dev/null
+++ b/Combined/symbols/UA78Mxx.sym
@@ -0,0 +1,58 @@
+v 20130925 2
+P 1800 700 1500 700 1 0 0
+{
+T 2000 700 5 10 0 0 180 0 1
+pintype=pwr
+T 1445 695 5 10 1 1 0 6 1
+pinlabel=output
+T 1595 745 5 10 1 1 0 0 1
+pinnumber=3
+T 2000 700 5 10 0 0 180 0 1
+pinseq=3
+}
+P 900 0 900 300 1 0 0
+{
+T 900 -200 5 10 0 0 90 0 1
+pintype=pwr
+T 1145 500 5 10 1 1 180 0 1
+pinlabel=G
+T 850 205 5 10 1 1 90 6 1
+pinnumber=2
+T 900 -200 5 10 0 0 90 0 1
+pinseq=2
+}
+P 0 700 300 700 1 0 0
+{
+T -200 700 5 10 0 0 180 0 1
+pintype=pwr
+T 355 695 5 10 1 1 0 0 1
+pinlabel=input
+T 205 745 5 10 1 1 0 6 1
+pinnumber=1
+T -200 700 5 10 0 0 180 0 1
+pinseq=1
+}
+T 1005 1055 8 10 1 1 180 0 1
+device=uA78Mxx
+T 1655 1205 8 10 0 0 180 0 1
+footprint=SOT-223-4
+B 300 300 1200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1195 920 8 10 1 1 0 0 1
+refdes=U?
+T -5 1693 8 10 0 0 0 0 1
+author=Joseph Coffland
+T -5 1493 8 10 0 0 0 0 1
+dist-license=GPLv2+
+T -5 1293 8 10 0 0 0 0 1
+documentation=http://www.mouser.com/ds/2/405/ua78m33-555740.pdf
+P 1100 0 1100 300 1 0 0
+{
+T 1100 0 5 10 0 0 0 0 1
+pintype=power
+T 945 500 5 10 1 1 180 0 1
+pinlabel=G
+T 1050 205 5 10 1 1 90 6 1
+pinnumber=4
+T 1100 0 5 10 0 0 0 0 1
+pinseq=4
+}
diff --git a/Combined/symbols/Vs.sym b/Combined/symbols/Vs.sym
new file mode 100644
index 0000000..5ef09e8
--- /dev/null
+++ b/Combined/symbols/Vs.sym
@@ -0,0 +1,31 @@
+v 20100214 2
+T 100 100 0 1 0 0 0 0 1
+gedasymbols::url=http://www.gedasymbols.org/user/amand_tihon/symbols/power/5V-1.sym
+P 200 0 200 200 1 0 0
+{
+T 300 100 5 6 0 1 0 0 1
+pinnumber=1
+T 200 100 5 6 0 1 0 0 1
+pinseq=1
+T 250 100 5 6 0 1 0 0 1
+pinlabel=1
+T 225 25 5 6 0 1 0 0 1
+pintype=pwr
+}
+T 200 325 9 10 1 0 0 3 1
+Vs
+T 100 500 8 10 0 0 0 0 1
+net=Vs:1
+V 200 250 50 3 10 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 100 700 5 10 0 0 0 0 1
+device=none
+T 100 900 5 10 0 0 0 0 1
+description=+5V power rail, isolated for motors
+T 100 1100 5 10 0 0 0 0 1
+author=Amand Tihon amand.tihon@alrj.org, edited by Doug Coffland
+T 100 1300 5 10 0 0 0 0 1
+dist-license=GPL3, http://www.gnu.org/licenses/gpl-3.0.txt
+T 100 1500 5 10 0 0 0 0 1
+use-license=unrestricted
+T 100 1700 5 10 0 0 0 0 1
+numslots=0
diff --git a/Combined/symbols/cap.sym b/Combined/symbols/cap.sym
new file mode 100644
index 0000000..6796fbc
--- /dev/null
+++ b/Combined/symbols/cap.sym
@@ -0,0 +1,39 @@
+v 20130925 2
+P 100 100 175 100 1 0 0
+{
+T 25 150 5 8 0 1 0 6 1
+pinnumber=1
+T 25 50 5 8 0 1 0 8 1
+pinseq=1
+T 75 100 9 8 0 1 0 0 1
+pinlabel=1
+T 75 100 5 8 0 1 0 2 1
+pintype=pas
+}
+P 500 100 425 100 1 0 0
+{
+T 575 150 5 8 0 1 0 0 1
+pinnumber=2
+T 575 50 5 8 0 1 0 2 1
+pinseq=2
+T 525 100 9 8 0 1 0 6 1
+pinlabel=2
+T 525 100 5 8 0 1 0 8 1
+pintype=pas
+}
+L 275 200 275 0 3 0 0 0 -1 -1
+L 325 200 325 0 3 0 0 0 -1 -1
+L 425 100 325 100 3 0 0 0 -1 -1
+L 275 100 175 100 3 0 0 0 -1 -1
+T 0 600 5 10 0 0 0 0 1
+device=CAPACITOR
+T -50 150 8 10 1 1 0 0 1
+refdes=C?
+T 0 1200 5 10 0 0 0 0 1
+description=capacitor
+T 0 1000 5 10 0 0 0 0 1
+numslots=0
+T 0 800 5 10 0 0 0 0 1
+symversion=0.1
+T 450 150 8 10 1 1 0 0 1
+value=?F
diff --git a/Combined/symbols/clock_driver.sym b/Combined/symbols/clock_driver.sym
new file mode 100644
index 0000000..2a3b3d5
--- /dev/null
+++ b/Combined/symbols/clock_driver.sym
@@ -0,0 +1,104 @@
+v 20130925 2
+P 0 1000 200 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=input
+T 255 995 5 10 1 1 0 0 1
+pinlabel=ICLK
+T 105 1045 5 10 0 1 0 6 1
+pinnumber=1
+T 0 1000 5 10 0 0 0 0 1
+pinseq=1
+}
+P 0 800 200 800 1 0 0
+{
+T 0 800 5 10 0 0 0 0 1
+pintype=input
+T 255 795 5 10 1 1 0 0 1
+pinlabel=OE
+T 105 845 5 10 0 1 0 6 1
+pinnumber=8
+T 0 800 5 10 0 0 0 0 1
+pinseq=8
+}
+P 1100 0 1100 200 1 0 0
+{
+T 1100 0 5 10 0 0 0 0 1
+pintype=ground
+T 1345 400 5 10 1 1 180 0 1
+pinlabel=GND
+T 1050 105 5 10 0 1 90 6 1
+pinnumber=6
+T 1100 0 5 10 0 0 0 0 1
+pinseq=6
+}
+P 2200 1500 2000 1500 1 0 0
+{
+T 2200 1500 5 10 0 0 0 0 1
+pintype=output
+T 1945 1495 5 10 1 1 0 6 1
+pinlabel=Q1
+T 2095 1545 5 10 0 1 0 0 1
+pinnumber=2
+T 2200 1500 5 10 0 0 0 0 1
+pinseq=2
+}
+P 2200 1300 2000 1300 1 0 0
+{
+T 2200 1300 5 10 0 0 0 0 1
+pintype=output
+T 1945 1295 5 10 1 1 0 6 1
+pinlabel=Q2
+T 2095 1345 5 10 0 1 0 0 1
+pinnumber=3
+T 2200 1300 5 10 0 0 0 0 1
+pinseq=3
+}
+P 2200 1100 2000 1100 1 0 0
+{
+T 2200 1100 5 10 0 0 0 0 1
+pintype=output
+T 1945 1095 5 10 1 1 0 6 1
+pinlabel=Q3
+T 2095 1145 5 10 0 1 0 0 1
+pinnumber=4
+T 2200 1100 5 10 0 0 0 0 1
+pinseq=4
+}
+P 2200 900 2000 900 1 0 0
+{
+T 2200 900 5 10 0 0 0 0 1
+pintype=output
+T 1945 895 5 10 1 1 0 6 1
+pinlabel=Q4
+T 2095 945 5 10 0 1 0 0 1
+pinnumber=5
+T 2200 900 5 10 0 0 0 0 1
+pinseq=5
+}
+P 1100 2300 1100 2100 1 0 0
+{
+T 1100 2300 5 10 0 0 0 0 1
+pintype=power
+T 955 2000 5 10 1 1 180 6 1
+pinlabel=VDD
+T 1050 2195 5 10 0 1 90 0 1
+pinnumber=7
+T 1100 2300 5 10 0 0 0 0 1
+pinseq=7
+}
+B 200 200 1800 1900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 295 295 8 10 1 1 0 0 1
+refdes=CD?
+L 1000 1000 1000 1400 3 0 0 0 -1 -1
+L 1000 1400 1200 1200 3 0 0 0 -1 -1
+L 1200 1200 1000 1000 3 0 0 0 -1 -1
+L 1200 1200 1300 1200 3 0 0 0 -1 -1
+L 1300 1500 1300 900 3 0 0 0 -1 -1
+L 1300 900 1400 900 3 0 0 0 -1 -1
+L 1300 1100 1400 1100 3 0 0 0 -1 -1
+L 1300 1300 1400 1300 3 0 0 0 -1 -1
+L 1300 1500 1400 1500 3 0 0 0 -1 -1
+L 1000 1200 900 1200 3 0 0 0 -1 -1
+T 600 1600 9 10 1 0 0 0 1
+Clock Driver
diff --git a/Combined/symbols/crystal.sym b/Combined/symbols/crystal.sym
new file mode 100644
index 0000000..8c2bc8e
--- /dev/null
+++ b/Combined/symbols/crystal.sym
@@ -0,0 +1,36 @@
+v 20130925 2
+P 0 100 100 100 1 0 0
+{
+T 150 150 5 8 0 1 0 6 1
+pinnumber=1
+T 150 50 5 8 0 1 0 8 1
+pinseq=1
+T 250 100 9 8 0 1 0 0 1
+pinlabel=1
+T 250 100 5 8 0 1 0 2 1
+pintype=pas
+}
+P 300 100 400 100 1 0 1
+{
+T 550 150 5 8 0 1 0 0 1
+pinnumber=2
+T 550 50 5 8 0 1 0 2 1
+pinseq=2
+T 450 100 9 8 0 1 0 6 1
+pinlabel=2
+T 450 100 5 8 0 1 0 8 1
+pintype=pas
+}
+B 150 50 100 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 200 500 5 10 0 0 0 0 1
+device=CRYSTAL
+L 100 200 100 0 3 0 0 0 -1 -1
+L 300 200 300 0 3 0 0 0 -1 -1
+T 100 250 8 10 1 1 0 0 1
+refdes=U?
+T 200 1100 5 10 0 0 0 0 1
+description=crystal
+T 200 900 5 10 0 0 0 0 1
+numslots=0
+T 200 700 5 10 0 0 0 0 1
+symversion=0.1
diff --git a/Combined/symbols/crystal_oscillator.sym b/Combined/symbols/crystal_oscillator.sym
new file mode 100644
index 0000000..70c0f56
--- /dev/null
+++ b/Combined/symbols/crystal_oscillator.sym
@@ -0,0 +1,57 @@
+v 20130925 2
+P 500 2000 500 1800 1 0 0
+{
+T 500 2000 5 10 0 0 0 0 1
+pintype=power
+T 500 1745 5 10 1 1 90 6 1
+pinlabel=Vin
+T 450 1895 5 10 1 1 90 0 1
+pinnumber=4
+T 500 2000 5 10 0 0 0 0 1
+pinseq=4
+}
+P 2200 0 2200 200 1 0 0
+{
+T 2200 0 5 10 0 0 0 0 1
+pintype=ground
+T 2200 255 5 10 1 1 90 0 1
+pinlabel=GND
+T 2150 105 5 10 1 1 90 6 1
+pinnumber=2
+T 2200 0 5 10 0 0 0 0 1
+pinseq=2
+}
+P 0 400 200 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=input
+T 255 395 5 10 1 1 0 0 1
+pinlabel=EOH
+T 105 445 5 10 1 1 0 6 1
+pinnumber=1
+T 0 400 5 10 0 0 0 0 1
+pinseq=1
+}
+P 2600 1600 2400 1600 1 0 0
+{
+T 2600 1600 5 10 0 0 0 0 1
+pintype=output
+T 2345 1495 5 10 1 1 0 6 1
+pinlabel=OUTPUT
+T 2495 1645 5 10 1 1 0 0 1
+pinnumber=3
+T 2600 1600 5 10 0 0 0 0 1
+pinseq=3
+}
+B 200 200 2200 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 900 1000 1000 1000 3 0 0 0 -1 -1
+L 1000 1000 1000 1300 3 0 0 0 -1 -1
+L 1000 1300 1300 1300 3 0 0 0 -1 -1
+L 1300 1300 1300 1000 3 0 0 0 -1 -1
+L 1300 1000 1600 1000 3 0 0 0 -1 -1
+L 1600 1000 1600 1300 3 0 0 0 -1 -1
+L 1600 1300 1700 1300 3 0 0 0 -1 -1
+T 295 1095 8 10 1 1 0 0 1
+refdes=OSC?
+T 995 595 8 10 1 1 0 0 1
+value=?MHz
diff --git a/Combined/symbols/gnd.sym b/Combined/symbols/gnd.sym
new file mode 100644
index 0000000..11a22c2
--- /dev/null
+++ b/Combined/symbols/gnd.sym
@@ -0,0 +1,17 @@
+v 20130925 2
+P 100 150 100 300 1 0 1
+{
+T 158 161 5 4 0 1 0 0 1
+pinnumber=1
+T 158 161 5 4 0 0 0 0 1
+pinseq=1
+T 158 161 5 4 0 1 0 0 1
+pinlabel=1
+T 158 161 5 4 0 1 0 0 1
+pintype=pwr
+}
+L 0 150 200 150 3 0 0 0 -1 -1
+L 55 100 145 100 3 0 0 0 -1 -1
+L 80 60 120 60 3 0 0 0 -1 -1
+T 300 50 8 10 0 0 0 0 1
+net=GND:1
diff --git a/Combined/symbols/header6.sym b/Combined/symbols/header6.sym
new file mode 100644
index 0000000..7056e08
--- /dev/null
+++ b/Combined/symbols/header6.sym
@@ -0,0 +1,64 @@
+v 20130925 2
+P 1000 1400 1300 1400 1 0 1
+{
+T 1100 1450 5 10 1 1 0 0 1
+pinnumber=4
+T 1100 1450 5 10 0 0 0 0 1
+pinseq=4
+}
+V 800 1400 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 1400 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 1700 1300 1700 1 0 0
+{
+T 1100 1750 5 10 1 1 0 0 1
+pinnumber=1
+T 1100 1750 5 10 0 0 0 0 1
+pinseq=1
+}
+P 1000 800 1300 800 1 0 1
+{
+T 1100 850 5 10 1 1 0 0 1
+pinnumber=5
+T 1100 850 5 10 0 0 0 0 1
+pinseq=5
+}
+V 800 800 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 800 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 1100 1300 1100 1 0 0
+{
+T 1100 1150 5 10 1 1 0 0 1
+pinnumber=2
+T 1100 1150 5 10 0 0 0 0 1
+pinseq=2
+}
+P 1000 200 1300 200 1 0 1
+{
+T 1100 250 5 10 1 1 0 0 1
+pinnumber=6
+T 1100 250 5 10 0 0 0 0 1
+pinseq=6
+}
+V 800 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 500 1300 500 1 0 0
+{
+T 1100 550 5 10 1 1 0 0 1
+pinnumber=3
+T 1100 550 5 10 0 0 0 0 1
+pinseq=3
+}
+T 200 1900 8 10 1 1 0 0 1
+refdes=J?
+L 350 1550 500 1700 1 0 0 0 -1 -1
+L 350 950 500 1100 1 0 0 0 -1 -1
+L 350 350 500 500 1 0 0 0 -1 -1
+T 0 -1200 9 10 0 0 0 0 1
+author=DJ Delorie
+T 0 -1200 9 10 0 0 0 0 1
+copyright=2006 DJ Delorie
+T 0 -1200 9 10 0 0 0 0 1
+dist-license=GPL
+T 0 -1200 9 10 0 0 0 0 1
+use-license=unlimited
+T 0 -1200 9 10 0 0 0 0 1
+description=DB-9 numbering
diff --git a/Combined/symbols/header9.sym b/Combined/symbols/header9.sym
new file mode 100644
index 0000000..693391a
--- /dev/null
+++ b/Combined/symbols/header9.sym
@@ -0,0 +1,91 @@
+v 20060123 1
+P 1000 2600 1300 2600 1 0 1
+{
+T 1100 2650 5 10 1 1 0 0 1
+pinnumber=6
+T 1100 2650 5 10 0 0 0 0 1
+pinseq=6
+}
+V 800 2600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 2600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 2900 1300 2900 1 0 0
+{
+T 1100 2950 5 10 1 1 0 0 1
+pinnumber=1
+T 1100 2950 5 10 0 0 0 0 1
+pinseq=1
+}
+P 1000 2000 1300 2000 1 0 1
+{
+T 1100 2050 5 10 1 1 0 0 1
+pinnumber=7
+T 1100 2050 5 10 0 0 0 0 1
+pinseq=7
+}
+V 800 2000 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 2000 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 2300 1300 2300 1 0 0
+{
+T 1100 2350 5 10 1 1 0 0 1
+pinnumber=2
+T 1100 2350 5 10 0 0 0 0 1
+pinseq=2
+}
+P 1000 1400 1300 1400 1 0 1
+{
+T 1100 1450 5 10 1 1 0 0 1
+pinnumber=8
+T 1100 1450 5 10 0 0 0 0 1
+pinseq=8
+}
+V 800 1400 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 1400 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 1700 1300 1700 1 0 0
+{
+T 1100 1750 5 10 1 1 0 0 1
+pinnumber=3
+T 1100 1750 5 10 0 0 0 0 1
+pinseq=3
+}
+P 1000 800 1300 800 1 0 1
+{
+T 1100 850 5 10 1 1 0 0 1
+pinnumber=9
+T 1100 850 5 10 0 0 0 0 1
+pinseq=9
+}
+V 800 800 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 800 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 1100 1300 1100 1 0 0
+{
+T 1100 1150 5 10 1 1 0 0 1
+pinnumber=4
+T 1100 1150 5 10 0 0 0 0 1
+pinseq=4
+}
+V 800 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 200 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 500 500 1300 500 1 0 0
+{
+T 1100 550 5 10 1 1 0 0 1
+pinnumber=5
+T 1100 550 5 10 0 0 0 0 1
+pinseq=5
+}
+T 200 3100 8 10 1 1 0 0 1
+refdes=J?
+L 350 2750 500 2900 1 0 0 0 -1 -1
+L 350 2150 500 2300 1 0 0 0 -1 -1
+L 350 1550 500 1700 1 0 0 0 -1 -1
+L 350 950 500 1100 1 0 0 0 -1 -1
+L 350 350 500 500 1 0 0 0 -1 -1
+T 0 0 9 10 0 0 0 0 1
+author=DJ Delorie
+T 0 0 9 10 0 0 0 0 1
+copyright=2006 DJ Delorie
+T 0 0 9 10 0 0 0 0 1
+dist-license=GPL
+T 0 0 9 10 0 0 0 0 1
+use-license=unlimited
+T 0 0 9 10 0 0 0 0 1
+description=DB-9 numbering
diff --git a/Combined/symbols/input.sym b/Combined/symbols/input.sym
new file mode 100644
index 0000000..225e5d7
--- /dev/null
+++ b/Combined/symbols/input.sym
@@ -0,0 +1,15 @@
+v 20130925 2
+P 650 100 800 100 1 0 1
+{
+T 450 50 5 6 0 1 0 0 1
+pinnumber=1
+T 450 50 5 6 0 0 0 0 1
+pinseq=1
+}
+L 300 150 300 50 3 0 0 0 -1 -1
+L 300 150 600 150 3 0 0 0 -1 -1
+L 600 150 650 100 3 0 0 0 -1 -1
+L 650 100 600 50 3 0 0 0 -1 -1
+L 600 50 300 50 3 0 0 0 -1 -1
+T -300 250 5 10 0 0 0 0 1
+device=INPUT
diff --git a/Combined/symbols/io.sym b/Combined/symbols/io.sym
new file mode 100644
index 0000000..b9aa1f2
--- /dev/null
+++ b/Combined/symbols/io.sym
@@ -0,0 +1,26 @@
+v 20130925 2
+P 0 100 150 100 1 0 0
+{
+T 150 150 5 10 0 1 0 6 1
+pinnumber=1
+T 250 250 9 10 0 0 0 0 1
+pinlabel=I/O
+T 250 450 5 10 0 0 0 0 1
+pinseq=1
+T 250 350 5 10 0 0 0 0 1
+pintype=io
+}
+L 450 150 500 100 3 0 0 0 -1 -1
+L 500 100 450 50 3 0 0 0 -1 -1
+L 150 100 200 50 3 0 0 0 -1 -1
+L 200 150 150 100 3 0 0 0 -1 -1
+L 200 150 450 150 3 0 0 0 -1 -1
+L 200 50 450 50 3 0 0 0 -1 -1
+T 500 50 5 10 1 1 0 0 1
+net=IO:1
+T 200 600 5 10 0 0 0 0 1
+device=none
+T 200 700 5 10 0 0 0 0 1
+description=I/O module port
+T 900 100 5 10 0 1 0 1 1
+value=IO
diff --git a/Combined/symbols/isolation.sym b/Combined/symbols/isolation.sym
new file mode 100644
index 0000000..3954d76
--- /dev/null
+++ b/Combined/symbols/isolation.sym
@@ -0,0 +1,680 @@
+v 20130925 2
+P 900 0 900 200 1 0 0
+{
+T 900 0 5 8 0 0 0 0 1
+pintype=input
+T 900 255 5 8 1 1 90 0 1
+pinlabel=spi_clk
+T 850 105 5 8 0 1 90 6 1
+pinnumber=1
+T 900 0 5 8 0 0 0 0 1
+pinseq=1
+}
+P 1100 0 1100 200 1 0 0
+{
+T 1100 0 5 8 0 0 0 0 1
+pintype=output
+T 1100 255 5 8 1 1 90 0 1
+pinlabel=spi_miso
+T 1050 105 5 8 0 1 90 6 1
+pinnumber=2
+T 1100 0 5 8 0 0 0 0 1
+pinseq=2
+}
+P 1300 0 1300 200 1 0 0
+{
+T 1300 0 5 8 0 0 0 0 1
+pintype=input
+T 1300 255 5 8 1 1 90 0 1
+pinlabel=spi_mosi
+T 1250 105 5 8 0 1 90 6 1
+pinnumber=3
+T 1300 0 5 8 0 0 0 0 1
+pinseq=3
+}
+P 1600 0 1600 200 1 0 0
+{
+T 1600 0 5 8 0 0 0 0 1
+pintype=input
+T 1600 255 5 8 1 1 90 0 1
+pinlabel=step_x
+T 1550 105 5 8 0 1 90 6 1
+pinnumber=4
+T 1600 0 5 8 0 0 0 0 1
+pinseq=4
+}
+P 1800 0 1800 200 1 0 0
+{
+T 1800 0 5 8 0 0 0 0 1
+pintype=input
+T 1800 255 5 8 1 1 90 0 1
+pinlabel=dir_x
+T 1750 105 5 8 0 1 90 6 1
+pinnumber=5
+T 1800 0 5 8 0 0 0 0 1
+pinseq=5
+}
+P 2000 0 2000 200 1 0 0
+{
+T 2000 0 5 8 0 0 0 0 1
+pintype=input
+T 2000 255 5 8 1 1 90 0 1
+pinlabel=enable_x
+T 1950 105 5 8 0 1 90 6 1
+pinnumber=6
+T 2000 0 5 8 0 0 0 0 1
+pinseq=6
+}
+P 2200 0 2200 200 1 0 0
+{
+T 2200 0 5 8 0 0 0 0 1
+pintype=input
+T 2200 255 5 8 1 1 90 0 1
+pinlabel=spi_cs_x
+T 2150 105 5 8 0 1 90 6 1
+pinnumber=7
+T 2200 0 5 8 0 0 0 0 1
+pinseq=7
+}
+P 2400 0 2400 200 1 0 0
+{
+T 2400 0 5 8 0 0 0 0 1
+pintype=output
+T 2400 255 5 8 1 1 90 0 1
+pinlabel=fault_x
+T 2350 105 5 8 0 1 90 6 1
+pinnumber=8
+T 2400 0 5 8 0 0 0 0 1
+pinseq=8
+}
+P 2700 0 2700 200 1 0 0
+{
+T 2700 0 5 8 0 0 0 0 1
+pintype=input
+T 2650 105 5 8 0 1 90 6 1
+pinnumber=9
+T 2700 0 5 8 0 0 0 0 1
+pinseq=9
+T 2700 255 5 8 1 1 90 0 1
+pinlabel=step_y
+}
+P 2900 0 2900 200 1 0 0
+{
+T 2900 0 5 8 0 0 0 0 1
+pintype=input
+T 2850 105 5 8 0 1 90 6 1
+pinnumber=10
+T 2900 0 5 8 0 0 0 0 1
+pinseq=10
+T 2900 255 5 8 1 1 90 0 1
+pinlabel=dir_y
+}
+P 3100 0 3100 200 1 0 0
+{
+T 3100 0 5 8 0 0 0 0 1
+pintype=input
+T 3050 105 5 8 0 1 90 6 1
+pinnumber=11
+T 3100 0 5 8 0 0 0 0 1
+pinseq=11
+T 3100 255 5 8 1 1 90 0 1
+pinlabel=enable_y
+}
+P 3300 0 3300 200 1 0 0
+{
+T 3300 0 5 8 0 0 0 0 1
+pintype=input
+T 3250 105 5 8 0 1 90 6 1
+pinnumber=12
+T 3300 0 5 8 0 0 0 0 1
+pinseq=12
+T 3300 255 5 8 1 1 90 0 1
+pinlabel=spi_cs_y
+}
+P 3500 0 3500 200 1 0 0
+{
+T 3500 0 5 8 0 0 0 0 1
+pintype=output
+T 3450 105 5 8 0 1 90 6 1
+pinnumber=13
+T 3500 0 5 8 0 0 0 0 1
+pinseq=13
+T 3500 255 5 8 1 1 90 0 1
+pinlabel=fault_y
+}
+P 3800 0 3800 200 1 0 0
+{
+T 3800 0 5 8 0 0 0 0 1
+pintype=input
+T 3750 105 5 8 0 1 90 6 1
+pinnumber=14
+T 3800 0 5 8 0 0 0 0 1
+pinseq=14
+T 3800 255 5 8 1 1 90 0 1
+pinlabel=step_z
+}
+P 4000 0 4000 200 1 0 0
+{
+T 4000 0 5 8 0 0 0 0 1
+pintype=input
+T 3950 105 5 8 0 1 90 6 1
+pinnumber=15
+T 4000 0 5 8 0 0 0 0 1
+pinseq=15
+T 4000 255 5 8 1 1 90 0 1
+pinlabel=dir_z
+}
+P 4200 0 4200 200 1 0 0
+{
+T 4200 0 5 8 0 0 0 0 1
+pintype=input
+T 4150 105 5 8 0 1 90 6 1
+pinnumber=16
+T 4200 0 5 8 0 0 0 0 1
+pinseq=16
+T 4200 255 5 8 1 1 90 0 1
+pinlabel=enable_z
+}
+P 4400 0 4400 200 1 0 0
+{
+T 4400 0 5 8 0 0 0 0 1
+pintype=input
+T 4350 105 5 8 0 1 90 6 1
+pinnumber=17
+T 4400 0 5 8 0 0 0 0 1
+pinseq=17
+T 4400 255 5 8 1 1 90 0 1
+pinlabel=spi_cs_z
+}
+P 4600 0 4600 200 1 0 0
+{
+T 4600 0 5 8 0 0 0 0 1
+pintype=output
+T 4550 105 5 8 0 1 90 6 1
+pinnumber=18
+T 4600 0 5 8 0 0 0 0 1
+pinseq=18
+T 4600 255 5 8 1 1 90 0 1
+pinlabel=fault_z
+}
+P 4900 0 4900 200 1 0 0
+{
+T 4900 0 5 8 0 0 0 0 1
+pintype=input
+T 4850 105 5 8 0 1 90 6 1
+pinnumber=19
+T 4900 0 5 8 0 0 0 0 1
+pinseq=19
+T 4900 255 5 8 1 1 90 0 1
+pinlabel=step_a
+}
+P 5100 0 5100 200 1 0 0
+{
+T 5100 0 5 8 0 0 0 0 1
+pintype=input
+T 5050 105 5 8 0 1 90 6 1
+pinnumber=20
+T 5100 0 5 8 0 0 0 0 1
+pinseq=20
+T 5100 255 5 8 1 1 90 0 1
+pinlabel=dir_a
+}
+P 5300 0 5300 200 1 0 0
+{
+T 5300 0 5 8 0 0 0 0 1
+pintype=input
+T 5250 105 5 8 0 1 90 6 1
+pinnumber=21
+T 5300 0 5 8 0 0 0 0 1
+pinseq=21
+T 5300 255 5 8 1 1 90 0 1
+pinlabel=enable_a
+}
+P 5500 0 5500 200 1 0 0
+{
+T 5500 0 5 8 0 0 0 0 1
+pintype=input
+T 5450 105 5 8 0 1 90 6 1
+pinnumber=22
+T 5500 0 5 8 0 0 0 0 1
+pinseq=22
+T 5500 255 5 8 1 1 90 0 1
+pinlabel=spi_cs_a
+}
+P 5700 0 5700 200 1 0 0
+{
+T 5700 0 5 8 0 0 0 0 1
+pintype=output
+T 5650 105 5 8 0 1 90 6 1
+pinnumber=23
+T 5700 0 5 8 0 0 0 0 1
+pinseq=23
+T 5700 255 5 8 1 1 90 0 1
+pinlabel=fault_a
+}
+P 6000 0 6000 200 1 0 0
+{
+T 6000 0 5 8 0 0 0 0 1
+pintype=input
+T 5950 105 5 8 0 1 90 6 1
+pinnumber=24
+T 6000 0 5 8 0 0 0 0 1
+pinseq=24
+T 6000 255 5 8 1 1 90 0 1
+pinlabel=step_b
+}
+P 6200 0 6200 200 1 0 0
+{
+T 6200 0 5 8 0 0 0 0 1
+pintype=input
+T 6150 105 5 8 0 1 90 6 1
+pinnumber=25
+T 6200 0 5 8 0 0 0 0 1
+pinseq=25
+T 6200 255 5 8 1 1 90 0 1
+pinlabel=dir_b
+}
+P 6400 0 6400 200 1 0 0
+{
+T 6400 0 5 8 0 0 0 0 1
+pintype=input
+T 6350 105 5 8 0 1 90 6 1
+pinnumber=26
+T 6400 0 5 8 0 0 0 0 1
+pinseq=26
+T 6400 255 5 8 1 1 90 0 1
+pinlabel=enable_b
+}
+P 6600 0 6600 200 1 0 0
+{
+T 6600 0 5 8 0 0 0 0 1
+pintype=input
+T 6550 105 5 8 0 1 90 6 1
+pinnumber=27
+T 6600 0 5 8 0 0 0 0 1
+pinseq=27
+T 6600 255 5 8 1 1 90 0 1
+pinlabel=spi_cs_b
+}
+P 6800 0 6800 200 1 0 0
+{
+T 6800 0 5 8 0 0 0 0 1
+pintype=output
+T 6750 105 5 8 0 1 90 6 1
+pinnumber=28
+T 6800 0 5 8 0 0 0 0 1
+pinseq=28
+T 6800 255 5 8 1 1 90 0 1
+pinlabel=fault_b
+}
+P 1100 2500 1100 2200 1 0 0
+{
+T 1100 2500 5 8 0 0 0 0 1
+pintype=output
+T 1100 2145 5 8 1 1 90 6 1
+pinlabel=step_1
+T 1050 2295 5 8 0 1 90 0 1
+pinnumber=29
+T 1100 2500 5 8 0 0 0 0 1
+pinseq=29
+}
+P 1300 2500 1300 2200 1 0 0
+{
+T 1300 2500 5 8 0 0 0 0 1
+pintype=output
+T 1300 2145 5 8 1 1 90 6 1
+pinlabel=dir_1
+T 1250 2295 5 8 0 1 90 0 1
+pinnumber=30
+T 1300 2500 5 8 0 0 0 0 1
+pinseq=30
+}
+P 1500 2500 1500 2200 1 0 0
+{
+T 1500 2500 5 8 0 0 0 0 1
+pintype=output
+T 1500 2145 5 8 1 1 90 6 1
+pinlabel=enable_1
+T 1450 2295 5 8 0 1 90 0 1
+pinnumber=31
+T 1500 2500 5 8 0 0 0 0 1
+pinseq=31
+}
+P 1700 2500 1700 2200 1 0 0
+{
+T 1700 2500 5 8 0 0 0 0 1
+pintype=output
+T 1700 2145 5 8 1 1 90 6 1
+pinlabel=spi_cs_1
+T 1650 2295 5 8 0 1 90 0 1
+pinnumber=32
+T 1700 2500 5 8 0 0 0 0 1
+pinseq=32
+}
+P 1900 2500 1900 2200 1 0 0
+{
+T 1900 2500 5 8 0 0 0 0 1
+pintype=input
+T 1900 2145 5 8 1 1 90 6 1
+pinlabel=fault_1
+T 1850 2295 5 8 0 1 90 0 1
+pinnumber=33
+T 1900 2500 5 8 0 0 0 0 1
+pinseq=33
+}
+P 2100 2500 2100 2200 1 0 0
+{
+T 2100 2500 5 8 0 0 0 0 1
+pintype=output
+T 2100 2145 5 8 1 1 90 6 1
+pinlabel=clk_1
+T 2050 2295 5 8 0 1 90 0 1
+pinnumber=34
+T 2100 2500 5 8 0 0 0 0 1
+pinseq=34
+}
+P 300 2500 300 2200 1 0 0
+{
+T 300 2500 5 8 0 0 0 0 1
+pintype=output
+T 300 2145 5 8 1 1 90 6 1
+pinlabel=mosi
+T 250 2295 5 8 0 1 90 0 1
+pinnumber=35
+T 300 2500 5 8 0 0 0 0 1
+pinseq=35
+}
+P 500 2500 500 2200 1 0 0
+{
+T 500 2500 5 8 0 0 0 0 1
+pintype=input
+T 500 2145 5 8 1 1 90 6 1
+pinlabel=miso
+T 450 2295 5 8 0 1 90 0 1
+pinnumber=36
+T 500 2500 5 8 0 0 0 0 1
+pinseq=36
+}
+P 700 2500 700 2200 1 0 0
+{
+T 700 2500 5 8 0 0 0 0 1
+pintype=output
+T 700 2145 5 8 1 1 90 6 1
+pinlabel=spi_ck
+T 650 2295 5 8 0 1 90 0 1
+pinnumber=37
+T 700 2500 5 8 0 0 0 0 1
+pinseq=37
+}
+P 2400 2500 2400 2200 1 0 0
+{
+T 2400 2500 5 8 0 0 0 0 1
+pintype=output
+T 2350 2295 5 8 0 1 90 0 1
+pinnumber=38
+T 2400 2500 5 8 0 0 0 0 1
+pinseq=38
+T 2400 2145 5 8 1 1 90 6 1
+pinlabel=step_2
+}
+P 2600 2500 2600 2200 1 0 0
+{
+T 2600 2500 5 8 0 0 0 0 1
+pintype=output
+T 2550 2295 5 8 0 1 90 0 1
+pinnumber=39
+T 2600 2500 5 8 0 0 0 0 1
+pinseq=39
+T 2600 2145 5 8 1 1 90 6 1
+pinlabel=dir_2
+}
+P 2800 2500 2800 2200 1 0 0
+{
+T 2800 2500 5 8 0 0 0 0 1
+pintype=output
+T 2750 2295 5 8 0 1 90 0 1
+pinnumber=40
+T 2800 2500 5 8 0 0 0 0 1
+pinseq=40
+T 2800 2145 5 8 1 1 90 6 1
+pinlabel=enable_2
+}
+P 3000 2500 3000 2200 1 0 0
+{
+T 3000 2500 5 8 0 0 0 0 1
+pintype=output
+T 2950 2295 5 8 0 1 90 0 1
+pinnumber=41
+T 3000 2500 5 8 0 0 0 0 1
+pinseq=41
+T 3000 2145 5 8 1 1 90 6 1
+pinlabel=spi_cs_2
+}
+P 3200 2500 3200 2200 1 0 0
+{
+T 3200 2500 5 8 0 0 0 0 1
+pintype=input
+T 3150 2295 5 8 0 1 90 0 1
+pinnumber=42
+T 3200 2500 5 8 0 0 0 0 1
+pinseq=42
+T 3200 2145 5 8 1 1 90 6 1
+pinlabel=fault_2
+}
+P 3400 2500 3400 2200 1 0 0
+{
+T 3400 2500 5 8 0 0 0 0 1
+pintype=output
+T 3350 2295 5 8 0 1 90 0 1
+pinnumber=43
+T 3400 2500 5 8 0 0 0 0 1
+pinseq=43
+T 3400 2145 5 8 1 1 90 6 1
+pinlabel=clk_2
+}
+P 3700 2500 3700 2200 1 0 0
+{
+T 3700 2500 5 8 0 0 0 0 1
+pintype=output
+T 3650 2295 5 8 0 1 90 0 1
+pinnumber=44
+T 3700 2500 5 8 0 0 0 0 1
+pinseq=44
+T 3700 2145 5 8 1 1 90 6 1
+pinlabel=step_3
+}
+P 3900 2500 3900 2200 1 0 0
+{
+T 3900 2500 5 8 0 0 0 0 1
+pintype=output
+T 3850 2295 5 8 0 1 90 0 1
+pinnumber=45
+T 3900 2500 5 8 0 0 0 0 1
+pinseq=45
+T 3900 2145 5 8 1 1 90 6 1
+pinlabel=dir_3
+}
+P 4100 2500 4100 2200 1 0 0
+{
+T 4100 2500 5 8 0 0 0 0 1
+pintype=output
+T 4050 2295 5 8 0 1 90 0 1
+pinnumber=46
+T 4100 2500 5 8 0 0 0 0 1
+pinseq=46
+T 4100 2145 5 8 1 1 90 6 1
+pinlabel=enable_3
+}
+P 4300 2500 4300 2200 1 0 0
+{
+T 4300 2500 5 8 0 0 0 0 1
+pintype=output
+T 4250 2295 5 8 0 1 90 0 1
+pinnumber=47
+T 4300 2500 5 8 0 0 0 0 1
+pinseq=47
+T 4300 2145 5 8 1 1 90 6 1
+pinlabel=spi_cs_3
+}
+P 4500 2500 4500 2200 1 0 0
+{
+T 4500 2500 5 8 0 0 0 0 1
+pintype=input
+T 4450 2295 5 8 0 1 90 0 1
+pinnumber=48
+T 4500 2500 5 8 0 0 0 0 1
+pinseq=48
+T 4500 2145 5 8 1 1 90 6 1
+pinlabel=fault_3
+}
+P 4700 2500 4700 2200 1 0 0
+{
+T 4700 2500 5 8 0 0 0 0 1
+pintype=output
+T 4650 2295 5 8 0 1 90 0 1
+pinnumber=49
+T 4700 2500 5 8 0 0 0 0 1
+pinseq=49
+T 4700 2145 5 8 1 1 90 6 1
+pinlabel=clk_3
+}
+P 5000 2500 5000 2200 1 0 0
+{
+T 5000 2500 5 8 0 0 0 0 1
+pintype=output
+T 4950 2295 5 8 0 1 90 0 1
+pinnumber=50
+T 5000 2500 5 8 0 0 0 0 1
+pinseq=50
+T 5000 2145 5 8 1 1 90 6 1
+pinlabel=step_4
+}
+P 5200 2500 5200 2200 1 0 0
+{
+T 5200 2500 5 8 0 0 0 0 1
+pintype=output
+T 5150 2295 5 8 0 1 90 0 1
+pinnumber=51
+T 5200 2500 5 8 0 0 0 0 1
+pinseq=51
+T 5200 2145 5 8 1 1 90 6 1
+pinlabel=dir_4
+}
+P 5400 2500 5400 2200 1 0 0
+{
+T 5400 2500 5 8 0 0 0 0 1
+pintype=output
+T 5350 2295 5 8 0 1 90 0 1
+pinnumber=52
+T 5400 2500 5 8 0 0 0 0 1
+pinseq=52
+T 5400 2145 5 8 1 1 90 6 1
+pinlabel=enable_4
+}
+P 5600 2500 5600 2200 1 0 0
+{
+T 5600 2500 5 8 0 0 0 0 1
+pintype=output
+T 5550 2295 5 8 0 1 90 0 1
+pinnumber=53
+T 5600 2500 5 8 0 0 0 0 1
+pinseq=53
+T 5600 2145 5 8 1 1 90 6 1
+pinlabel=spi_cs_4
+}
+P 5800 2500 5800 2200 1 0 0
+{
+T 5800 2500 5 8 0 0 0 0 1
+pintype=input
+T 5750 2295 5 8 0 1 90 0 1
+pinnumber=54
+T 5800 2500 5 8 0 0 0 0 1
+pinseq=54
+T 5800 2145 5 8 1 1 90 6 1
+pinlabel=fault_4
+}
+P 6000 2500 6000 2200 1 0 0
+{
+T 6000 2500 5 8 0 0 0 0 1
+pintype=output
+T 5950 2295 5 8 0 1 90 0 1
+pinnumber=55
+T 6000 2500 5 8 0 0 0 0 1
+pinseq=55
+T 6000 2145 5 8 1 1 90 6 1
+pinlabel=clk_4
+}
+P 6300 2500 6300 2200 1 0 0
+{
+T 6300 2500 5 8 0 0 0 0 1
+pintype=output
+T 6250 2295 5 8 0 1 90 0 1
+pinnumber=56
+T 6300 2500 5 8 0 0 0 0 1
+pinseq=56
+T 6300 2145 5 8 1 1 90 6 1
+pinlabel=step_5
+}
+P 6500 2500 6500 2200 1 0 0
+{
+T 6500 2500 5 8 0 0 0 0 1
+pintype=output
+T 6450 2295 5 8 0 1 90 0 1
+pinnumber=57
+T 6500 2500 5 8 0 0 0 0 1
+pinseq=57
+T 6500 2145 5 8 1 1 90 6 1
+pinlabel=dir_5
+}
+P 6700 2500 6700 2200 1 0 0
+{
+T 6700 2500 5 8 0 0 0 0 1
+pintype=output
+T 6650 2295 5 8 0 1 90 0 1
+pinnumber=58
+T 6700 2500 5 8 0 0 0 0 1
+pinseq=58
+T 6700 2145 5 8 1 1 90 6 1
+pinlabel=enable_5
+}
+P 6900 2500 6900 2200 1 0 0
+{
+T 6900 2500 5 8 0 0 0 0 1
+pintype=output
+T 6850 2295 5 8 0 1 90 0 1
+pinnumber=59
+T 6900 2500 5 8 0 0 0 0 1
+pinseq=59
+T 6900 2145 5 8 1 1 90 6 1
+pinlabel=spi_cs_5
+}
+P 7100 2500 7100 2200 1 0 0
+{
+T 7100 2500 5 8 0 0 0 0 1
+pintype=input
+T 7050 2295 5 8 0 1 90 0 1
+pinnumber=60
+T 7100 2500 5 8 0 0 0 0 1
+pinseq=60
+T 7100 2145 5 8 1 1 90 6 1
+pinlabel=fault_5
+}
+P 7300 2500 7300 2200 1 0 0
+{
+T 7300 2500 5 8 0 0 0 0 1
+pintype=output
+T 7250 2295 5 8 0 1 90 0 1
+pinnumber=61
+T 7300 2500 5 8 0 0 0 0 1
+pinseq=61
+T 7300 2145 5 8 1 1 90 6 1
+pinlabel=clk_5
+}
+B 0 200 7500 2000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2200 1295 8 8 1 1 0 0 1
+refdes=IO?
+T 3100 1200 9 8 1 0 0 0 2
+Isolation Interface
+isolation.sch
+T 3300 995 8 8 0 1 0 0 1
+source=isolation.sch
diff --git a/Combined/symbols/isolation_old.sym b/Combined/symbols/isolation_old.sym
new file mode 100644
index 0000000..a42ca63
--- /dev/null
+++ b/Combined/symbols/isolation_old.sym
@@ -0,0 +1,36 @@
+v 20130925 2
+B 200 0 1000 1100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 795 900 8 10 1 1 0 0 1
+refdes=IO?
+T 195 98 8 10 1 1 0 0 1
+source=isolation.sch
+P 0 1000 200 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=unknown
+T 255 995 5 10 0 1 0 0 1
+pinlabel=step_x
+T 200 1000 5 10 1 1 0 0 1
+refdes=step_x
+}
+P 0 800 200 800 1 0 0
+{
+T 0 800 5 10 0 0 0 0 1
+pintype=unknown
+T 255 795 5 10 1 1 0 0 1
+pinlabel=dir_x
+}
+P 0 600 200 600 1 0 0
+{
+T 0 600 5 10 0 0 0 0 1
+pintype=unknown
+T 255 595 5 10 1 1 0 0 1
+pinlabel=enable_x
+}
+P 0 400 200 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=unknown
+T 255 395 5 10 1 1 0 0 1
+pinlabel=spi_cs_x
+}
diff --git a/Combined/symbols/led.sym b/Combined/symbols/led.sym
new file mode 100644
index 0000000..809bf25
--- /dev/null
+++ b/Combined/symbols/led.sym
@@ -0,0 +1,46 @@
+v 20130925 2
+P 0 100 100 100 1 0 0
+{
+T 0 150 5 8 0 0 0 6 1
+pinnumber=1
+T -50 50 5 8 0 1 0 8 1
+pinseq=1
+T 50 100 9 8 0 1 0 0 1
+pinlabel=A
+T 50 100 5 8 0 1 0 2 1
+pintype=pas
+}
+P 500 100 400 100 1 0 0
+{
+T 450 150 5 8 0 0 0 0 1
+pinnumber=2
+T 550 50 5 8 0 1 0 2 1
+pinseq=2
+T 450 100 9 8 0 1 0 6 1
+pinlabel=K
+T 450 100 5 8 0 1 0 8 1
+pintype=pas
+}
+L 225 175 300 100 3 0 0 0 -1 -1
+L 300 100 225 25 3 0 0 0 -1 -1
+L 225 175 225 25 3 0 0 0 -1 -1
+L 300 175 300 25 3 0 0 0 -1 -1
+L 300 100 400 100 3 0 0 0 -1 -1
+L 225 100 100 100 3 0 0 0 -1 -1
+V 250 100 125 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 600 500 5 10 0 0 0 0 1
+device=LED
+L 300 225 350 275 3 0 0 0 -1 -1
+L 350 275 350 250 3 0 0 0 -1 -1
+L 350 250 400 300 3 0 0 0 -1 -1
+T 425 200 8 10 1 1 0 0 1
+refdes=LED?
+T 600 1100 5 10 0 0 0 0 1
+description=LED
+T 600 900 5 10 0 0 0 0 1
+numslots=0
+T 600 700 5 10 0 0 0 0 1
+symversion=0.1
+L 300 275 350 325 3 0 0 0 -1 -1
+L 350 325 350 300 3 0 0 0 -1 -1
+L 350 300 400 350 3 0 0 0 -1 -1
diff --git a/Combined/symbols/microprocessor.sym b/Combined/symbols/microprocessor.sym
new file mode 100644
index 0000000..1090740
--- /dev/null
+++ b/Combined/symbols/microprocessor.sym
@@ -0,0 +1,339 @@
+v 20130925 2
+P 1100 2200 1100 2000 1 0 0
+{
+T 1100 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1100 1945 5 6 1 1 90 6 1
+pinlabel=spi_clk
+}
+P 1200 2200 1200 2000 1 0 0
+{
+T 1200 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1200 1945 5 6 1 1 90 6 1
+pinlabel=spi_miso
+}
+P 1300 2200 1300 2000 1 0 0
+{
+T 1300 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1300 1945 5 6 1 1 90 6 1
+pinlabel=spi_mosi
+}
+P 1500 2200 1500 2000 1 0 0
+{
+T 1500 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1500 1945 5 6 1 1 90 6 1
+pinlabel=step_x
+}
+P 1600 2200 1600 2000 1 0 0
+{
+T 1600 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1600 1945 5 6 1 1 90 6 1
+pinlabel=dir_x
+}
+P 1700 2200 1700 2000 1 0 0
+{
+T 1700 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1700 1945 5 6 1 1 90 6 1
+pinlabel=enable_x
+}
+P 1800 2200 1800 2000 1 0 0
+{
+T 1800 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1800 1945 5 6 1 1 90 6 1
+pinlabel=spi_cs_x
+}
+P 1900 2200 1900 2000 1 0 0
+{
+T 1900 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 1900 1945 5 6 1 1 90 6 1
+pinlabel=fault_x
+}
+P 2100 2200 2100 2000 1 0 0
+{
+T 2100 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2100 1945 5 6 1 1 90 6 1
+pinlabel=step_y
+}
+P 2200 2200 2200 2000 1 0 0
+{
+T 2200 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2200 1945 5 6 1 1 90 6 1
+pinlabel=dir_y
+}
+P 2300 2200 2300 2000 1 0 0
+{
+T 2300 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2300 1945 5 6 1 1 90 6 1
+pinlabel=enable_y
+}
+P 2400 2200 2400 2000 1 0 0
+{
+T 2400 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2400 1945 5 6 1 1 90 6 1
+pinlabel=spi_cs_y
+}
+P 2500 2200 2500 2000 1 0 0
+{
+T 2500 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2500 1945 5 6 1 1 90 6 1
+pinlabel=fault_y
+}
+P 2700 2200 2700 2000 1 0 0
+{
+T 2700 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2700 1945 5 6 1 1 90 6 1
+pinlabel=step_z
+}
+P 2800 2200 2800 2000 1 0 0
+{
+T 2800 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2800 1945 5 6 1 1 90 6 1
+pinlabel=dir_z
+}
+P 2900 2200 2900 2000 1 0 0
+{
+T 2900 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 2900 1945 5 6 1 1 90 6 1
+pinlabel=enable_z
+}
+P 3000 2200 3000 2000 1 0 0
+{
+T 3000 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3000 1945 5 6 1 1 90 6 1
+pinlabel=spi_cs_z
+}
+P 3100 2200 3100 2000 1 0 0
+{
+T 3100 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3100 1945 5 6 1 1 90 6 1
+pinlabel=fault_z
+}
+P 3300 2200 3300 2000 1 0 0
+{
+T 3300 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3300 1945 5 6 1 1 90 6 1
+pinlabel=step_a
+}
+P 3400 2200 3400 2000 1 0 0
+{
+T 3400 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3400 1945 5 6 1 1 90 6 1
+pinlabel=dir_a
+}
+P 3500 2200 3500 2000 1 0 0
+{
+T 3500 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3500 1945 5 6 1 1 90 6 1
+pinlabel=enable_a
+}
+P 3600 2200 3600 2000 1 0 0
+{
+T 3600 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3600 1945 5 6 1 1 90 6 1
+pinlabel=spi_cs_a
+}
+P 3700 2200 3700 2000 1 0 0
+{
+T 3700 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3700 1945 5 6 1 1 90 6 1
+pinlabel=fault_a
+}
+P 0 1500 200 1500 1 0 0
+{
+T 0 1500 5 6 0 0 0 0 1
+pintype=unknown
+T 255 1495 5 6 1 1 0 0 1
+pinlabel=spi_cs_avr
+}
+P 0 1400 200 1400 1 0 0
+{
+T 0 1400 5 6 0 0 0 0 1
+pintype=unknown
+T 255 1395 5 6 1 1 0 0 1
+pinlabel=serial_cts
+}
+P 0 1300 200 1300 1 0 0
+{
+T 0 1300 5 6 0 0 0 0 1
+pintype=unknown
+T 255 1295 5 6 1 1 0 0 1
+pinlabel=serial_rts
+}
+P 0 1200 200 1200 1 0 0
+{
+T 0 1200 5 6 0 0 0 0 1
+pintype=unknown
+T 255 1195 5 6 1 1 0 0 1
+pinlabel=serial_rx
+}
+P 0 1100 200 1100 1 0 0
+{
+T 0 1100 5 6 0 0 0 0 1
+pintype=unknown
+T 255 1095 5 6 1 1 0 0 1
+pinlabel=serial_tx
+}
+P 3900 2200 3900 2000 1 0 0
+{
+T 3900 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 3900 1945 5 6 1 1 90 6 1
+pinlabel=step_b/PB0
+}
+P 4000 2200 4000 2000 1 0 0
+{
+T 4000 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4000 1945 5 6 1 1 90 6 1
+pinlabel=dir_b/PB1
+}
+P 4100 2200 4100 2000 1 0 0
+{
+T 4100 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4100 1945 5 6 1 1 90 6 1
+pinlabel=enable_b/PB2
+}
+P 4200 2200 4200 2000 1 0 0
+{
+T 4200 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4200 1945 5 6 1 1 90 6 1
+pinlabel=spi_cs_b/PB3
+}
+P 4300 2200 4300 2000 1 0 0
+{
+T 4300 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4300 1945 5 6 1 1 90 6 1
+pinlabel=fault_b/PB4
+}
+P 4500 2200 4500 2000 1 0 0
+{
+T 4500 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4500 1945 5 6 1 1 90 6 1
+pinlabel=spin_dir
+}
+P 4600 2200 4600 2000 1 0 0
+{
+T 4600 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4600 1945 5 6 1 1 90 6 1
+pinlabel=spin_enable
+}
+P 4700 2200 4700 2000 1 0 0
+{
+T 4700 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4700 1945 5 6 1 1 90 6 1
+pinlabel=spin_pwm
+}
+P 4800 2200 4800 2000 1 0 0
+{
+T 4800 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4800 1945 5 6 1 1 90 6 1
+pinlabel=coolant
+}
+P 4900 2200 4900 2000 1 0 0
+{
+T 4900 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 4900 1945 5 6 1 1 90 6 1
+pinlabel=x_min
+}
+P 5000 2200 5000 2000 1 0 0
+{
+T 5000 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5000 1945 5 6 1 1 90 6 1
+pinlabel=x_max
+}
+P 5100 2200 5100 2000 1 0 0
+{
+T 5100 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5100 1945 5 6 1 1 90 6 1
+pinlabel=y_min
+}
+P 5200 2200 5200 2000 1 0 0
+{
+T 5200 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5200 1945 5 6 1 1 90 6 1
+pinlabel=y_max
+}
+P 5300 2200 5300 2000 1 0 0
+{
+T 5300 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5300 1945 5 6 1 1 90 6 1
+pinlabel=z_min
+}
+P 5400 2200 5400 2000 1 0 0
+{
+T 5400 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5400 1945 5 6 1 1 90 6 1
+pinlabel=z_max
+}
+P 5500 2200 5500 2000 1 0 0
+{
+T 5500 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5500 1945 5 6 1 1 90 6 1
+pinlabel=a_min
+}
+P 5600 2200 5600 2000 1 0 0
+{
+T 5600 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5600 1945 5 6 1 1 90 6 1
+pinlabel=a_max
+}
+P 5700 2200 5700 2000 1 0 0
+{
+T 5700 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5700 1945 5 6 1 1 90 6 1
+pinlabel=b_min/PB6
+}
+P 5800 2200 5800 2000 1 0 0
+{
+T 5800 2200 5 6 0 0 0 0 1
+pintype=unknown
+T 5800 1945 5 6 1 1 90 6 1
+pinlabel=b_max/PB7
+}
+B 200 0 6000 2000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2895 900 8 10 1 1 0 0 1
+value=Microprocessor
+T 3395 500 8 10 1 1 0 0 1
+refdes=MP?
+T -5 0 8 10 0 1 0 0 1
+source=microprocessor.sch
+T -5 0 8 10 0 1 0 0 1
+footprint=TQFP64_14.fp
diff --git a/Combined/symbols/motor_driver.sym b/Combined/symbols/motor_driver.sym
new file mode 100644
index 0000000..341ad3f
--- /dev/null
+++ b/Combined/symbols/motor_driver.sym
@@ -0,0 +1,71 @@
+v 20130925 2
+P 0 1800 200 1800 1 0 0
+{
+T 0 1800 5 10 0 0 0 0 1
+pintype=unknown
+T 255 1795 5 10 1 1 0 0 1
+pinlabel=SCK
+}
+P 0 1600 200 1600 1 0 0
+{
+T 0 1600 5 10 0 0 0 0 1
+pintype=unknown
+T 255 1595 5 10 1 1 0 0 1
+pinlabel=MOSI
+}
+P 0 1400 200 1400 1 0 0
+{
+T 0 1400 5 10 0 0 0 0 1
+pintype=unknown
+T 255 1395 5 10 1 1 0 0 1
+pinlabel=MISO
+}
+P 0 1200 200 1200 1 0 0
+{
+T 0 1200 5 10 0 0 0 0 1
+pintype=unknown
+T 255 1195 5 10 1 1 0 0 1
+pinlabel=CLK
+}
+P 0 1000 200 1000 1 0 0
+{
+T 0 1000 5 10 0 0 0 0 1
+pintype=unknown
+T 255 995 5 10 1 1 0 0 1
+pinlabel=ENN
+}
+P 0 800 200 800 1 0 0
+{
+T 0 800 5 10 0 0 0 0 1
+pintype=unknown
+T 255 795 5 10 1 1 0 0 1
+pinlabel=DIR
+}
+P 0 600 200 600 1 0 0
+{
+T 0 600 5 10 0 0 0 0 1
+pintype=unknown
+T 255 595 5 10 1 1 0 0 1
+pinlabel=STEP
+}
+P 0 400 200 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=unknown
+T 255 395 5 10 1 1 0 0 1
+pinlabel=FAULT
+}
+B 200 0 1900 2500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 995 2300 8 10 1 1 0 0 1
+refdes=MD?
+T 495 100 8 10 1 1 0 0 1
+source=motor_driver.sch
+P 0 2000 200 2000 1 0 0
+{
+T 0 2000 5 10 0 0 0 0 1
+pintype=unknown
+T 255 1995 5 10 1 1 0 0 1
+pinlabel=CSN
+T 0 2000 5 10 0 0 0 0 1
+pinseq=0
+}
diff --git a/Combined/symbols/nc.sym b/Combined/symbols/nc.sym
new file mode 100644
index 0000000..ceea35a
--- /dev/null
+++ b/Combined/symbols/nc.sym
@@ -0,0 +1,19 @@
+v 20130925 2
+P 300 100 150 100 1 0 0
+{
+T 450 0 5 10 0 0 0 0 1
+pinseq=1
+T 450 200 5 10 0 0 0 0 1
+pinnumber=1
+}
+L 150 0 150 200 3 0 0 0 -1 -1
+T 0 400 8 10 0 0 0 0 1
+value=NoConnection
+T 75 200 9 8 1 0 90 7 1
+NC
+T 0 600 8 10 0 0 0 0 1
+documentation=nc.pdf
+T 0 800 8 10 0 0 0 0 1
+device=DRC_Directive
+T 0 1000 8 10 0 0 0 0 1
+graphical=1
diff --git a/Combined/symbols/output.sym b/Combined/symbols/output.sym
new file mode 100644
index 0000000..2717e67
--- /dev/null
+++ b/Combined/symbols/output.sym
@@ -0,0 +1,15 @@
+v 20130925 2
+P 0 100 150 100 1 0 0
+{
+T 250 50 5 6 0 1 0 0 1
+pinnumber=1
+T 250 50 5 6 0 0 0 0 1
+pinseq=1
+}
+L 150 150 150 50 3 0 0 0 -1 -1
+L 150 150 450 150 3 0 0 0 -1 -1
+L 450 150 500 100 3 0 0 0 -1 -1
+L 500 100 450 50 3 0 0 0 -1 -1
+L 450 50 150 50 3 0 0 0 -1 -1
+T 100 300 5 10 0 0 0 0 1
+device=OUTPUT
diff --git a/Combined/symbols/pdi.sym b/Combined/symbols/pdi.sym
new file mode 100644
index 0000000..a7324dc
--- /dev/null
+++ b/Combined/symbols/pdi.sym
@@ -0,0 +1,68 @@
+v 20130925 2
+P 700 700 1200 700 1 0 1
+{
+T 1000 750 5 10 1 1 0 0 1
+pinnumber=4
+T 1000 750 5 10 0 0 0 0 1
+pinseq=4
+T 500 700 5 10 1 1 0 0 1
+netname=nc
+}
+P 1200 1600 700 1600 1 0 0
+{
+T 1000 1650 5 10 1 1 0 0 1
+pinnumber=1
+T 1000 1650 5 10 0 0 0 0 1
+pinseq=1
+T 400 1600 5 10 1 1 0 0 1
+netname=PDI
+}
+P 700 400 1200 400 1 0 1
+{
+T 1000 450 5 10 1 1 0 0 1
+pinnumber=5
+T 1000 450 5 10 0 0 0 0 1
+pinseq=5
+T 100 400 5 10 1 1 0 0 1
+netname=RESET
+}
+P 1200 1300 700 1300 1 0 0
+{
+T 1000 1350 5 10 1 1 0 0 1
+pinnumber=2
+T 1000 950 5 10 0 0 0 0 1
+pinseq=2
+T 300 1300 5 10 1 1 0 0 1
+netname=VCC
+}
+P 700 100 1200 100 1 0 1
+{
+T 1000 150 5 10 1 1 0 0 1
+pinnumber=6
+T 1000 150 5 10 0 0 0 0 1
+pinseq=6
+T 300 100 5 10 1 1 0 0 1
+netname=GND
+}
+P 1200 1000 700 1000 1 0 0
+{
+T 1000 1050 5 10 1 1 0 0 1
+pinnumber=3
+T 1000 450 5 10 0 0 0 0 1
+pinseq=3
+T 500 1000 5 10 1 1 0 0 1
+netname=nc
+}
+T 700 1900 8 10 1 1 0 0 1
+refdes=J?
+T -500 -1800 9 10 0 0 0 0 1
+author=DJ Delorie
+T -500 -1800 9 10 0 0 0 0 1
+copyright=2006 DJ Delorie
+T -500 -1800 9 10 0 0 0 0 1
+dist-license=GPL
+T -500 -1800 9 10 0 0 0 0 1
+use-license=unlimited
+T -500 -1800 9 10 0 0 0 0 1
+description=DB-9 numbering
+B 0 0 900 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
diff --git a/Combined/symbols/power_supply.sym b/Combined/symbols/power_supply.sym
new file mode 100644
index 0000000..835f60d
--- /dev/null
+++ b/Combined/symbols/power_supply.sym
@@ -0,0 +1,8 @@
+v 20130925 2
+B 0 0 2000 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 500 900 9 10 1 0 0 0 1
+Power Supply
+T 900 700 8 10 1 1 0 0 1
+refdes=PS?
+T 300 500 8 10 1 0 0 0 1
+source=power.sch
diff --git a/Combined/symbols/resistor.sym b/Combined/symbols/resistor.sym
new file mode 100644
index 0000000..6adc96e
--- /dev/null
+++ b/Combined/symbols/resistor.sym
@@ -0,0 +1,39 @@
+v 20130925 2
+L 500 150 450 50 3 0 0 0 -1 -1
+L 450 50 400 150 3 0 0 0 -1 -1
+L 400 150 350 50 3 0 0 0 -1 -1
+L 350 50 300 150 3 0 0 0 -1 -1
+T 300 400 5 10 0 0 0 0 1
+device=RESISTOR
+L 500 150 525 100 3 0 0 0 -1 -1
+P 600 100 525 100 1 0 0
+{
+T 850 150 5 8 0 1 0 0 1
+pinnumber=2
+T 850 150 5 8 0 0 0 0 1
+pinseq=2
+T 850 150 5 8 0 1 0 0 1
+pinlabel=2
+T 850 150 5 8 0 1 0 0 1
+pintype=pas
+}
+P 200 100 275 100 1 0 0
+{
+T 200 150 5 8 0 1 0 0 1
+pinnumber=1
+T 200 150 5 8 0 0 0 0 1
+pinseq=1
+T 200 150 5 8 0 1 0 0 1
+pinlabel=1
+T 200 150 5 8 0 1 0 0 1
+pintype=pas
+}
+L 300 150 275 100 3 0 0 0 -1 -1
+T 100 175 8 10 1 1 0 0 1
+refdes=R?
+T 0 0 8 10 0 1 0 0 1
+pins=2
+T 0 0 8 10 0 1 0 0 1
+class=DISCRETE
+T 500 175 8 10 1 1 0 0 1
+value=?Ω
diff --git a/Combined/symbols/vdd.sym b/Combined/symbols/vdd.sym
new file mode 100644
index 0000000..670bdc3
--- /dev/null
+++ b/Combined/symbols/vdd.sym
@@ -0,0 +1,17 @@
+v 20130925 2
+P 200 0 200 150 1 0 0
+{
+T 250 50 5 6 0 1 0 0 1
+pinnumber=1
+T 250 50 5 6 0 0 0 0 1
+pinseq=1
+T 250 50 5 6 0 1 0 0 1
+pinlabel=1
+T 250 50 5 6 0 1 0 0 1
+pintype=pwr
+}
+L 50 150 350 150 3 0 0 0 -1 -1
+T 75 175 9 8 1 0 0 0 1
+Vdd
+T 450 200 8 10 0 0 0 0 1
+net=Vdd:1
diff --git a/Combined/symbols/vss.sym b/Combined/symbols/vss.sym
new file mode 100644
index 0000000..0fa895e
--- /dev/null
+++ b/Combined/symbols/vss.sym
@@ -0,0 +1,17 @@
+v 20130925 2
+P 200 0 200 150 1 0 0
+{
+T 250 50 5 6 0 1 0 0 1
+pinnumber=1
+T 250 50 5 6 0 0 0 0 1
+pinseq=1
+T 250 50 5 6 0 1 0 0 1
+pinlabel=1
+T 250 50 5 6 0 1 0 0 1
+pintype=pwr
+}
+L 50 150 350 150 3 0 0 0 -1 -1
+T 75 175 9 8 1 0 0 0 1
+Vss
+T 450 200 8 10 0 0 0 0 1
+net=Vss:1
-- 
2.27.0