From 7d428e1d41b78a58a25d122c288ec88d1c7bec97 Mon Sep 17 00:00:00 2001
From: Joseph Coffland <joseph@cauldrondevelopment.com>
Date: Fri, 10 Jul 2015 03:07:18 -0700
Subject: [PATCH] Motor driver tweaks

---
 electronics/motor-driver.sch | 773 +++++++++++++++++++----------------
 electronics/power.sch        |   8 +
 2 files changed, 435 insertions(+), 346 deletions(-)

diff --git a/electronics/motor-driver.sch b/electronics/motor-driver.sch
index 0908252..085d308 100644
--- a/electronics/motor-driver.sch
+++ b/electronics/motor-driver.sch
@@ -2,445 +2,436 @@ v 20130925 2
 C 40000 40000 0 0 0 title-B.sym
 T 50000 40700 9 10 1 0 0 0 1
 Motor Driver
-C 44400 41600 1 90 0 header20-1.sym
+C 44200 41500 1 90 0 header20-1.sym
 {
-T 44650 41800 5 10 0 1 90 0 1
+T 44450 41700 5 10 0 1 90 0 1
 device=HEADER20
-T 40300 42400 5 10 1 1 180 0 1
+T 44500 42200 5 10 1 1 180 0 1
 refdes=J1
 }
-C 41500 43000 1 90 0 output-1.sym
+C 41300 42900 1 90 0 output-1.sym
 {
-T 41200 43100 5 10 0 0 90 0 1
+T 41000 43000 5 10 0 0 90 0 1
 device=OUTPUT
-T 41500 43900 5 10 1 1 90 0 1
+T 41300 43800 5 10 1 1 90 0 1
 netname=spi_clk
 }
-C 40900 41600 1 270 0 output-1.sym
+C 40700 41500 1 270 0 output-1.sym
 {
-T 41200 41500 5 10 0 0 270 0 1
+T 41000 41400 5 10 0 0 270 0 1
 device=OUTPUT
-T 41100 40200 5 10 1 1 90 0 1
+T 40900 40100 5 10 1 1 90 0 1
 netname=enable
 }
-C 41300 41600 1 270 0 output-1.sym
+C 41100 41500 1 270 0 output-1.sym
 {
-T 41600 41500 5 10 0 0 270 0 1
+T 41400 41400 5 10 0 0 270 0 1
 device=OUTPUT
-T 41500 40500 5 10 1 1 90 0 1
+T 41300 40400 5 10 1 1 90 0 1
 netname=dir
 }
-C 41700 41600 1 270 0 output-1.sym
+C 41500 41500 1 270 0 output-1.sym
 {
-T 42000 41500 5 10 0 0 270 0 1
+T 41800 41400 5 10 0 0 270 0 1
 device=OUTPUT
-T 41900 40400 5 10 1 1 90 0 1
+T 41700 40300 5 10 1 1 90 0 1
 netname=step
 }
-C 41900 43000 1 90 0 output-1.sym
+C 41700 42900 1 90 0 output-1.sym
 {
-T 41600 43100 5 10 0 0 90 0 1
+T 41400 43000 5 10 0 0 90 0 1
 device=OUTPUT
-T 41900 43900 5 10 1 1 90 0 1
+T 41700 43800 5 10 1 1 90 0 1
 netname=spi_mosi
 }
-C 40400 43000 1 0 0 3.3V-plus-1.sym
-C 40500 41300 1 0 0 gnd-1.sym
-C 42100 43800 1 270 0 input-1.sym
+C 40200 42900 1 0 0 3.3V-plus-1.sym
+C 40300 41200 1 0 0 gnd-1.sym
+C 41900 43700 1 270 0 input-1.sym
 {
-T 42400 43800 5 10 0 0 270 0 1
+T 42200 43700 5 10 0 0 270 0 1
 device=INPUT
-T 42300 43900 5 10 1 1 90 0 1
+T 42100 43800 5 10 1 1 90 0 1
 netname=spi_miso
 }
-C 43600 41600 1 180 0 vss-1.sym
-C 44000 41600 1 180 0 vss-1.sym
-C 44400 41600 1 180 0 vss-1.sym
-C 43200 43000 1 0 0 vdd-1.sym
-C 43600 43000 1 0 0 vdd-1.sym
-C 44000 43000 1 0 0 vdd-1.sym
-C 41100 43000 1 90 0 output-1.sym
+C 43400 41500 1 180 0 vss-1.sym
+C 43800 41500 1 180 0 vss-1.sym
+C 44200 41500 1 180 0 vss-1.sym
+C 43000 42900 1 0 0 vdd-1.sym
+C 43400 42900 1 0 0 vdd-1.sym
+C 43800 42900 1 0 0 vdd-1.sym
+C 40900 42900 1 90 0 output-1.sym
 {
-T 40800 43100 5 10 0 0 90 0 1
+T 40600 43000 5 10 0 0 90 0 1
 device=OUTPUT
-T 41100 43900 5 10 1 1 90 0 1
+T 40900 43800 5 10 1 1 90 0 1
 netname=spi_cs
 }
-C 42700 41100 1 90 0 nc-left-1.sym
+C 42500 41000 1 90 0 nc-left-1.sym
 {
-T 42300 41100 5 10 0 0 90 0 1
+T 42100 41000 5 10 0 0 90 0 1
 value=NoConnection
-T 41900 41100 5 10 0 0 90 0 1
+T 41700 41000 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 42700 43000 1 90 0 nc-right-1.sym
+C 42500 42900 1 90 0 nc-right-1.sym
 {
-T 42200 43100 5 10 0 0 90 0 1
+T 42000 43000 5 10 0 0 90 0 1
 value=NoConnection
-T 42000 43100 5 10 0 0 90 0 1
+T 41800 43000 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 43800 48000 1 0 0 input-1.sym
+C 42600 48400 1 0 0 input-1.sym
 {
-T 43800 48300 5 10 0 0 0 0 1
+T 42600 48700 5 10 0 0 0 0 1
 device=INPUT
-T 43700 48200 5 10 1 1 180 0 1
+T 42500 48600 5 10 1 1 180 0 1
 netname=spi_mosi
 }
-C 44600 47900 1 180 0 output-1.sym
+C 43400 48300 1 180 0 output-1.sym
 {
-T 44500 47600 5 10 0 0 180 0 1
+T 43300 48000 5 10 0 0 180 0 1
 device=OUTPUT
-T 43700 47900 5 10 1 1 180 0 1
+T 42500 48300 5 10 1 1 180 0 1
 netname=spi_miso
 }
-C 43800 48300 1 0 0 input-1.sym
+C 42600 48700 1 0 0 input-1.sym
 {
-T 43800 48600 5 10 0 0 0 0 1
+T 42600 49000 5 10 0 0 0 0 1
 device=INPUT
-T 43700 48500 5 10 1 1 180 0 1
+T 42500 48900 5 10 1 1 180 0 1
 netname=spi_clk
 }
-C 43800 48600 1 0 0 input-1.sym
+C 42600 49000 1 0 0 input-1.sym
 {
-T 43800 48900 5 10 0 0 0 0 1
+T 42600 49300 5 10 0 0 0 0 1
 device=INPUT
-T 43700 48800 5 10 1 1 180 0 1
+T 42500 49200 5 10 1 1 180 0 1
 netname=spi_cs
 }
-C 49300 48500 1 0 0 nc-top-1.sym
+C 48500 48900 1 0 0 nc-top-1.sym
 {
-T 49700 49000 5 10 0 0 0 0 1
+T 48900 49400 5 10 0 0 0 0 1
 value=NoConnection
-T 49700 49200 5 10 0 0 0 0 1
+T 48900 49600 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 49600 48500 1 0 0 nc-top-1.sym
+C 48800 48900 1 0 0 nc-top-1.sym
 {
-T 50000 49000 5 10 0 0 0 0 1
+T 49200 49400 5 10 0 0 0 0 1
 value=NoConnection
-T 50000 49200 5 10 0 0 0 0 1
+T 49200 49600 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 50300 48500 1 0 0 vss-1.sym
-C 48000 45200 1 0 0 nc-left-1.sym
+C 49500 49100 1 0 0 vss-1.sym
+C 47200 45600 1 0 0 nc-left-1.sym
 {
-T 48000 45600 5 10 0 0 0 0 1
+T 47200 46000 5 10 0 0 0 0 1
 value=NoConnection
-T 48000 46000 5 10 0 0 0 0 1
+T 47200 46400 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 48500 46500 1 90 0 vss-1.sym
-C 48500 44800 1 90 0 vss-1.sym
-N 54100 47900 54100 46700 4
-N 54100 46400 54100 45500 4
-N 51300 44100 52200 44100 4
-N 49800 44100 51000 44100 4
-C 55900 45200 1 0 0 connector4-2.sym
-{
-T 56500 47300 5 10 1 1 0 6 1
-refdes=J2
-T 56200 47250 5 10 0 0 0 0 1
-device=CONNECTOR_4
-T 56200 47450 5 10 0 0 0 0 1
-footprint=SIP4N
-}
-N 54100 46800 55900 46800 4
-N 53900 46400 55900 46400 4
-N 55900 46000 55800 46000 4
-N 55800 46000 55800 42500 4
-N 55800 42500 51300 42500 4
-N 55900 45600 55900 42400 4
-N 51000 42400 55900 42400 4
-N 50200 48500 50800 48500 4
-C 52300 50200 1 0 0 vdd-1.sym
-C 52400 49300 1 90 0 capacitor-1.sym
-{
-T 51700 49500 5 10 0 0 90 0 1
+C 47700 46900 1 90 0 vss-1.sym
+C 47700 45200 1 90 0 vss-1.sym
+N 53300 48300 53300 47100 4
+N 53300 46800 53300 45900 4
+N 50500 44500 51400 44500 4
+N 49000 44500 50200 44500 4
+N 53300 47400 55700 47400 4
+N 53100 46800 55700 46800 4
+N 55700 46200 55000 46200 4
+N 55000 46200 55000 42900 4
+N 55000 42900 50500 42900 4
+N 55100 45600 55100 42800 4
+N 50200 42800 55100 42800 4
+N 49400 49100 50000 49100 4
+C 51500 50500 1 0 0 vdd-1.sym
+C 51600 49600 1 90 0 capacitor-1.sym
+{
+T 50900 49800 5 10 0 0 90 0 1
 device=CAPACITOR
-T 51900 49900 5 10 1 1 0 0 1
-refdes=C7
-T 51500 49500 5 10 0 0 90 0 1
+T 51100 50200 5 10 1 1 0 0 1
+refdes=C11
+T 50700 49800 5 10 0 0 90 0 1
 symversion=0.1
-T 52150 49650 5 10 1 1 180 0 1
+T 51350 49950 5 10 1 1 180 0 1
 value=100n
-T 52150 49450 5 10 1 1 180 0 1
+T 51350 49750 5 10 1 1 180 0 1
 value=16v
 }
-C 54000 50400 1 180 0 capacitor-1.sym
+C 53200 50700 1 180 0 capacitor-1.sym
 {
-T 53800 49700 5 10 0 0 180 0 1
+T 53000 50000 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53200 50250 5 10 1 1 0 0 1
-refdes=C8
-T 53800 49500 5 10 0 0 180 0 1
+T 52300 50550 5 10 1 1 0 0 1
+refdes=C12
+T 53000 49800 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 50250 5 10 1 1 0 0 1
+T 52900 50550 5 10 1 1 0 0 1
 value=100n
-T 53750 50000 5 10 1 1 0 0 1
+T 52950 50300 5 10 1 1 0 0 1
 value=50v
 }
-C 51300 50400 1 180 0 capacitor-1.sym
+C 50500 50700 1 180 0 capacitor-1.sym
 {
-T 51100 49700 5 10 0 0 180 0 1
+T 50300 50000 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50500 50250 5 10 1 1 0 0 1
-refdes=C4
-T 51100 49500 5 10 0 0 180 0 1
+T 49700 50550 5 10 1 1 0 0 1
+refdes=C7
+T 50300 49800 5 10 0 0 180 0 1
 symversion=0.1
-T 51500 50400 5 10 1 1 180 0 1
+T 50700 50700 5 10 1 1 180 0 1
 value=470nF
 }
-C 50400 49600 1 180 0 vss-1.sym
-C 51300 49800 1 180 0 capacitor-1.sym
+C 49600 49900 1 180 0 vss-1.sym
+C 50500 50100 1 180 0 capacitor-1.sym
 {
-T 51100 49100 5 10 0 0 180 0 1
+T 50300 49400 5 10 0 0 180 0 1
 device=CAPACITOR
-T 50500 49650 5 10 1 1 0 0 1
-refdes=C5
-T 51100 48900 5 10 0 0 180 0 1
+T 49700 49950 5 10 1 1 0 0 1
+refdes=C9
+T 50300 49200 5 10 0 0 180 0 1
 symversion=0.1
-T 51350 49800 5 10 1 1 180 0 1
+T 50550 50100 5 10 1 1 180 0 1
 value=100n
 }
-N 51300 49600 51300 48500 4
-C 54600 49000 1 180 0 vss-1.sym
-C 52800 43000 1 90 0 resistor-1.sym
+N 50500 49900 50500 48900 4
+C 53800 49300 1 180 0 vss-1.sym
+C 52000 43400 1 90 0 resistor-1.sym
 {
-T 52400 43300 5 10 0 0 90 0 1
+T 51600 43700 5 10 0 0 90 0 1
 device=RESISTOR
-T 52550 43650 5 10 1 1 180 0 1
+T 51750 44050 5 10 1 1 180 0 1
 refdes=R2
-T 52325 43300 5 10 1 1 0 0 1
+T 51525 43700 5 10 1 1 0 0 1
 value=22
 }
-C 54300 44900 1 0 0 resistor-1.sym
+C 53500 45300 1 0 0 resistor-1.sym
 {
-T 54600 45300 5 10 0 0 0 0 1
+T 53800 45700 5 10 0 0 0 0 1
 device=RESISTOR
-T 54450 45150 5 10 1 1 0 0 1
+T 53650 45550 5 10 1 1 0 0 1
 refdes=R3
-T 54800 45150 5 10 1 1 0 0 1
+T 54000 45550 5 10 1 1 0 0 1
 value=22
 }
-C 54500 43800 1 90 0 capacitor-1.sym
+C 53700 44200 1 90 0 capacitor-1.sym
 {
-T 53800 44000 5 10 0 0 90 0 1
+T 53000 44400 5 10 0 0 90 0 1
 device=CAPACITOR
-T 54700 44500 5 10 1 1 180 0 1
-refdes=C12
-T 53600 44000 5 10 0 0 90 0 1
+T 53900 44900 5 10 1 1 180 0 1
+refdes=C16
+T 52800 44400 5 10 0 0 90 0 1
 symversion=0.1
-T 54350 44000 5 10 1 1 0 0 1
+T 53550 44400 5 10 1 1 0 0 1
 value=10nF
 }
-N 51300 42500 51300 44300 4
-C 53900 44000 1 180 0 capacitor-1.sym
+N 50500 42900 50500 44700 4
+C 53100 44400 1 180 0 capacitor-1.sym
 {
-T 53700 43300 5 10 0 0 180 0 1
+T 52900 43700 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53350 44000 5 10 1 1 180 0 1
-refdes=C11
-T 53700 43100 5 10 0 0 180 0 1
+T 52550 44400 5 10 1 1 180 0 1
+refdes=C15
+T 52900 43500 5 10 0 0 180 0 1
 symversion=0.1
-T 53550 43850 5 10 1 1 0 0 1
+T 52750 44250 5 10 1 1 0 0 1
 value=10nF
 }
-N 53900 44700 55200 44700 4
-N 53000 43000 53000 44300 4
-C 54300 43800 1 180 0 vss-1.sym
-N 53900 43800 54300 43800 4
-N 52700 43900 52700 44300 4
-N 53000 43000 52700 43000 4
-N 54300 45000 53900 45000 4
-N 55200 45000 55200 44700 4
-C 53000 42900 1 0 0 resistor-1.sym
-{
-T 53300 43300 5 10 0 0 0 0 1
+N 53100 45100 54400 45100 4
+N 52200 43400 52200 44700 4
+C 53500 44200 1 180 0 vss-1.sym
+N 53100 44200 53500 44200 4
+N 51900 44300 51900 44700 4
+N 52200 43400 51900 43400 4
+N 53500 45400 53100 45400 4
+N 54400 45400 54400 45100 4
+C 52100 43300 1 0 0 resistor-1.sym
+{
+T 52400 43700 5 10 0 0 0 0 1
 device=RESISTOR
-T 53100 42700 5 10 1 1 0 0 1
+T 52200 43100 5 10 1 1 0 0 1
 refdes=R4
-T 53475 42700 5 10 1 1 0 0 1
+T 52575 43100 5 10 1 1 0 0 1
 value=.075
-T 53000 42900 5 10 0 1 0 0 1
+T 52100 43300 5 10 0 1 0 0 1
 description=1% 2W Thick Film
 }
-C 53900 43200 1 270 0 vss-1.sym
-C 55300 43800 1 90 0 resistor-1.sym
+C 53000 43600 1 270 0 vss-1.sym
+C 54500 44200 1 90 0 resistor-1.sym
 {
-T 54900 44100 5 10 0 0 90 0 1
+T 54100 44500 5 10 0 0 90 0 1
 device=RESISTOR
-T 55600 44450 5 10 1 1 180 0 1
+T 54800 44850 5 10 1 1 180 0 1
 refdes=R5
-T 55650 44150 5 10 1 1 180 0 1
+T 54850 44550 5 10 1 1 180 0 1
 value=.075
-T 55300 43800 5 10 0 1 0 0 1
+T 54500 44200 5 10 0 1 0 0 1
 description=1% 2W Thick Film
 }
-C 55400 43800 1 180 0 vss-1.sym
-N 51000 42400 51000 44300 4
-N 49800 44300 49800 44100 4
-N 50100 44300 50100 44100 4
-N 50400 44300 50400 44100 4
-N 50700 44300 50700 44100 4
-N 51600 44300 51600 44100 4
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-N 53900 47900 54100 47900 4
-N 53900 47600 54100 47600 4
-N 53900 47300 54100 47300 4
-N 54100 47000 53900 47000 4
-N 53900 46700 54100 46700 4
-N 53900 46100 54100 46100 4
-N 53900 45800 54100 45800 4
-N 53900 45500 54100 45500 4
-N 52200 49300 52200 48500 4
-N 52500 48500 52500 50200 4
-N 52200 50200 53100 50200 4
-N 54000 50200 54400 50200 4
-C 54000 49800 1 180 0 capacitor-1.sym
-{
-T 53800 49100 5 10 0 0 180 0 1
+C 54600 44200 1 180 0 vss-1.sym
+N 50200 42800 50200 44700 4
+N 49000 44700 49000 44500 4
+N 49300 44700 49300 44500 4
+N 49600 44700 49600 44500 4
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+N 51400 50500 52300 50500 4
+N 53200 50500 53600 50500 4
+C 53200 50100 1 180 0 capacitor-1.sym
+{
+T 53000 49400 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53200 49650 5 10 1 1 0 0 1
-refdes=C9
-T 53800 48900 5 10 0 0 180 0 1
+T 52300 49950 5 10 1 1 0 0 1
+refdes=C13
+T 53000 49200 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 49650 5 10 1 1 0 0 1
+T 52900 49950 5 10 1 1 0 0 1
 value=10uF
-T 53750 49400 5 10 1 1 0 0 1
+T 52950 49700 5 10 1 1 0 0 1
 value=50v
 }
-C 54000 49200 1 180 0 capacitor-1.sym
+C 53200 49500 1 180 0 capacitor-1.sym
 {
-T 53800 48500 5 10 0 0 180 0 1
+T 53000 48800 5 10 0 0 180 0 1
 device=CAPACITOR
-T 53100 49050 5 10 1 1 0 0 1
-refdes=C10
-T 53800 48300 5 10 0 0 180 0 1
+T 52300 49350 5 10 1 1 0 0 1
+refdes=C14
+T 53000 48600 5 10 0 0 180 0 1
 symversion=0.1
-T 53700 49050 5 10 1 1 0 0 1
+T 52900 49350 5 10 1 1 0 0 1
 value=10uF
-T 53750 48800 5 10 1 1 0 0 1
+T 52950 49100 5 10 1 1 0 0 1
 value=50v
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-N 51700 50200 51300 50200 4
-N 50200 50200 50200 49600 4
-N 50200 49600 50400 49600 4
-N 50200 50200 50400 50200 4
-C 42300 40800 1 90 0 input-1.sym
-{
-T 42000 40800 5 10 0 0 90 0 1
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+N 49400 49900 49600 49900 4
+N 49400 50500 49600 50500 4
+C 42100 40700 1 90 0 input-1.sym
+{
+T 41800 40700 5 10 0 0 90 0 1
 device=INPUT
-T 42100 40700 5 10 1 1 270 0 1
+T 41900 40600 5 10 1 1 270 0 1
 netname=fault
 }
-C 44300 47300 1 270 0 gnd-1.sym
-C 44600 47100 1 0 0 Si8441.sym
+C 43100 47700 1 270 0 gnd-1.sym
+C 43400 47500 1 0 0 Si8441.sym
 {
-T 46200 49600 5 10 1 1 0 0 1
+T 45000 50000 5 10 1 1 0 0 1
 refdes=U1
-T 45900 47995 5 10 1 1 90 0 1
+T 44700 48395 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44100 48900 1 0 0 gnd-1.sym
-C 44000 50100 1 0 0 3.3V-plus-1.sym
-C 44100 47400 1 0 0 nc-left-1.sym
+C 42900 49300 1 0 0 gnd-1.sym
+C 42800 50500 1 0 0 3.3V-plus-1.sym
+C 42900 47800 1 0 0 nc-left-1.sym
 {
-T 44100 47800 5 10 0 0 0 0 1
+T 42900 48200 5 10 0 0 0 0 1
 value=NoConnection
-T 44100 48200 5 10 0 0 0 0 1
+T 42900 48600 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 51500 50200 1 0 0 5V-plus-1.sym
-C 47000 50000 1 0 0 5V-plus-1.sym
-C 47400 49100 1 180 0 vdd-1.sym
-C 46800 47400 1 270 0 vdd-1.sym
-C 46800 47400 1 0 0 nc-right-1.sym
+C 50700 50500 1 0 0 5V-plus-1.sym
+C 45800 50500 1 0 0 5V-plus-1.sym
+C 46200 49600 1 180 0 vdd-1.sym
+C 45600 47800 1 270 0 vdd-1.sym
+C 45600 47800 1 0 0 nc-right-1.sym
 {
-T 46900 47900 5 10 0 0 0 0 1
+T 45700 48300 5 10 0 0 0 0 1
 value=NoConnection
-T 46900 48100 5 10 0 0 0 0 1
+T 45700 48500 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 43800 44500 1 0 0 input-1.sym
+C 42600 44900 1 0 0 input-1.sym
 {
-T 43800 44800 5 10 0 0 0 0 1
+T 42600 45200 5 10 0 0 0 0 1
 device=INPUT
-T 43700 44700 5 10 1 1 180 0 1
+T 42500 45100 5 10 1 1 180 0 1
 netname=step
 }
-C 44600 44400 1 180 0 output-1.sym
+C 43400 44800 1 180 0 output-1.sym
 {
-T 44500 44100 5 10 0 0 180 0 1
+T 43300 44500 5 10 0 0 180 0 1
 device=OUTPUT
-T 43700 44400 5 10 1 1 180 0 1
+T 42500 44800 5 10 1 1 180 0 1
 netname=fault
 }
-C 43800 44800 1 0 0 input-1.sym
+C 42600 45200 1 0 0 input-1.sym
 {
-T 43800 45100 5 10 0 0 0 0 1
+T 42600 45500 5 10 0 0 0 0 1
 device=INPUT
-T 43700 45000 5 10 1 1 180 0 1
+T 42500 45400 5 10 1 1 180 0 1
 netname=dir
 }
-C 43800 45100 1 0 0 input-1.sym
+C 42600 45500 1 0 0 input-1.sym
 {
-T 43800 45400 5 10 0 0 0 0 1
+T 42600 45800 5 10 0 0 0 0 1
 device=INPUT
-T 43700 45300 5 10 1 1 180 0 1
+T 42500 45700 5 10 1 1 180 0 1
 netname=enable
 }
-C 44300 43800 1 270 0 gnd-1.sym
-C 44600 43600 1 0 0 Si8441.sym
+C 43100 44200 1 270 0 gnd-1.sym
+C 43400 44000 1 0 0 Si8441.sym
 {
-T 46200 46100 5 10 1 1 0 0 1
+T 45000 46500 5 10 1 1 0 0 1
 refdes=U2
-T 45900 44495 5 10 1 1 90 0 1
+T 44700 44895 5 10 1 1 90 0 1
 footprint=SOIC16
 }
-C 44100 43900 1 0 0 nc-left-1.sym
+C 42900 44300 1 0 0 nc-left-1.sym
 {
-T 44100 44300 5 10 0 0 0 0 1
+T 42900 44700 5 10 0 0 0 0 1
 value=NoConnection
-T 44100 44700 5 10 0 0 0 0 1
+T 42900 45100 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 46800 43900 1 270 0 vdd-1.sym
-C 46800 43900 1 0 0 nc-right-1.sym
+C 45600 44300 1 270 0 vdd-1.sym
+C 45600 44300 1 0 0 nc-right-1.sym
 {
-T 46900 44400 5 10 0 0 0 0 1
+T 45700 44800 5 10 0 0 0 0 1
 value=NoConnection
-T 46900 44600 5 10 0 0 0 0 1
+T 45700 45000 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-N 46800 45200 47700 45200 4
-N 47700 45200 47700 46400 4
-N 47700 46400 48500 46400 4
-N 46800 44900 47800 44900 4
-N 47800 44900 47800 46000 4
-N 47800 46000 48500 46000 4
-N 46800 44600 47900 44600 4
-N 47900 44600 47900 45700 4
-N 47900 45700 48500 45700 4
-N 46800 44300 48000 44300 4
-N 46800 47800 47700 47800 4
-N 47700 47800 47700 47100 4
-N 47700 47100 48500 47100 4
-N 46800 48100 47800 48100 4
-N 47800 48100 47800 47400 4
-N 47800 47400 48500 47400 4
-N 46800 48400 47900 48400 4
-N 47900 48400 47900 47700 4
-N 47900 47700 48500 47700 4
-N 46800 48700 48000 48700 4
-N 48000 48700 48000 48000 4
+N 45600 45600 46900 45600 4
+N 46900 45600 46900 46800 4
+N 46900 46800 47700 46800 4
+N 45600 45300 47000 45300 4
+N 47000 45300 47000 46400 4
+N 47000 46400 47700 46400 4
+N 45600 45000 47100 45000 4
+N 47100 45000 47100 46100 4
+N 47100 46100 47700 46100 4
+N 45600 44700 47200 44700 4
+N 45600 48200 46900 48200 4
+N 46900 48200 46900 47500 4
+N 46900 47500 47700 47500 4
+N 45600 48500 47000 48500 4
+N 47000 48500 47000 47800 4
+N 47000 47800 47700 47800 4
+N 45600 48800 47100 48800 4
+N 47100 48800 47100 48100 4
+N 47100 48100 47700 48100 4
+N 45600 49100 47200 49100 4
+N 47200 49100 47200 48400 4
 T 53900 40100 9 10 1 0 0 0 1
 Joseph Coffland
 T 53800 40400 9 10 1 0 0 0 1
@@ -449,127 +440,217 @@ T 50000 40100 9 10 1 0 0 0 1
 1
 T 51500 40100 9 10 1 0 0 0 1
 1
-N 51300 49600 51700 49600 4
-N 52200 44300 52200 44100 4
-N 48000 48000 48500 48000 4
-C 43100 41100 1 90 0 nc-left-1.sym
+N 50500 49900 50900 49900 4
+N 51400 44700 51400 44500 4
+N 47200 48400 47700 48400 4
+C 42900 41000 1 90 0 nc-left-1.sym
 {
-T 42700 41100 5 10 0 0 90 0 1
+T 42500 41000 5 10 0 0 90 0 1
 value=NoConnection
-T 42300 41100 5 10 0 0 90 0 1
+T 42100 41000 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 43100 43000 1 90 0 nc-right-1.sym
+C 42900 42900 1 90 0 nc-right-1.sym
 {
-T 42600 43100 5 10 0 0 90 0 1
+T 42400 43000 5 10 0 0 90 0 1
 value=NoConnection
-T 42400 43100 5 10 0 0 90 0 1
+T 42200 43000 5 10 0 0 90 0 1
 device=DRC_Directive
 }
-C 41200 48700 1 270 0 led-1.sym
+C 47000 41700 1 270 0 led-1.sym
 {
-T 41800 47900 5 10 0 0 270 0 1
+T 47600 40900 5 10 0 0 270 0 1
 device=LED
-T 42000 47900 5 10 0 0 270 0 1
+T 47800 40900 5 10 0 0 270 0 1
 symversion=0.1
-T 40700 48200 5 10 1 1 0 0 1
+T 46500 41200 5 10 1 1 0 0 1
 refdes=LED1
-T 41200 48700 5 10 0 0 0 0 1
+T 47000 41700 5 10 0 0 0 0 1
 model=LG R971-KN-1
-T 41200 48700 5 10 0 0 0 0 1
+T 47000 41700 5 10 0 0 0 0 1
 footprint=0805
-T 41200 48700 5 10 0 0 0 0 1
+T 47000 41700 5 10 0 0 0 0 1
 description=green
 }
-C 41300 49600 1 270 0 resistor-1.sym
+C 47100 42600 1 270 0 resistor-1.sym
 {
-T 41700 49300 5 10 0 0 270 0 1
+T 47500 42300 5 10 0 0 270 0 1
 device=RESISTOR
-T 41000 49100 5 10 1 1 0 0 1
+T 46800 42100 5 10 1 1 0 0 1
 refdes=R1
-T 41500 49100 5 10 1 1 0 0 1
+T 47300 42100 5 10 1 1 0 0 1
 value=150
 }
-C 41200 49600 1 0 0 5V-plus-1.sym
-C 41600 47800 1 180 0 vdd-1.sym
-C 47400 49100 1 90 0 capacitor-1.sym
+C 47000 42600 1 0 0 5V-plus-1.sym
+C 47400 40800 1 180 0 vdd-1.sym
+C 46200 49600 1 90 0 capacitor-1.sym
 {
-T 46700 49300 5 10 0 0 90 0 1
+T 45500 49800 5 10 0 0 90 0 1
 device=CAPACITOR
-T 47500 49900 5 10 1 1 180 0 1
-refdes=C2
-T 46500 49300 5 10 0 0 90 0 1
+T 46300 50400 5 10 1 1 180 0 1
+refdes=C4
+T 45300 49800 5 10 0 0 90 0 1
 symversion=0.1
-T 47250 49200 5 10 1 1 0 0 1
+T 46050 49700 5 10 1 1 0 0 1
 value=1uF
 }
-N 46800 49300 46900 49300 4
-N 46900 49000 46800 49000 4
-N 46900 49300 46900 50000 4
-N 46900 50000 47200 50000 4
-C 47400 45600 1 90 0 capacitor-1.sym
+N 45600 49700 45700 49700 4
+N 45700 49400 45600 49400 4
+N 45700 49700 45700 50500 4
+N 45700 50500 46500 50500 4
+C 46200 46100 1 90 0 capacitor-1.sym
 {
-T 46700 45800 5 10 0 0 90 0 1
+T 45500 46300 5 10 0 0 90 0 1
 device=CAPACITOR
-T 47500 46350 5 10 1 1 180 0 1
-refdes=C6
-T 46500 45800 5 10 0 0 90 0 1
+T 46300 46850 5 10 1 1 180 0 1
+refdes=C8
+T 45300 46300 5 10 0 0 90 0 1
 symversion=0.1
-T 47250 45750 5 10 1 1 0 0 1
+T 46050 46250 5 10 1 1 0 0 1
 value=1uF
 }
-C 47000 46500 1 0 0 5V-plus-1.sym
-C 47400 45600 1 180 0 vdd-1.sym
-N 48000 44700 48000 44300 4
-N 46800 45500 46900 45500 4
-N 46900 45500 46900 45600 4
-N 46900 45600 47200 45600 4
-N 46800 45800 46900 45800 4
-N 46900 45800 46900 46500 4
-N 46900 46500 47200 46500 4
-N 46900 49000 46900 49100 4
-N 46900 49100 47200 49100 4
-C 44400 49200 1 90 0 capacitor-1.sym
-{
-T 43700 49400 5 10 0 0 90 0 1
+C 45800 47000 1 0 0 5V-plus-1.sym
+C 46200 46100 1 180 0 vdd-1.sym
+N 47200 45100 47200 44700 4
+N 45600 45900 45700 45900 4
+N 45700 45900 45700 46100 4
+N 45700 46100 46500 46100 4
+N 45600 46200 45700 46200 4
+N 45700 46200 45700 47000 4
+N 45700 47000 46500 47000 4
+N 45700 49400 45700 49600 4
+N 45700 49600 46500 49600 4
+C 43200 49600 1 90 0 capacitor-1.sym
+{
+T 42500 49800 5 10 0 0 90 0 1
 device=CAPACITOR
-T 43500 49400 5 10 0 0 90 0 1
+T 42300 49800 5 10 0 0 90 0 1
 symversion=0.1
-T 44150 49950 5 10 1 1 180 0 1
-refdes=C1
-T 43850 49350 5 10 1 1 0 0 1
+T 42950 50350 5 10 1 1 180 0 1
+refdes=C2
+T 42650 49750 5 10 1 1 0 0 1
 value=1uF
 }
-N 44600 49000 44500 49000 4
-N 44500 49000 44500 49200 4
-N 44500 49200 44200 49200 4
-N 44600 49300 44500 49300 4
-N 44500 49300 44500 50100 4
-N 44500 50100 44200 50100 4
-C 44400 45700 1 90 0 capacitor-1.sym
+N 43400 49400 43300 49400 4
+N 43300 49400 43300 49600 4
+N 42500 49600 43300 49600 4
+N 43400 49700 43300 49700 4
+N 43300 49700 43300 50500 4
+N 42500 50500 43300 50500 4
+C 43200 46100 1 90 0 capacitor-1.sym
 {
-T 43700 45900 5 10 0 0 90 0 1
+T 42500 46300 5 10 0 0 90 0 1
 device=CAPACITOR
-T 43500 45900 5 10 0 0 90 0 1
+T 42300 46300 5 10 0 0 90 0 1
 symversion=0.1
-T 44150 46450 5 10 1 1 180 0 1
-refdes=C3
-T 43850 45850 5 10 1 1 0 0 1
+T 42950 46850 5 10 1 1 180 0 1
+refdes=C5
+T 42650 46250 5 10 1 1 0 0 1
 value=1uF
 }
-C 44100 45400 1 0 0 gnd-1.sym
-C 44000 46600 1 0 0 3.3V-plus-1.sym
-N 44600 45500 44500 45500 4
-N 44500 45500 44500 45700 4
-N 44500 45700 44200 45700 4
-N 44200 46600 44500 46600 4
-N 44500 46600 44500 45800 4
-N 44500 45800 44600 45800 4
-N 48000 44700 48500 44700 4
-C 48500 44300 1 0 0 TMC2660.sym
-{
-T 50895 46295 5 10 1 1 0 0 1
+C 42900 45800 1 0 0 gnd-1.sym
+C 42800 47000 1 0 0 3.3V-plus-1.sym
+N 43400 45900 43300 45900 4
+N 43300 45900 43300 46100 4
+N 42500 46100 43300 46100 4
+N 42500 47000 43300 47000 4
+N 43300 47000 43300 46200 4
+N 43300 46200 43400 46200 4
+N 47200 45100 47700 45100 4
+C 47700 44700 1 0 0 TMC2660.sym
+{
+T 50095 46695 5 10 1 1 0 0 1
 footprint=QFP44
-T 53495 48295 5 10 1 1 0 0 1
+T 52695 48695 5 10 1 1 0 0 1
 refdes=U3
 }
+C 42700 49600 1 90 0 capacitor-1.sym
+{
+T 42000 49800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 41800 49800 5 10 0 0 90 0 1
+symversion=0.1
+T 42450 50350 5 10 1 1 180 0 1
+refdes=C1
+T 41950 49750 5 10 1 1 0 0 1
+value=100nF
+}
+C 42700 46100 1 90 0 capacitor-1.sym
+{
+T 42000 46300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 41800 46300 5 10 0 0 90 0 1
+symversion=0.1
+T 42450 46850 5 10 1 1 180 0 1
+refdes=C3
+T 41950 46250 5 10 1 1 0 0 1
+value=100nF
+}
+C 46700 49600 1 90 0 capacitor-1.sym
+{
+T 46000 49800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 46800 50400 5 10 1 1 180 0 1
+refdes=C6
+T 45800 49800 5 10 0 0 90 0 1
+symversion=0.1
+T 46550 49700 5 10 1 1 0 0 1
+value=100nF
+}
+C 46700 46100 1 90 0 capacitor-1.sym
+{
+T 46000 46300 5 10 0 0 90 0 1
+device=CAPACITOR
+T 46700 46700 5 10 1 1 90 0 1
+refdes=C10
+T 45800 46300 5 10 0 0 90 0 1
+symversion=0.1
+T 46700 45850 5 10 1 1 90 0 1
+value=100nF
+}
+C 56900 48000 1 180 0 DB9-1.sym
+{
+T 55900 45100 5 10 0 0 180 0 1
+device=DB9
+T 56300 48300 5 10 1 1 180 0 1
+refdes=J2
+}
+C 55200 47600 1 0 0 nc-left-1.sym
+{
+T 55200 48000 5 10 0 0 0 0 1
+value=NoConnection
+T 55200 48400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 55200 47000 1 0 0 nc-left-1.sym
+{
+T 55200 47400 5 10 0 0 0 0 1
+value=NoConnection
+T 55200 47800 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 55200 46400 1 0 0 nc-left-1.sym
+{
+T 55200 46800 5 10 0 0 0 0 1
+value=NoConnection
+T 55200 47200 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 55200 45800 1 0 0 nc-left-1.sym
+{
+T 55200 46200 5 10 0 0 0 0 1
+value=NoConnection
+T 55200 46600 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 55200 45200 1 0 0 nc-left-1.sym
+{
+T 55200 45600 5 10 0 0 0 0 1
+value=NoConnection
+T 55200 46000 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+N 55100 45600 55700 45600 4
+N 49400 49100 49400 48900 4
+N 49700 49100 49700 48900 4
+N 50000 49100 50000 48900 4
diff --git a/electronics/power.sch b/electronics/power.sch
index 19a60bd..e88ffd1 100644
--- a/electronics/power.sch
+++ b/electronics/power.sch
@@ -20,3 +20,11 @@ C 54200 42000 1 90 0 3.3V-plus-1.sym
 C 56300 42100 1 90 0 gnd-1.sym
 T 50000 40700 9 10 1 0 0 0 1
 Power
+T 53900 40100 9 10 1 0 0 0 1
+Joseph Coffland
+T 53800 40400 9 10 1 0 0 0 1
+1.0
+T 50000 40100 9 10 1 0 0 0 1
+3
+T 51500 40100 9 10 1 0 0 0 1
+3
-- 
2.27.0